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51. 发明申请

US20070077429A1 Multicomponent nanorods 失效
标题翻译：多组分纳米棒
公开(公告)号：US20070077429A1
公开(公告)日：2007-04-05
申请号：US11171894
申请日：2005-06-30
申请人： Chad Mirkin , Lidong Qin , Sungho Park , Ling Huang , Sung-Wook Chung
发明人： Chad Mirkin , Lidong Qin , Sungho Park , Ling Huang , Sung-Wook Chung
IPC分类号： B32B1/00 , B05D1/36 , B05D3/10
CPC分类号： H01C17/06513 , B82Y5/00 , B82Y10/00 , B82Y20/00 , G01N33/531 , H01L29/0665 , H01L29/0673 , H01L29/068 , H01L29/861 , Y10S977/762 , Y10S977/81 , Y10S977/849 , Y10S977/856 , Y10S977/857 , Y10T428/2938 , Y10T428/2982
摘要： Multicomponent nanorods having segments with differing electronic and/or chemical properties are disclosed. The nanorods can be tailored with high precision to create controlled gaps within the nanorods or to produce diodes or resistors, based upon the identities of the components-making up the segments of the nanorods. Macrostructural composites of these nanorods also are disclosed.
摘要翻译：公开了具有不同电子和/或化学性质的多组分纳米棒。纳米棒可以以高精度进行定制，以在纳米棒内产生受控间隙，或者基于构成纳米棒段的部件的身份产生二极管或电阻器。还公开了这些纳米棒的宏观结构复合材料。

52. 发明授权

US07112439B2 Dual expression vector system for antibody expression in bacterial and mammalian cells 有权
标题翻译：用于细菌和哺乳动物细胞中抗体表达的双重表达载体系统
公开(公告)号：US07112439B2
公开(公告)日：2006-09-26
申请号：US10753309
申请日：2004-01-08
申请人： Leslie Sydnor Johnson , Ling Huang
发明人： Leslie Sydnor Johnson , Ling Huang
IPC分类号： C12N5/16 , C12N15/85 , C12N1/21
CPC分类号： C07K16/00 , A01K2267/01 , C07K16/283 , C07K2317/10 , C07K2317/24 , C07K2317/51 , C07K2317/52 , C07K2317/55 , C07K2317/622 , C07K2319/30 , C12N7/00 , C12N15/8509 , C12N2795/14043
摘要： The present invention provides a dual expression vector, and methods for its use, for the expression and secretion of a full-length polypeptide of interest in eukaryotic cells, and a soluble domain or fragment of the polypeptide in bacteria. When expressed in bacteria, transcription from a bacterial promoter within a first intron and termination at the stop codon in a second intron results in expression of a fragment of the polypeptide, e.g., a Fab fragment, whereas in mammalian cells, splicing removes the bacterial regulatory sequences located in the two introns and generates the mammalian signal sequence, allowing expression of the full-length polypeptide, e.g., IgG heavy or light chain polypeptide. The dual expression vector system of the invention can be used to select and screen for new monoclonal antibodies, as well as to optimize monoclonal antibodies for binding to antigenic molecules of interest.
摘要翻译：本发明提供双重表达载体及其用于在真核细胞中表达和分泌全长多肽的方法，以及细菌中多肽的可溶性结构域或片段。当在细菌中表达时，来自第一内含子内的细菌启动子的转录和终止密码子在第二内含子中终止导致多肽片段的表达，例如Fab片段，而在哺乳动物细胞中，剪接除去细菌调节位于两个内含子中的序列并产生哺乳动物信号序列，允许表达全长多肽，例如IgG重链或轻链多肽。本发明的双表达载体系统可用于选择和筛选新的单克隆抗体，以及优化用于结合感兴趣的抗原分子的单克隆抗体。

53. 发明申请

US20060102700A1 Printed circuit board having improved solder pad layout 审中-公开
标题翻译：具有改善的焊盘布局的印刷电路板
公开(公告)号：US20060102700A1
公开(公告)日：2006-05-18
申请号：US11025161
申请日：2004-12-29
申请人： Ya-ling Huang , Di Li , Yu-cui He
发明人： Ya-ling Huang , Di Li , Yu-cui He
IPC分类号： B23K31/02 , B23K31/00
CPC分类号： H05K1/116 , B23K1/0016 , B23K2101/40 , B23K2101/42 , H05K3/3447 , H05K3/3468 , H05K2201/09381 , H05K2201/09409 , H05K2201/097 , H05K2201/10189 , H05K2203/046
摘要： A printed circuit board (100) includes a plurality of through-holes (26) defined therein, and a plurality of solder pads (20) defined to surround the through holes (26) respectively. Each of the solder pads (20) includes a first soldering zone (22) for accommodating solder used in a soldering process and a second soldering zone (28) in communication with the first soldering zone (22) for receiving excess solder extravasating from the first soldering zone (22). An axis of each of the solder pads (22) and a direction opposite to a movement direction of the printed circuit board (100) in the soldering process defines a predetermined angle.
摘要翻译：印刷电路板（100）包括限定在其中的多个通孔（26）和限定为分别围绕通孔（26）的多个焊盘（20）。每个焊盘（20）包括用于容纳焊接工艺中使用的焊料的第一焊接区（22）和与第一焊接区（22）连通的第二焊接区（28），用于接收从第一焊接区焊接区（22）。在焊接工艺中，每个焊盘（22）的轴线和与印刷电路板（100）的运动方向相反的方向限定了预定的角度。

54. 发明申请

US20060077876A1 Optical recording media and method of fabricating the same 审中-公开
标题翻译：光记录介质及其制造方法
公开(公告)号：US20060077876A1
公开(公告)日：2006-04-13
申请号：US11221782
申请日：2005-09-09
申请人： Chia-Sheng Lin , Rei-Feng Chung , Hsiang-Ling Huang
发明人： Chia-Sheng Lin , Rei-Feng Chung , Hsiang-Ling Huang
IPC分类号： G11B7/24
CPC分类号： G11B7/252 , G11B7/2403 , G11B7/246 , G11B7/2533 , G11B7/2534 , G11B7/256 , G11B7/2578 , G11B7/259 , G11B7/266 , G11B2007/25706 , G11B2007/25708 , G11B2007/2571 , G11B2007/25713 , G11B2007/25715 , G11B2007/25716
摘要： A recording medium. A recording layer is disposed overlying a substrate. A moisture barrier layer is disposed overlying the recording layer. A reflecting layer is disposed overlying the moisture barrier layer. An adhesion layer is disposed overlying the reflecting layer. Due to the static moisture barrier layer interposed between the reflecting layer and the recording layer in an embodiment of the invention, moisture interpenetration from ambience can be diminished to improve weather and corrosion resistance of the recording medium.
摘要翻译：记录媒体。记录层设置在衬底上。防潮层设置在记录层上。反射层设置在覆盖湿气阻挡层上。粘合层设置在反射层上。由于在本发明的一个实施方案中介于反射层和记录层之间的静态防潮层，可以减少气氛从气氛渗透，以改善记录介质的耐候性和耐腐蚀性。

55. 发明授权

US07026647B2 Device and method for detecting alignment of active areas and memory cell structures in DRAM devices 有权
标题翻译：用于检测DRAM器件中的有源区和存储单元结构的对准的装置和方法
公开(公告)号：US07026647B2
公开(公告)日：2006-04-11
申请号：US10673310
申请日：2003-09-29
申请人： Tie Jiang Wu , Chien-Chang Huang , Bo Ching Jiang , Yu-Wei Ting , Chin-Ling Huang
发明人： Tie Jiang Wu , Chien-Chang Huang , Bo Ching Jiang , Yu-Wei Ting , Chin-Ling Huang
IPC分类号： H01L23/58
CPC分类号： H01L27/10876 , G11C11/401 , G11C29/36 , G11C2029/5002 , H01L22/34 , H01L27/10841
摘要： A test device and method for detecting alignment of active areas and memory cell structures in DRAM devices with vertical transistors. In the test device, parallel first and second memory cell structures disposed in the scribe line region, each has a deep trench capacitor and a transistor structure. An active area is disposed between the first and second memory cell structures. The active area overlaps the first and second memory cell structures by a predetermined width. First and second conductive pads are disposed on both ends of the first memory cell structures respectively, and third and fourth conductive pads are disposed on both ends of the first memory cell structures respectively.
摘要翻译：一种用于检测具有垂直晶体管的DRAM器件中的有源区和存储单元结构的对准的测试装置和方法。在测试装置中，设置在划线区域中的并行第一和第二存储单元结构各自具有深沟槽电容器和晶体管结构。有源区域设置在第一和第二存储单元结构之间。活动区域与第一和第二存储单元结构重叠预定宽度。第一和第二导电焊盘分别设置在第一存储单元结构的两端，第三和第四导电焊盘分别设置在第一存储单元结构的两端。

56. 发明申请

US20050161513A1 External connecting electronic apparatus 失效
标题翻译：外部连接电子设备
公开(公告)号：US20050161513A1
公开(公告)日：2005-07-28
申请号：US10764545
申请日：2004-01-27
申请人： Tzu-Ling Huang , Hsiao-Li Peng , Li-Li Kao , Yu-Hsin Chuo
发明人： Tzu-Ling Huang , Hsiao-Li Peng , Li-Li Kao , Yu-Hsin Chuo
IPC分类号： G06K19/06 , G06K19/077
CPC分类号： H01R35/04 , G06K19/07732 , G06K19/07743
摘要： An external connecting electronic apparatus includes a case body, a connector and a cap plate. The connector and the cap plate are pivotally coupled on the case body in a movable manner. The connector has at least a hidden position in the case body for storing and a connecting position outside the case body. The cap plate has at least a masked position for covering the case body and an open position extending outwards. The cap plate corresponds to a free end of the connector. Thus when the cap plate is pushed, the connector may be moved at the same time.
摘要翻译：外部连接电子设备包括壳体，连接器和盖板。连接器和盖板以可移动的方式枢转地联接在壳体上。连接器至少在用于存储的壳体中的隐藏位置和壳体外部的连接位置。盖板至少具有用于覆盖壳体的掩蔽位置和向外延伸的打开位置。盖板对应于连接器的自由端。因此，当盖板被推动时，连接器可以同时移动。

57. 发明申请

US20050140005A1 Chip package structure 审中-公开
标题翻译：芯片封装结构
公开(公告)号：US20050140005A1
公开(公告)日：2005-06-30
申请号：US11023354
申请日：2004-12-29
申请人： Ya-Ling Huang , Tzu-Bin Lin , Hung-Ta Hsu
发明人： Ya-Ling Huang , Tzu-Bin Lin , Hung-Ta Hsu
IPC分类号： H01L23/31 , H01L21/44 , H01L23/52
CPC分类号： H01L23/3128 , H01L23/3107 , H01L23/3135 , H01L2224/16225 , H01L2224/16245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48227 , H01L2224/48247 , H01L2225/06568 , H01L2924/15311 , H01L2924/15321 , H01L2924/00
摘要： A chip package structure is disclosed. The chip package structure includes an inner molding compound with a low modulus covering the chip and an outer molding compound covering the inner molding compound. The outer molding compound has a modulus larger than then modulus of the inner molding compound.
摘要翻译：公开了一种芯片封装结构。芯片封装结构包括覆盖芯片的低模量的内部模塑料和覆盖内部模塑料的外部模塑料。外部模塑料的模量比内部模塑料的模量大。

58. 发明授权

US06895551B1 Network quality control system for automatic validation of web pages and notification of author 失效
标题翻译：用于网页自动验证和作者通知的网络质量控制系统
公开(公告)号：US06895551B1
公开(公告)日：2005-05-17
申请号：US09404421
申请日：1999-09-23
申请人： Anita Wai-Ling Huang , Neelakantan Sundaresan
发明人： Anita Wai-Ling Huang , Neelakantan Sundaresan
IPC分类号： G06F15/00 , G06F15/173 , G06F17/30
CPC分类号： G06F17/30887 , Y10S707/99933
摘要： A computer program product is provided as a network quality control system to perform an automatic validation of all the World Wide Web pages. The quality control system aims at improving the quality of the World Wide Web by promoting widely accepted uniform standards such as HTML, and further by generating web documents that are valid and compliant with the standards according to which they are published. The quality control system actively seeks malformed web pages and corrects them in conformity with their publication standards. The quality control system also automatically determines the most probable addresses of the persons in charge of maintaining the non-conformant web documents using a probabilistic approach, notifies these persons of the non-conformity of their documents, and forwards the corrected web documents to their attention.
摘要翻译：提供计算机程序产品作为网络质量控制系统以执行所有万维网页面的自动验证。质量控制体系旨在通过推广广泛接受的统一标准（如HTML）来提高万维网的质量，并进一步生成有效和符合其标准的网络文档。质量控制体系积极寻求格式不正确的网页，并根据其出版标准进行纠正。质量控制系统还自动确定负责使用概率方法维护不合格Web文档的人员的最可能地址，通知他们其文档不一致，并将其更正的Web文档转发给他们。

59. 发明授权

US06891216B1 Test structure of DRAM 有权
标题翻译： DRAM的测试结构
公开(公告)号：US06891216B1
公开(公告)日：2005-05-10
申请号：US10664163
申请日：2003-09-17
申请人： Chien-Chang Huang , Tie-Jiang Wu , Chin-Ling Huang , Yu-Wei Ting , Bo-Ching Jiang
发明人： Chien-Chang Huang , Tie-Jiang Wu , Chin-Ling Huang , Yu-Wei Ting , Bo-Ching Jiang
IPC分类号： H01L21/334 , H01L21/8242 , H01L23/544 , H01L27/108 , H01L31/119 , H01L29/76 , H01L29/94
CPC分类号： H01L22/34 , H01L27/10829 , H01L27/10861 , H01L27/10873 , H01L27/10894 , H01L27/10897 , H01L29/66181
摘要： A test structure of a DRAM array includes a substrate. A transistor is formed on the substrate and has a first region and a second region as source/drain regions thereof. A deep trench capacitor is formed adjacent to the transistor and has a first width. A shallow trench isolation is formed in a top portion of the deep trench capacitor and has a second width. The second width is substantially shorter than the first one. A third region is formed adjacent to the deep trench capacitor. A first contact is formed on the substrate and contacts with the first region. A second contact is formed on the substrate and contacts with the third region.
摘要翻译： DRAM阵列的测试结构包括基板。晶体管形成在衬底上并且具有第一区域和第二区域作为其源极/漏极区域。深沟槽电容器形成在与晶体管相邻并且具有第一宽度。浅沟槽隔离形成在深沟槽电容器的顶部，并且具有第二宽度。第二宽度基本上比第一宽度短。第三区域形成为与深沟槽电容器相邻。第一触点形成在基板上并与第一区域接触。第二触点形成在基板上并与第三区域接触。

60. 发明申请

US20050029672A1 Flip chip package structure 有权
标题翻译：倒装芯片封装结构
公开(公告)号：US20050029672A1
公开(公告)日：2005-02-10
申请号：US10899870
申请日：2004-07-27
申请人： Hung-Ta Hsu , Tzu-Bin Lin , Ya-Ling Huang
发明人： Hung-Ta Hsu , Tzu-Bin Lin , Ya-Ling Huang
IPC分类号： H01L23/13 , H01L23/36 , H01L23/42 , H01L23/02
CPC分类号： H01L23/42 , H01L23/13 , H01L23/36 , H01L2224/16 , H01L2224/73253 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/16195
摘要： A flip chip package structure includes a substrate, a chip, solder bumps, a heat sink, a thermal interface material (TIM), and solder balls. The substrate has an upper surface and a lower surface and further has a receiving area. The receiving area has a bottom in the substrate and an opening formed on the upper surface. Several solder bumps are disposed in the receiving area. The chip is disposed on the upper surface of the substrate, and covers the opening. The front surface of the chip is electrically coupled to the bottom via the solder bumps. The heat sink is attached to the upper surface of the substrate and the back surface of the chip through the adhesion of TIM. Several solder balls are disposed on the lower surface of the substrate.
摘要翻译：倒装芯片封装结构包括衬底，芯片，焊料凸块，散热器，热界面材料（TIM）和焊球。基板具有上表面和下表面，并且还具有接收区域。接收区域在基板中具有底部，并且在上表面上形成开口。在接收区域中设置几个焊料凸块。芯片设置在基板的上表面上并覆盖开口。芯片的前表面通过焊料凸块电耦合到底部。散热片通过粘附TIM连接到基板的上表面和芯片的背面。几个焊球设置在基板的下表面上。

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