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51. 发明授权

US06873049B2 Near hermetic power chip on board device and manufacturing method therefor 失效
标题翻译：封闭式密封电源芯片及其制造方法
公开(公告)号：US06873049B2
公开(公告)日：2005-03-29
申请号：US10630777
申请日：2003-07-31
申请人： Fong Shi
发明人： Fong Shi
IPC分类号： H01L23/00 , H01L23/057 , H01L23/08 , H01L23/31 , H01L29/40
CPC分类号： H01L23/3192 , H01L23/057 , H01L23/08 , H01L23/3121 , H01L23/564 , H01L24/45 , H01L24/48 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2924/01019 , H01L2924/01079 , H01L2924/12042 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Near-hermetic performance has been reported for power semiconductor devices having a silicon carbide layer deposited on the surface at the semiconductor wafer level. The P-COB device also includes a conformal coating on the silicon carbide layer, which extends the expected lifetime of the P-COB device longer than those devices active coatings.
摘要翻译：已经报道了在半导体晶片级的表面上沉积有碳化硅层的功率半导体器件的近气密性能。 P-COB设备还包括碳化硅层上的保形涂层，其延长了P-COB器件的预期寿命比那些器件活性涂层更长。

52. 发明授权

US6160218A Chip housing 失效
标题翻译：芯片外壳
公开(公告)号：US6160218A
公开(公告)日：2000-12-12
申请号：US894604
申请日：1997-10-06
申请人： Ghassem Azdasht , Elke Zakel , Herbert Reichl
发明人： Ghassem Azdasht , Elke Zakel , Herbert Reichl
IPC分类号： H01L23/02 , B23K26/18 , H01L23/057 , H01L23/08 , H01L25/10 , H05K5/06
CPC分类号： H01L23/057 , B23K26/009 , B23K26/18 , H01L25/105 , H01L2224/50 , H01L2225/1005 , H01L2225/1023 , H01L2225/1076 , H01L2924/01079
摘要： A housing to accept at least one electronic component, e.g., a chip with a cover and an opposing cover. The cover and opposing cover are formed to surround the component. On the inner surface of the cover and the opposing cover, there are conductive paths arranged such that the paths on the cover connect terminal areas of the component to the paths on the opposing cover and the paths on the opposing cover open into external terminals of the housing. The cover and/or the opposing cover is/are flexible and are suitable to be interconnected with surrounding sub-housings.
摘要翻译： PCT No.PCT / DE96 / 00058 Sec。 371日期：1997年10月6日 102（e）日期1997年10月6日PCT 1996年1月12日PCT PCT。公开号WO96 / 24162 日期1996年8月8日一种用于接受至少一个电子部件的壳体，例如具有盖和相对盖的芯片。盖和相对的盖形成为围绕部件。在盖的内表面和相对的盖上，导电路径被布置成使得盖上的路径将部件的端部区域连接到相对的盖上的路径上，并且相对的盖上的路径打开到外部端子住房。盖和/或相对的盖是柔性的并且适于与周围的子壳互连。

53. 发明授权

US6100583A Semiconductor device containing semiconductor element in package 失效
标题翻译：包含半导体元件的半导体器件
公开(公告)号：US6100583A
公开(公告)日：2000-08-08
申请号：US256360
申请日：1999-02-24
申请人： Makoto Ohmori
发明人： Makoto Ohmori
IPC分类号： H01L27/14 , H01L23/02 , H01L23/08 , H01L31/0203 , H01L23/053 , H01L23/12 , H01L23/48 , H05K7/20
CPC分类号： H01L31/0203 , H01L2224/48091
摘要： A semiconductor element such as a CCD chip is contained in a recess portion of an opaque package made of plastic, and the upper surface thereof is covered with a transparent cap made of plastic. The cap has a different thermal expansion coefficient from that of the package and is formed in a thickness of 0.5 mm which is thinner than that of the prior art. The semiconductor element is connected with leads and these leads project outside the package. This semiconductor device is mounted to a printed circuit board.
摘要翻译：诸如CCD芯片的半导体元件容纳在由塑料制成的不透明封装的凹部中，并且其上表面覆盖有由塑料制成的透明盖。盖具有与封装不同的热膨胀系数，并且形成为比现有技术薄的0.5mm的厚度。半导体元件与引线连接，这些引线在封装外部突出。该半导体器件安装在印刷电路板上。

54. 发明授权

US5977625A Semiconductor package with low strain seal 失效
标题翻译：具有低应变密封的半导体封装
公开(公告)号：US5977625A
公开(公告)日：1999-11-02
申请号：US820397
申请日：1997-03-12
申请人： David Linn Edwards , Raed A. Sherif , Hilton T. Toy , Shaji Farooq , Patrick Anthony Coico
发明人： David Linn Edwards , Raed A. Sherif , Hilton T. Toy , Shaji Farooq , Patrick Anthony Coico
IPC分类号： H01L23/02 , H01L23/04 , H01L23/06 , H01L23/08 , H01L23/10 , H01L23/12
CPC分类号： H01L23/10 , H01L23/04 , H01L2924/0002 , H01L2924/09701
摘要： A semi-conductor packaging structure and a method to reduce the seal strain of the package are disclosed. The structure comprises a cap, substrate, seal and the cap and substrate have a predetermined TCE mismatch. The TCE mismatch between the cap and substrate is predetermined to minimize the seal strain during power-on and power-off use conditions. Preferably, the device has a substrate comprises a ceramic material, a cap with a thermal conductivity of at least about 100 W/m-K. A method of selecting a cap material is disclosed.
摘要翻译：公开了半导体封装结构和减小封装应变的方法。该结构包括帽，衬底，密封件，帽和衬底具有预定的TCE不匹配。盖和基板之间的TCE失配是预先确定的，以最小化上电和断电使用条件期间的密封应变。优选地，该装置具有包括陶瓷材料的基底，具有至少约100W / m-K的热导率的帽。公开了一种选择盖材料的方法。

55. 发明授权

US5952719A Metal ball grid electronic package having improved solder joint 失效
标题翻译：金属球栅电子封装具有改进的焊点
公开(公告)号：US5952719A
公开(公告)日：1999-09-14
申请号：US891446
申请日：1997-07-10
申请人： Peter W. Robinson , Deepak Mahulikar , Paul R. Hoffman
发明人： Peter W. Robinson , Deepak Mahulikar , Paul R. Hoffman
IPC分类号： H01L23/06 , H01L23/08 , H01L23/13 , H01L23/14 , H01L23/24 , H01L23/367 , H01L23/373 , H01L23/498 , H05K1/02 , H05K3/30 , H01L23/48
CPC分类号： H01L23/13 , H01L23/142 , H01L23/24 , H01L23/3675 , H01L23/3735 , H01L23/49816 , H01L24/32 , H05K3/305 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/1532 , H01L2924/181 , H05K1/0271 , H05K2201/10477 , H05K2201/10568 , H05K2201/10734 , H05K2201/2036 , Y02P70/613
摘要： The bending of a ball grid array electronic package having a metallic base is reduced minimizing stresses applied to the innermost row of solder balls when the package base is cyclically heated and cooled. Reducing the stresses applied to the solder balls increases the number of thermal cycles before solder ball fracture causes device failure. Among the means disclosed to reduce the bending moment are a bimetallic composite base, an integral stiffener, a centrally disposed cover bonded to an external structure and a package base with a stress accommodating depressed portion.
摘要翻译：当包装基底被循环加热和冷却时，具有金属基底的球栅阵列电子封装的弯曲减小了最小化施加到最内排焊球的应力。减少施加到焊球上的应力增加了焊球破裂导致装置故障之前的热循环次数。公开的用于减小弯矩的手段是双金属复合基座，整体加强件，结合到外部结构的中心布置的盖子和具有应力容纳凹陷部分的封装基座。

56. 发明授权

US5801068A Hermetically sealed microelectronic device and method of forming same 失效
公开(公告)号：US5801068A
公开(公告)日：1998-09-01
申请号：US745150
申请日：1996-11-07
申请人： Kathirgamasundaram Sooriakumar , Allen Henry Meitzler , Shaun Leaf McCarthy , Russell J. Haeberle
发明人： Kathirgamasundaram Sooriakumar , Allen Henry Meitzler , Shaun Leaf McCarthy , Russell J. Haeberle
IPC分类号： H01L21/50 , H01L23/08 , H01L21/00
CPC分类号： H01L23/08 , H01L21/50 , H01L2224/48091 , H01L2224/48247 , H01L2924/01079
摘要： A microelectronic device is hermetically sealed at the wafer level. A substrate is provided having associated electronics and at least one metal bonding pad. A dielectric layer, such as pyrex glass film, is sputter deposited atop the substrate to form a glass/metal seal. A glass film is thereafter planarized, preferably by chemical-mechanical polishing, to remove surface variations. A cover wafer is thereafter anodically bonded to the dielectric layer/glass film so as to define a sealed cavity for housing and protecting the substrate electronics. The resultant microelectronic device is packaged in its own hermetically sealed container at the wafer level.

57. 发明授权

US5757075A Semiconductor heat sink apparatus 失效
标题翻译：半导体散热器
公开(公告)号：US5757075A
公开(公告)日：1998-05-26
申请号：US630582
申请日：1996-04-11
申请人： Kouki Kitaoka
发明人： Kouki Kitaoka
IPC分类号： H01L23/34 , H01L23/057 , H01L23/08 , H01L23/367 , H01L23/50 , H01L23/495
CPC分类号： H01L23/367 , H01L23/057 , H01L2224/05554 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L24/45 , H01L24/48 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15153 , H01L2924/15165 , H01L2924/16195
摘要： A semiconductor apparatus includes a semiconductor chip having an upper surface, a lower surface and at least one side surface; a first radiator plate for radiating heat including a plate portion having an upper surface, a lower surface and at least one side surface and a body portion having an upper surface, a lower surface and at least one side surface. The upper surface of the body portion has an area smaller than an area of the lower surface of the plate portion and is connected with the lower surface of the plate portion. The semiconductor apparatus also includes a second radiator plate for radiating heat including an upper surface, a lower surface and at least one side surface. The upper surface of the second radiator plate has an area larger than the lower surface of the body portion of the first radiator plate. The apparatus still further includes a case body surrounding the lower surface and the side surface of the semiconductor chip and a cover which is located above the upper surface of the semiconductor chip and is connected with the case body. This structure provides a semiconductor apparatus incorporating a semiconductor device mounted in a hollow plastic package having a radiator system, without deteriorating the mechanical strength and the moisture resistance of the package.
摘要翻译：半导体装置包括具有上表面，下表面和至少一个侧表面的半导体芯片; 包括具有上表面，下表面和至少一个侧表面的板部分和具有上表面，下表面和至少一个侧表面的主体部分的第一散热板。主体部的上表面的面积比板部的下表面的面积小，与板部的下表面连接。半导体装置还包括用于散热的第二散热板，包括上表面，下表面和至少一个侧表面。第二散热板的上表面的面积大于第一散热板的主体部的下表面。该装置还包括围绕半导体芯片的下表面和侧表面的壳体和位于半导体芯片的上表面上方并与壳体连接的盖。该结构提供了一种半导体装置，其包括安装在具有散热器系统的中空塑料封装中的半导体器件，而不会降低封装的机械强度和耐湿性。

58. 发明授权

US5654243A Process for fabricating a semiconductor device in a resin package housed in a frame having high conductivity 失效
标题翻译：用于在容纳在具有高导热性的框架中的树脂封装中制造半导体器件的工艺
公开(公告)号：US5654243A
公开(公告)日：1997-08-05
申请号：US696598
申请日：1996-08-14
申请人： Yoshiyuki Yoneda , Kazuto Tsuji
发明人： Yoshiyuki Yoneda , Kazuto Tsuji
IPC分类号： H01L23/28 , H01L23/08 , H01L23/12 , H01L23/24 , H01L23/31 , H01L23/367 , H01L23/433 , H01L23/498 , H05K1/02 , H05K3/30 , H05K3/34 , H01L21/60
CPC分类号： H01L23/24 , H01L23/3128 , H01L23/367 , H01L23/4334 , H01L23/49816 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/73265 , H01L24/48 , H01L2924/00014 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H05K1/0201 , H05K3/303 , H05K3/3431 , Y10T29/49144 , Y10T29/49146
摘要： A semiconductor device including a substrate, solder bumps provided on a lower major surface of the substrate, a semiconductor chip provided on an upper major surface of the substrate, a resin package body provided on the upper major surface of the substrate so as to bury the semiconductor chip therein, a thermally conductive frame member having a flange part supporting the substrate of a rim part of the substrate, wherein the thermal conductive frame member has a thermal conductivity substantially larger than that of the resin package body and extending along to and in an intimate contact with side walls of the resin package body.
摘要翻译：一种半导体器件，包括衬底，设置在衬底的下主表面上的焊料凸块，设置在衬底的上主表面上的半导体芯片，设置在衬底的上主表面上的树脂封装体，以便将衬底半导体芯片，导热框架构件，其具有支撑衬底的边缘部分的衬底的凸缘部分，其中导热框架构件的热导率基本上大于树脂封装主体的导热系数，并且延伸到与树脂封装体的侧壁紧密接触。

59. 发明授权

US5589724A Piezoelectric device and a package 失效
标题翻译：压电器件和封装
公开(公告)号：US5589724A
公开(公告)日：1996-12-31
申请号：US350717
申请日：1994-12-07
申请人： Yuki Satoh , Toshio Ishizaki , Tsuyoshi Sakaue , Koji Hashimoto , Tohru Yamada , Tomoki Uwano
发明人： Yuki Satoh , Toshio Ishizaki , Tsuyoshi Sakaue , Koji Hashimoto , Tohru Yamada , Tomoki Uwano
IPC分类号： H01C1/02 , H01L23/08 , H01L41/053 , H03H3/007 , H03H9/02 , H03H9/05 , H03H9/10 , H03H9/13 , H03H9/17 , H03H9/25 , H03H9/56 , H05K5/06 , H01L41/08
CPC分类号： H03H9/1071 , H03H9/1035
摘要： A piezoelectric device includes a piezoelectric plate provided with at least one electrode at almost a central portion of each face; a first plate made of an ionic material having a recessed portion to cover the at least one electrode at one face to face the piezoelectric plate; and a second plate made of an ionic material having a recessed portion to cover the at least one electrode at one face to face the piezoelectric plate. Each of the at least one electrode is packaged by direct bonding the piezoelectric plate with the first plate and the second plate so as to be sandwiched therebetween. A package includes a body member made of an ionic material provided with a recessed portion or an opening, having a flat face around the recessed portion or the opening; and a covering member made of an ionic material having a flat face to cover the body member. The flat face of the body member and the flat face of the covering member are cleaned and attached to each other so as to be direct bonded with each other using hydrogen bonds generated between the ionic materials, thereby packaging the recessed portion or the opening.
摘要翻译：压电装置包括在每个面的几乎中心部分设置有至少一个电极的压电板; 由离子材料制成的第一板，具有在一个面上覆盖所述至少一个电极的凹部以面对所述压电板; 以及由具有凹部的离子材料制成的第二板，以在一个面上覆盖所述至少一个电极以面对所述压电板。通过将压电板与第一板和第二板直接接合以夹在它们之间来封装至少一个电极中的每一个。一种包装体，包括由设置有凹部或开口的离子性材料制成的本体部件，该凹部或开口具有围绕凹部或开口的平坦面; 以及由具有平坦面的离子材料制成的覆盖部件，以覆盖主体部件。本体构件的平面和覆盖构件的平面被清洁并彼此附接，以便使用在离子材料之间产生的氢键彼此直接接合，从而封装凹部或开口。

60. 发明授权

US5561265A Integrated circuit packaging 失效
标题翻译：集成电路封装
公开(公告)号：US5561265A
公开(公告)日：1996-10-01
申请号：US318063
申请日：1994-10-04
申请人： Boris I. Livshits , Kevin E. Harpell
发明人： Boris I. Livshits , Kevin E. Harpell
IPC分类号： H01L23/02 , H01L23/06 , H01L23/08 , H01L23/552 , H05K9/00
CPC分类号： H01L23/552 , H01L23/08 , H01L2224/05554 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/4823 , H01L2224/48471 , H01L24/48 , H01L2924/00014 , H01L2924/01019 , H01L2924/01025 , H01L2924/14 , H01L2924/1433 , H01L2924/15312 , H01L2924/16152 , H01L2924/1617 , H01L2924/19041 , H01L2924/3011 , H01L2924/3025
摘要： A package is provided for an integrated circuit comprising a dielectric body enclosing the integrated circuit chip having a plurality of conductive terminal members extend through the dielectric body. The dielectric body includes a magnetic shielding layer for shielding electromagnetic radiation from the integrated circuit. The magnetic shielding layer comprises a material having a high magnetic permeability and a high resistivity, so that the dielectric body absorbs electromagnetic radiation at frequencies generated by the integrated circuit and thereby attenuates electromagnetic emissions from the integrated circuit. Suitable materials having a high dielectric constant and high magnetic permeability include ferrites. Conveniently a shielding layer of ferrimagnetic material comprising a ferrite plate may be applied to surfaces of a conventional plastic or ceramic packaging material. Alternatively, ferrite particles may be incorporated into binder to form a composite material suitable for forming into an IC package. The magnetic nature of the shielding provides that a non-conductive dielectric package may significantly attenuate and suppress electromagnetic interference generated by an enclosed IC. Further to provide effective electromagnetic shielding for a large apparatus, individual packages may be customized to provided shielding to particular integrated circuit chips with higher emissions, thereby reducing the total cost of shielding an electronic system or apparatus.
摘要翻译：提供了一种用于集成电路的封装，该集成电路包括封装所述集成电路芯片的绝缘体，所述集成电路芯片具有延伸穿过所述电介质体的多个导电端子构件。电介质体包括用于屏蔽来自集成电路的电磁辐射的磁屏蔽层。磁屏蔽层包括具有高导磁率和高电阻率的材料，使得电介质体以由集成电路产生的频率吸收电磁辐射，从而衰减来自集成电路的电磁辐射。具有高介电常数和高磁导率的合适材料包括铁氧体。方便的是，可以将包含铁素体板的铁氧体材料的屏蔽层施加到常规塑料或陶瓷包装材料的表面。或者，铁氧体颗粒可以结合到粘合剂中以形成适于形成IC封装的复合材料。屏蔽的磁性提供非导电电介质封装可以显着衰减和抑制封闭式IC产生的电磁干扰。为了为大型设备提供有效的电磁屏蔽，可以定制各个封装以对具有更高发射的特定集成电路芯片提供屏蔽，从而降低屏蔽电子系统或设备的总成本。

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