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    • 52. 发明授权
    • Low power, high speed multi-channel data acquisition system and method
    • 低功耗,高速多通道数据采集系统及方法
    • US08411707B2
    • 2013-04-02
    • US12587439
    • 2009-10-07
    • Johnnie F. MolinaHugo Cheung
    • Johnnie F. MolinaHugo Cheung
    • H04J3/02
    • H03M1/0872H03M1/1225H03M1/468
    • In a data acquisition system, digitizing circuitry (2A) is powered up by a control signal (ADC_CONVST), superimposing a glitch (42-1) on a first multiplexed and amplified signal value (VINF) received by the digitizing circuitry. Sampling and holding of the first multiplexed and amplified signal value occurs during a delay provided between the glitch and a beginning of a first A/D conversion of the first multiplexed and amplified signal value to allow settling of the glitch. After the first conversion begins, a second multiplexed and amplified signal value is generated. The digitizing circuitry performs the first A/D conversion during initial settling of the second multiplexed and amplified signal value and then is powered down while the second multiplexed and amplified signal value continues to settle.
    • 在数据采集系统中,数字化电路(2A)由控制信号(ADC_CONVST)供电,在由数字化电路接收的第一多路复用和放大信号值(VINF)上叠加毛刺(42-1)。 第一复用和放大信号值的采样和保持在提供在毛刺之间的延迟和第一多路复用和放大信号值的第一A / D转换开始之间发生延迟以允许毛刺的稳定发生。 在第一次转换开始之后,产生第二个复用和放大的信号值。 数字化电路在第二多路复用和放大信号值的初始建立期间执行第一A / D转换,然后在第二多路复用和放大的信号值继续稳定时断电。