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    • 61. 发明申请
    • SENSORLESS MOTOR APPARATUS, BACK EMF DETECTOR AND DETECTION METHOD THEREOF
    • 无感电动机装置,反电动势检测装置及其检测方法
    • US20140035500A1
    • 2014-02-06
    • US13563701
    • 2012-07-31
    • Yi-Chi LinChih-Ping YinShih-Jen Yang
    • Yi-Chi LinChih-Ping YinShih-Jen Yang
    • H02P6/18
    • H02P6/085H02P6/182
    • A back electromotive force (EMF) detector for a motor is disclosed. The back EMF detector includes an upper switch, a lower switch, a current sensing resistor and a first to third resistance providers. The upper and lower switches are controlled by a first and a second control signal respectively. The current sensing resistor coupled between the lower switch and a reference ground voltage. A first terminal of the first resistance provider coupled to the upper switch, and a back EMF detection result is generated at a second terminal of the first resistance provider. The second resistance provider coupled between the reference ground voltage and the first resistance provider. The third resistance provider is coupled between the coupled terminal of the first and second resistance provider and the lower switch. Wherein, the first to the third resistance providers are determined by at least one characteristic parameter of the motor.
    • 公开了一种用于电动机的反电动势(EMF)检测器。 反电动势检测器包括上开关,下开关,电流感测电阻器和第一至第三电阻提供器。 上下开关分别由第一和第二控制信号控制。 电流检测电阻耦合在下开关和参考接地电压之间。 耦合到上部开关的第一电阻提供器的第一端子和在第一电阻提供器的第二端子处产生反电动势检测结果。 第二电阻提供器耦合在参考地电压和第一电阻提供器之间。 第三电阻提供器耦合在第一和第二电阻提供器的耦合端与下开关之间。 其中,第一至第三阻力提供者由电动机的至少一个特征参数决定。
    • 64. 发明授权
    • Adaptive synchronous rectification control method and apparatus
    • 自适应同步整流控制方法及装置
    • US08542507B2
    • 2013-09-24
    • US13069534
    • 2011-03-23
    • Jhih-Da HsuChia-Yo YehChou-Sheng WangYing-Chieh SuRui-Hong Lu
    • Jhih-Da HsuChia-Yo YehChou-Sheng WangYing-Chieh SuRui-Hong Lu
    • H02H7/125H02M3/335
    • H02M3/33592Y02B70/1475
    • An adaptive synchronous rectification control circuit and a control method are developed. The control circuit comprises an adaptive circuit that generates a reference signal in response to a detection signal of a power converter. A clamped circuit clamps the reference signal at a threshold voltage if the reference signal equals or is greater than the threshold voltage. A switching circuit generates a control signal to control a synchronous switch of the power converter in response to the detection signal and the reference signal. The control method generates the reference signal in response to the detection signal. The reference signal is clamped at the threshold voltage if the reference signal equals or is greater than the threshold voltage. The method further generates the control signal to control the synchronous switch of the power converter in response to the detection signal and the reference signal.
    • 开发了自适应同步整流控制电路和控制方法。 控制电路包括响应于功率转换器的检测信号产生参考信号的自适应电路。 如果参考信号等于或大于阈值电压,钳位电路将参考信号钳位在阈值电压。 切换电路响应于检测信号和参考信号产生控制信号以控制功率转换器的同步开关。 控制方法响应于检测信号产生参考信号。 如果参考信号等于或大于阈值电压,则参考信号被钳位在阈值电压。 该方法还响应于检测信号和参考信号产生控制信号以控制功率转换器的同步开关。
    • 65. 发明授权
    • High side semiconductor structure
    • 高边半导体结构
    • US08492849B2
    • 2013-07-23
    • US12832727
    • 2010-07-08
    • Han-Chung TaiHsin-Chih Chiang
    • Han-Chung TaiHsin-Chih Chiang
    • H01L31/119H01L21/336
    • H01L21/823892H01L27/088H01L27/0928H01L29/1083
    • A high side semiconductor structure is provided. The high side semiconductor structure includes a substrate, a first deep well, a second deep well, a first active element, a second active element and a doped well. The first deep well and the second deep well are formed in the substrate, wherein the first deep well and the second deep well have identical type of ion doping. The first active element and the second active element are respectively formed in the first deep well and the second deep well. The doped well is formed in the substrate and is disposed between the first deep well and the second deep well. The doped well, the first deep well and the second deep well are interspaced, and the type of ion doping of the first deep well and the second deep well is complementary with that of the doped well.
    • 提供了高边半导体结构。 高侧半导体结构包括衬底,第一深阱,第二深阱,第一有源元件,第二有源元件和掺杂阱。 在衬底中形成第一深阱和第二深阱,其中第一深阱和第二深阱具有相同类型的离子掺杂。 第一有源元件和第二有源元件分别形成在第一深阱和第二深阱中。 掺杂阱形成在衬底中并且设置在第一深阱和第二深阱之间。 掺杂阱,第一深阱和第二深阱是间隔的,第一深阱和第二深阱的离子掺杂类型与掺杂阱的离子掺杂类型互补。
    • 67. 发明申请
    • CONTROL CIRCUIT FOR CONTROLLING THE MAXIMUM OUTPUT CURRENT OF POWER CONVERTER AND METHOD THEREOF
    • 用于控制功率转换器的最大输出电流的控制电路及其方法
    • US20130063986A1
    • 2013-03-14
    • US13611091
    • 2012-09-12
    • TA-YUNG YANGLI LINYUE-HONG TANGJUNG-SHENG CHEN
    • TA-YUNG YANGLI LINYUE-HONG TANGJUNG-SHENG CHEN
    • H02M3/335
    • H02M3/33507H02M2001/0003
    • A control circuit of the power converter according to the present invention comprises a feedback circuit, an output circuit and an adaptive clamping circuit. The feedback circuit generates a feedback signal in accordance with an output of the power converter. The output circuit generates a switching signal in accordance with the feedback signal for regulating the output of the power converter. The adaptive clamping circuit limits the level of the feedback signal under a first level for a first load condition. The feedback circuit determines a slew rate of the feedback signal for increasing the level of the feedback signal from the first level to a second level. The adaptive clamping circuit is disabled and the level of the feedback signal can be increased to the second level for a second load condition.
    • 根据本发明的功率转换器的控制电路包括反馈电路,输出电路和自适应钳位电路。 反馈电路根据功率转换器的输出产生反馈信号。 输出电路根据用于调节功率转换器的输出的反馈信号产生开关信号。 自适应钳位电路在第一负载条件下将反馈信号的电平限制在第一电平。 反馈电路确定用于将反馈信号的电平从第一电平增加到第二电平的反馈信号的转换速率。 自适应钳位电路被禁用,并且反馈信号的电平可以在第二负载条件下增加到第二电平。
    • 69. 发明申请
    • FEEDBACK CIRCUIT WITH REMOTE ON/OFF CONTROL FOR POWER SUPPLY
    • 具有远程开/关控制电源的反馈电路
    • US20120170321A1
    • 2012-07-05
    • US13293248
    • 2011-11-10
    • TA-YUNG YANGCHIEN-TSUN HSU
    • TA-YUNG YANGCHIEN-TSUN HSU
    • H02M3/335
    • H02M3/33523H02M2001/0003
    • A feedback circuit of power supply according to the present invention comprises a switching controller, an optocoupler, an error amplifier and a timer. The switching controller generates a switching signal in accordance with a feedback signal for regulating an output voltage of the power supply. The optocoupler generates the feedback signal. The error amplifier is coupled to the output voltage of the power supply for generating an amplified signal. The amplified signal is connected to an input of the optocoupler. A remote on/off signal is further coupled to the input of the optocoupler. The timer generates a control signal to disable the switching signal in response to the feedback signal. The control signal is generated after a delay time when the feedback signal is lower than a threshold.
    • 根据本发明的电源的反馈电路包括开关控制器,光耦合器,误差放大器和定时器。 开关控制器根据用于调节电源的输出电压的反馈信号产生开关信号。 光耦合器产生反馈信号。 误差放大器耦合到电源的输出电压以产生放大的信号。 放大的信号连接到光耦合器的输入端。 远程开/关信号还耦合到光耦合器的输入端。 定时器响应于反馈信号产生控制信号以禁用开关信号。 控制信号在反馈信号低于阈值的延迟时间之后产生。
    • 70. 发明授权
    • Process for manufacturing voltage-controlled transistor
    • 制造压控晶体管的工艺
    • US08124466B2
    • 2012-02-28
    • US12132605
    • 2008-06-03
    • Chiu-Chih ChiangChih-Feng Huang
    • Chiu-Chih ChiangChih-Feng Huang
    • H01L21/336
    • H01L29/7816H01L29/0634H01L29/0878H01L29/0886H01L29/42368H01L29/861
    • The present invention provides a self-driven LDMOS which utilizes a parasitic resistor between a drain terminal and an auxiliary region. The parasitic resistor is formed between two depletion boundaries in a quasi-linked deep N-type well. When the two depletion boundaries pinch off, a gate-voltage potential at a gate terminal is clipped at a drain-voltage potential at said drain terminal. Since the gate-voltage potential is designed to be equal to or higher than a start-threshold voltage, the LDMOS is turned on accordingly. Besides, no additional die space and masking process are needed to manufacture the parasitic resistor. Furthermore, the parasitic resistor of the present invention does not lower the breakdown voltage and the operating speed of the LDMOS. In addition, when the two depletion boundaries pinch off, the gate-voltage potential does not vary in response to an increment of the drain-voltage potential.
    • 本发明提供一种利用漏极端子和辅助区域之间的寄生电阻器的自驱动LDMOS。 寄生电阻形成在准连接深N型阱中的两个耗尽边界之间。 当两个耗尽边界夹闭时,栅极端子处的栅极电压电位在所述漏极端子处的漏极电压电位处被钳位。 由于栅极电压电位被设计为等于或高于启动阈值电压,所以LDMOS被相应地导通。 此外,不需要额外的管芯空间和掩模工艺来制造寄生电阻器。 此外,本发明的寄生电阻器不降低LDMOS的击穿电压和操作速度。 此外,当两个耗尽边界夹断时,栅极电压电位不随着漏极 - 电压电位的增加而变化。