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61. 发明授权

US09350358B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09350358B2
公开(公告)日：2016-05-24
申请号：US14635257
申请日：2015-03-02
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Yuki Okamoto , Yoshiyuki Kurokawa
IPC分类号： H03K19/173 , H03K19/177
CPC分类号： H03K19/1776
摘要： Provided is a semiconductor device where a signal-transmission speed. The semiconductor device comprises a first logic element, a first switch electrically connected to the first logic element, and a second logic element electrically connected to the first switch. The first logic element includes at least a second switch, and the second switch has a function of setting an output potential from the first logic element to a L level. The first logic element may include a memory electrically connected to a register. The memory has a function of holding data of the register, and the register has a function of setting an output potential to a L level after holding the data in the memory.
摘要翻译：提供了一种信号传输速度的半导体器件。半导体器件包括第一逻辑元件，电连接到第一逻辑元件的第一开关和与第一开关电连接的第二逻辑元件。第一逻辑元件包括至少第二开关，并且第二开关具有将来自第一逻辑元件的输出电位设置为L电平的功能。第一逻辑元件可以包括电连接到寄存器的存储器。存储器具有保持寄存器的数据的功能，并且该寄存器具有在将数据保存在存储器中之后将输出电位设置为L电平的功能。

62. 发明授权

US09344037B2 Oscillator circuit and semiconductor device including the same 有权
标题翻译：振荡器电路和包括其的半导体器件
公开(公告)号：US09344037B2
公开(公告)日：2016-05-17
申请号：US14801289
申请日：2015-07-16
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Yuki Okamoto , Yoshiyuki Kurokawa
IPC分类号： H03K3/03 , H03B5/24
CPC分类号： H03L7/0995 , H01L27/1207 , H01L27/1225 , H01L27/1255 , H01L29/7869 , H03B5/24 , H03K3/0315 , H03L7/093 , H03L2207/06
摘要： Controllability of an oscillator circuit is improved. The oscillator circuit has inverters in odd-numbered stages. A circuit is electrically connected to a power supply node of the inverters to which a high power supply potential is input. The circuit includes a first transistor, a second transistor, and a capacitor. The first transistor includes an oxide semiconductor in its channel. A holding circuit including the first transistor and the capacitor has a function of holding an analog potential that is input from the outside. The potential held by the holding circuit is input to a gate of the second transistor. A power supply potential is supplied to the inverters through the second transistor, so that the delay time of the inverter can be controlled by the potential of the gate of the second transistor.
摘要翻译：提高了振荡电路的可控性。振荡器电路具有奇数级的反相器。电路电连接到输入高电源电位的逆变器的电源节点。电路包括第一晶体管，第二晶体管和电容器。第一晶体管在其沟道中包括氧化物半导体。包括第一晶体管和电容器的保持电路具有保持从外部输入的模拟电位的功能。由保持电路保持的电位被输入到第二晶体管的栅极。通过第二晶体管向逆变器提供电源电位，从而可以通过第二晶体管的栅极的电位来控制逆变器的延迟时间。

63. 发明授权

US09172369B2 Programmable logic device and semiconductor device 有权
标题翻译：可编程逻辑器件和半导体器件
公开(公告)号：US09172369B2
公开(公告)日：2015-10-27
申请号：US14276004
申请日：2014-05-13
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Yuki Okamoto , Yoshiyuki Kurokawa
IPC分类号： H03K19/00 , H03K19/177
CPC分类号： H03K19/0008 , H03K19/177
摘要： A programmable logic device having low power consumption with operation speed maintained is provided. The programmable logic device includes a first circuit; a second circuit; a first transistor making electrical connection between the first circuit and the second circuit depending on a potential of a gate of the first transistor; a first switch configured to control supply of a signal to a first node; a second switch configured to control supply of the signal to a second node; a second transistor having a gate and one of a source and a drain that are electrically connected to the first node and having the other of the source and the drain that is electrically connected to the second node; and a capacitor that holds a potential of the signal supplied to the first node.
摘要翻译：提供了一种具有低功耗且可维持运行速度的可编程逻辑器件。可编程逻辑器件包括第一电路; 第二电路; 第一晶体管，根据第一晶体管的栅极的电位，在第一电路和第二电路之间进行电连接; 第一开关，被配置为控制向第一节点提供信号; 第二开关，被配置为控制向第二节点提供信号; 第二晶体管，其具有电连接到第一节点并使源极和漏极中的另一个电连接到第二节点的栅极和源极和漏极之一; 以及保持提供给第一节点的信号的电位的电容器。

64. 发明申请

US20150301636A1 Display Device and Operation Method Thereof 有权
标题翻译：显示设备及其操作方法
公开(公告)号：US20150301636A1
公开(公告)日：2015-10-22
申请号：US14686109
申请日：2015-04-14
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Kengo Akimoto , Hironobu Takahashi , Yuki Okamoto , Isamu Shigemori
IPC分类号： G06F3/041
CPC分类号： G06F3/044 , G06F3/0418 , G06F2203/04102 , G06F2203/04103 , G09G3/3233 , G09G3/3648 , G09G2320/029 , G09G2330/12 , G09G2380/02 , H01L27/3225 , H01L27/323 , H01L27/3262 , H01L2251/5338
摘要： A flexible display device with high viewability is provided. The display device includes a first substrate, a second substrate, a first element layer, and a second element layer. The first element layer is positioned between the first substrate and the second substrate. The second element layer is positioned between the first substrate and the second substrate. The first element layer and the second element layer overlap with each other in a region. The first substrate and the second substrate have flexibility. The first element layer includes a display element and a first circuit. The display element is electrically connected to the first circuit. The second element layer includes a sensor element. The sensor element has a function of sensing distortion.
摘要翻译：提供了具有高可视性的柔性显示装置。显示装置包括第一基板，第二基板，第一元件层和第二元件层。第一元件层位于第一基板和第二基板之间。第二元件层位于第一基板和第二基板之间。第一元件层和第二元件层在一个区域中彼此重叠。第一基板和第二基板具有柔性。第一元件层包括显示元件和第一电路。显示元件电连接到第一电路。第二元件层包括传感器元件。传感器元件具有检测失真的功能。

65. 发明授权

US09112460B2 Signal processing device 有权
标题翻译：信号处理装置
公开(公告)号：US09112460B2
公开(公告)日：2015-08-18
申请号：US14224553
申请日：2014-03-25
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Yuki Okamoto , Takayuki Ikeda , Yoshiyuki Kurokawa , Yasuhiko Takemura
IPC分类号： H03K3/00 , H03F3/45 , H03K19/0185 , H03F1/22
CPC分类号： H03F3/45076 , H03F1/223 , H03F3/45179 , H03F3/45183 , H03F3/45237 , H03F2203/45394 , H03F2203/45518 , H03F2203/45674 , H03K19/018528
摘要： A level shifter converting a binary signal having a first potential and a second potential into a signal having the first potential and a third potential, and a signal processing circuit using the level shifter are provided. The first potential is higher than the second potential. The second potential is higher than the third potential. The potential difference between the first potential and the third potential may be more than or equal to 3 V and less than 4 V. The level shifter includes a current control circuit which generates a second signal for operating an amplifier circuit for a certain period in accordance with the potential change of the first signal which is input to the amplifier circuit. The output of level shifter is input to a gate of an N-channel transistor whose threshold voltage is lower than 0 V.
摘要翻译：电平移位器将具有第一电位和第二电位的二进制信号转换为具有第一电位和第三电位的信号，以及使用电平转换器的信号处理电路。第一个潜力高于第二个潜力。第二个潜力高于第三个潜力。第一电位和第三电位之间的电位差可以大于或等于3V且小于4V。电平移位器包括电流控制电路，其产生用于按照一定时间操作放大器电路的第二信号其中输入到放大器电路的第一信号的电位变化。电平移位器的输出输入到阈值电压低于0V的N沟道晶体管的栅极。

66. 发明申请

US20140340116A1 PROGRAMMABLE LOGIC DEVICE AND SEMICONDUCTOR DEVICE 有权
标题翻译：可编程逻辑器件和半导体器件
公开(公告)号：US20140340116A1
公开(公告)日：2014-11-20
申请号：US14276004
申请日：2014-05-13
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Yuki Okamoto , Yoshiyuki Kurokawa
IPC分类号： H03K19/00
CPC分类号： H03K19/0008 , H03K19/177
摘要： A programmable logic device having low power consumption with operation speed maintained is provided. The programmable logic device includes a first circuit; a second circuit; a first transistor making electrical connection between the first circuit and the second circuit depending on a potential of a gate of the first transistor; a first switch configured to control supply of a signal to a first node; a second switch configured to control supply of the signal to a second node; a second transistor having a gate and one of a source and a drain that are electrically connected to the first node and having the other of the source and the drain that is electrically connected to the second node; and a capacitor that holds a potential of the signal supplied to the first node.
摘要翻译：提供了一种具有低功耗且可维持运行速度的可编程逻辑器件。可编程逻辑器件包括第一电路; 第二电路; 第一晶体管，根据第一晶体管的栅极的电位，在第一电路和第二电路之间进行电连接; 第一开关，被配置为控制向第一节点提供信号; 第二开关，被配置为控制向第二节点提供信号; 第二晶体管，其具有电连接到第一节点并使源极和漏极中的另一个电连接到第二节点的栅极和源极和漏极之一; 以及保持提供给第一节点的信号的电位的电容器。

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