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61. 发明授权

US09286843B2 Display apparatus and method of driving the same 有权
标题翻译：显示装置及其驱动方法
公开(公告)号：US09286843B2
公开(公告)日：2016-03-15
申请号：US13925593
申请日：2013-06-24
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： Yongjun Jang , Nam-Gon Choi , Geunjeong Park , Hyundae Lee , Cheolwoo Park , Jeong-hun So , Bonghyun You , Yun Ki Baek , Kyoung Ho Lim
IPC分类号： G09G3/36 , G09G5/36 , G09G5/39 , G09G3/20
CPC分类号： G09G3/3648 , G09G3/20 , G09G5/363 , G09G2300/0426 , G09G2330/028 , G09G2360/12
摘要： A display apparatus includes pixels connected to gate lines and data lines, a gate driver configure to drive the gate lines, a data driver including a plurality of data driving parts configured to drive the data lines. The control board includes a processor that outputs an image signal and a control signal and a timing controller that outputs a first control signal to control the gate driver and a second control signal and a data signal to control the data driver in response to the image signal and the control signal.
摘要翻译：显示装置包括连接到栅极线和数据线的像素，配置为驱动栅极线的栅极驱动器，包括被配置为驱动数据线的多个数据驱动部分的数据驱动器。控制板包括输出图像信号和控制信号的处理器和输出第一控制信号以控制栅极驱动器的定时控制器，以及响应于图像信号的第二控制信号和数据信号来控制数据驱动器和控制信号。

62. 发明授权

US09251555B2 Tiled viewport composition 有权
标题翻译：平铺视口组成
公开(公告)号：US09251555B2
公开(公告)日：2016-02-02
申请号：US13492052
申请日：2012-06-08
申请人： Etienne Belanger
发明人： Etienne Belanger
IPC分类号： G09G5/39 , G06T1/60 , G09G5/14 , G09G5/399
CPC分类号： G06T1/60 , G09G5/14 , G09G5/39 , G09G5/399 , G09G2360/122 , G09G2360/125
摘要： A system that buffers an application image reduces bandwidth requirements for accessing memory. The application image may be logically separated into tiles. A viewport may identify a visible portion of the application image, where the visible portion is smaller than the application image. The tiles overlapped by the viewport may be buffered in a front buffer and a back buffer. The tiles not overlapped by the viewport may be buffered in the back buffer but not in the front buffer. A composition manager, with knowledge of the viewport and at least two noncontiguous tile buffers in the front buffer, may extract the visible portion of the application image directly from the noncontiguous tile buffers.
摘要翻译：缓冲应用程序映像的系统降低了访问内存的带宽需求。应用程序图像可以在逻辑上分隔成图块。视口可以识别应用图像的可见部分，其中可见部分小于应用图像。由视口重叠的瓦片可以缓冲在前缓冲器和后缓冲器中。不与视口重叠的瓦片可以缓冲在后缓冲区中，但不能在前缓冲区中缓冲。具有视口的知识和前缓冲器中的至少两个不连续的片缓冲器的构图管理器可以直接从非连续的片缓冲器提取应用图像的可见部分。

63. 发明授权

US09245496B2 Multi-mode memory access techniques for performing graphics processing unit-based memory transfer operations 有权
标题翻译：用于执行图形处理单元的存储器传送操作的多模式存储器存取技术
公开(公告)号：US09245496B2
公开(公告)日：2016-01-26
申请号：US13725393
申请日：2012-12-21
申请人： QUALCOMM Incorporated
发明人： Andrew E. Gruber , Tao Wang , Shambhoo Khandelwal
IPC分类号： G09G5/39 , G09G5/36 , G06F12/06 , G09G5/393 , G09G5/395 , G06F12/08
CPC分类号： G09G5/363 , G06F12/0607 , G06F12/0875 , G06F2212/1021 , G06F2212/455 , G06F2212/601 , G09G5/393 , G09G5/395
摘要： This disclosure describes techniques for performing memory transfer operations with a graphics processing unit (GPU) based on a selectable memory transfer mode, and techniques for selecting a memory transfer mode for performing all or part of a memory transfer operation with a GPU. In some examples, the techniques of this disclosure may include selecting a memory transfer mode for performing at least part of a memory transfer operation, and performing, with a GPU, the memory transfer operation based on the selected memory transfer mode. The memory transfer mode may be selected from a set of at least two different memory transfer modes that includes an interleave memory transfer mode and a sequential memory transfer mode. The techniques of this disclosure may be used to improve the performance of GPU-assisted memory transfer operations.
摘要翻译：本公开描述了基于可选存储器传输模式的用于执行图形处理单元（GPU）的存储器传送操作的技术，以及用于选择用于执行与GPU的存储器传送操作的全部或部分的存储器传送模式的技术。在一些示例中，本公开的技术可以包括选择用于执行存储器传送操作的至少一部分的存储器传送模式，以及基于所选择的存储器传输模式使用GPU执行存储器传送操作。可以从包括交织存储器传送模式和顺序存储器传输模式的至少两个不同的存储器传输模式的集合中选择存储器传送模式。本公开的技术可以用于改善GPU辅助的存储器传送操作的性能。

64. 发明申请

US20150302834A1 ADDRESS CONFIGURING METHOD AND DEVICE FOR A PARALLEL DISPLAY CONTROL SYSTEM 审中-公开
标题翻译：用于并行显示控制系统的地址配置方法和设备
公开(公告)号：US20150302834A1
公开(公告)日：2015-10-22
申请号：US14353628
申请日：2013-12-30
申请人： SHENZHEN SUNMOON MICROELECTRONICS CO., LTD.
发明人： Zhaohua LI
IPC分类号： G09G5/39
CPC分类号： G09G5/39 , G09G2310/0202 , G09G2352/00 , H05B37/0254
摘要： The present invention relates to a lamp controlling field and provides an address configuring method and device for a parallel display control system. The method includes: receiving address data sent from a controller of the parallel display control system by each address data port, each address data port respectively locates on each parallel display unit, each address data port is connected to each other in a step serial connection manner, the address data comprises at least one address data package; intercepting the address data package of the address data that arrives first to the address data port thereof in turn to configure address and generating address data of the intercepted address data package successively according to the sequence of the step serial connection by each address data port; sending the remaining address data of the whole address data package to a next address data port connected serially to the address data port to enable the next address data port to configure address. In the present invention, a plurality of parallel display control unit can be configured in one address configuring operation, thereby improving address configuring efficiency.
摘要翻译：本发明涉及一种灯控制领域，并提供一种并行显示控制系统的地址配置方法和装置。该方法包括：通过每个地址数据端口接收从并行显示控制系统的控制器发送的地址数据，每个地址数据端口分别位于每个并行显示单元上，每个地址数据端口以步骤串行连接方式彼此连接地址数据包括至少一个地址数据包; 截取首先到达其地址数据端口的地址数据的地址数据包依次根据每个地址数据端口的步进串行连接的顺序配置地址并产生截取的地址数据包的地址数据; 将整个地址数据包的剩余地址数据发送到连续地连接到地址数据端口的下一个地址数据端口，以使下一个地址数据端口配置地址。在本发明中，多个并行显示控制单元可以配置在一个地址配置操作中，从而提高地址配置效率。

65. 发明授权

US09153211B1 Method and system for tracking accesses to virtual addresses in graphics contexts 有权
标题翻译：跟踪图形上下文中虚拟地址访问的方法和系统
公开(公告)号：US09153211B1
公开(公告)日：2015-10-06
申请号：US11949731
申请日：2007-12-03
申请人： James L. Deming , David B. Glasco
发明人： James L. Deming , David B. Glasco
IPC分类号： G06F12/00 , G09G5/39 , G06T1/60 , G09G5/395 , G09G5/393
CPC分类号： G09G5/39 , G06F12/08 , G06T1/60 , G09G5/393 , G09G5/395 , G09G2360/12 , G09G2360/121
摘要： A method and system for tracking accesses to virtual addresses are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of receiving a virtual address from a client requesting to access memory in a graphics context, updating access state information corresponding to a virtual page associated with the graphics context in which the virtual address resides, after the virtual address successfully maps to a physical memory location, and determining whether to evict a physical page associated with the graphics context based on the access state information.
摘要翻译：公开了一种用于跟踪对虚拟地址的访问的方法和系统。具体地，本发明的一个实施例提出了一种方法，其包括以下步骤：从客户端接收请求在图形上下文中访问存储器的虚拟地址，更新对应于与图形上下文相关联的虚拟页面的访问状态信息，其中虚拟地址在虚拟地址成功映射到物理存储器位置之后，并且基于访问状态信息确定是否驱逐与图形上下文相关联的物理页面。

66. 发明授权

US09153197B2 Storage apparatus and method for effectively addressing display memory 有权
标题翻译：用于有效寻址显示存储器的存储装置和方法
公开(公告)号：US09153197B2
公开(公告)日：2015-10-06
申请号：US13466352
申请日：2012-05-08
申请人： Jeong-Keun Ahn
发明人： Jeong-Keun Ahn
IPC分类号： G09G5/39 , G06F5/10 , G09G5/00 , G09G5/36 , G09G5/393 , G09G5/395
CPC分类号： G09G5/006 , G09G5/363 , G09G5/393 , G09G5/395 , G09G2320/0252 , G09G2330/021 , G09G2360/06
摘要： There is provided a storage apparatus for providing an effective memory addressing method. The storage apparatus includes at least one memory and at least one controller coupled to the at least one memory to provide address information. Each of the controllers includes a first controller for providing on/off information of subfields included in one frame for driving pixels in a display panel, a third controller for horizontal position information corresponding to a selected scan line from scan lines of a display panel, and a second controller for providing vertical position information corresponding to a pixel on the selected scan line. On/off information of subfields for at least two pixels is stored in a cell located at the vertical position and the horizontal position in the at least one memory.
摘要翻译：提供了一种用于提供有效存储器寻址方法的存储装置。存储装置包括至少一个存储器和耦合到至少一个存储器以提供地址信息的至少一个控制器。每个控制器包括第一控制器，用于提供包括在一个帧中的用于驱动显示面板中的像素的子场的开/关信息;第三控制器，用于与显示面板的扫描线相对应的所选择的扫描线的水平位置信息;以及用于提供对应于所选择的扫描线上的像素的垂直位置信息的第二控制器。至少两个像素的子场的开/关信息存储在位于至少一个存储器中的垂直位置和水平位置的单元格中。

67. 发明申请

US20150279338A1 METHODS AND APPARATUS TO PROVIDE EXTENDED GRAPHICS PROCESSING CAPABILITIES 有权
标题翻译：提供扩展图形处理能力的方法和设备
公开(公告)号：US20150279338A1
公开(公告)日：2015-10-01
申请号：US14227908
申请日：2014-03-27
申请人： Sameer Kp , Selvakumar Panneer , Susanta Bhattacharjee , Mrinalini Attaluri
发明人： Sameer Kp , Selvakumar Panneer , Susanta Bhattacharjee , Mrinalini Attaluri
IPC分类号： G09G5/39 , G06T1/20 , G06T1/60
CPC分类号： G09G5/39 , G06T1/20 , G06T1/60 , G09G5/363 , G09G2360/12 , G09G2360/18
摘要： Methods, apparatus, and articles of manufacture to provide extended graphics processing capabilities are disclosed. A disclosed example method involves sending a display panel parameter to a shared library module. The display panel parameter is sent by a programmable driver interface in communication between the shared library module and a graphics hardware device driver. The shared library module includes a first graphics processing capability. The graphics hardware device driver includes a second graphics processing capability different from the first graphics processing capability. The example method also involves performing a render operation via the programmable driver interface on a frame buffer based on the first graphics processing capability. The first graphics processing capability is received at the programmable driver interface from the shared library module based on the display panel parameter. The frame buffer is output to a display.
摘要翻译：公开了提供扩展图形处理能力的方法，装置和制品。公开的示例性方法涉及将显示面板参数发送到共享库模块。显示面板参数由共享库模块和图形硬件设备驱动程序之间通信的可编程驱动程序接口发送。共享库模块包括第一图形处理能力。图形硬件设备驱动器包括与第一图形处理能力不同的第二图形处理能力。该示例方法还涉及基于第一图形处理能力，经由帧缓冲器上的可编程驱动器接口执行渲染操作。基于显示面板参数，在共享库模块的可编程驱动器接口处接收第一图形处理能力。帧缓冲区被输出到显示器。

68. 发明申请

US20150255047A1 Display Pipe Statistics Calculation for Video Encoder 有权
标题翻译：显示管道统计计算视频编码器
公开(公告)号：US20150255047A1
公开(公告)日：2015-09-10
申请号：US14201421
申请日：2014-03-07
申请人： Apple Inc.
发明人： Peter F. Holland , Guy Cote , Mark P. Rygh
IPC分类号： G09G5/39 , G09G5/02
CPC分类号： G09G5/39 , G09G5/001 , G09G5/022 , G09G5/363 , G09G2340/02 , G09G2340/06 , G09G2340/10 , G09G2340/12 , G09G2360/121 , G09G2360/128 , G09G2360/16
摘要： In an embodiment, a system includes a display processing unit configured to process a video sequence for a target display. In some embodiments, the display processing unit is configured to composite the frames from frames of the video sequence and one or more other image sources. The display processing unit may be configured to write the processed/composited frames to memory, and may also be configured to generate statistics over the frame data, where the generated statistics are usable to encode the frame in a video encoder. The display processing unit may be configured to write the generated statistics to memory, and the video encoder may be configured to read the statistics and the frames. The video encoder may be configured to encode the frame responsive to the statistics.
摘要翻译：在一个实施例中，系统包括被配置为处理用于目标显示的视频序列的显示处理单元。在一些实施例中，显示处理单元被配置为从视频序列的帧和一个或多个其它图像源合成帧。显示处理单元可以被配置为将经处理/合成的帧写入存储器，并且还可以被配置为生成关于帧数据的统计信息，其中生成的统计信息可用于对视频编码器中的帧进行编码。显示处理单元可以被配置为将生成的统计信息写入存储器，并且视频编码器可以被配置为读取统计信息和帧。视频编码器可以被配置为响应于统计信息对帧进行编码。

69. 发明申请

US20150199789A1 CODEC ENGINE WITH INLINE IMAGE PROCESSING 有权
标题翻译：具有在线图像处理的CODEC发动机
公开(公告)号：US20150199789A1
公开(公告)日：2015-07-16
申请号：US14154292
申请日：2014-01-14
申请人： VIXS SYSTEMS INC.
发明人： Indra Laksono , Eric Young , Chun-Chin Yeh
IPC分类号： G06T1/60 , H04N7/01 , G06T9/00 , G06T7/00 , G06T7/20 , G09G5/39 , G06T3/40 , G06K9/00
CPC分类号： G06T9/00 , G09G5/363 , G09G5/39 , G09G5/393 , G09G2320/0261 , G09G2340/02 , G09G2350/00 , G09G2360/08 , G09G2360/121 , H04N7/012 , H04N19/40 , H04N19/42 , H04N19/44 , H04N19/59 , H04N19/85
摘要： A video device includes a codec engine to process video data to generate a stream of pixel blocks representing a picture of a sequence of pictures represented by the video data, an image processing module to receive the stream of pixel blocks via a local path between the codec engine and the image processing module and to perform at least one image processing function for the picture using pixel blocks of the stream of pixel blocks received via the local path to generate image processing result data representative of the picture. The video device further includes a storage interface coupleable to a storage component, the storage interface to provide the image processing result data for storage at the storage component.
摘要翻译：视频装置包括编解码器引擎，用于处理视频数据以产生表示由视频数据表示的图像序列的图像的像素块流;图像处理模块，用于经由编解码器之间的本地路径接收像素块流; 引擎和图像处理模块，并且使用经由本地路径接收的像素块的像素块来对图像执行至少一个图像处理功能，以生成表示图像的图像处理结果数据。视频设备还包括可存储组件的存储接口，该存储接口提供用于存储在存储组件上的图像处理结果数据。

70. 发明申请

US20150187124A1 Adaptive Depth Offset Compression 有权
标题翻译：自适应深度偏移压缩
公开(公告)号：US20150187124A1
公开(公告)日：2015-07-02
申请号：US14141523
申请日：2013-12-27
申请人： Tomas G. Akenine-Moller , Magnus Andersson , Jon N. Hasselgren , Carl J. Munkberg , Robert M. Toth
发明人： Tomas G. Akenine-Moller , Magnus Andersson , Jon N. Hasselgren , Carl J. Munkberg , Robert M. Toth
IPC分类号： G06T15/40 , G09G5/39
CPC分类号： G06T15/405 , G06F3/14 , G06T9/00 , G06T15/005 , G09G5/39 , G09G5/393 , G09G2340/02 , G09G2360/122
摘要： Because using the same number of bits per residual depth offset compression is not the best distribution of bits, the bits per residual may be distributed instead according to the content of the depths of a tile. For example, if the depth differences close to the Zmax are small, then fewer bits can be spent on residuals for the samples that are encoded relative to Zmax. Consequently, more bits can be spent on the residuals for the samples that are encoded relative to Zmin. As a result, more tiles succeed at compressing to the required number of bits.
摘要翻译：因为每个残留深度偏移压缩使用相同数量的比特不是比特的最佳分布，所以根据瓦片的深度的内容可以分配每个残差的比特。例如，如果接近Zmax的深度差小，则相对于Zmax编码的样本的残差可以花费更少的位。因此，对于相对于Zmin编码的样本的残差，可以花费更多的比特。结果，更多的瓦片成功地压缩到所需的位数。

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