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    • 64. 发明申请
    • METHOD AND APPARATUS FOR IMPROVED HIGH ORDER MODULATION
    • 改进高阶调制的方法和装置
    • US20130154755A1
    • 2013-06-20
    • US13327316
    • 2011-12-15
    • Mustafa ErozLin-Nan Lee
    • Mustafa ErozLin-Nan Lee
    • H03C3/00H03D3/00
    • H04L27/34H04L1/004H04L1/0071H04L25/03312
    • Methods, systems and software are provided for high order signal modulation based on improved signal constellation and bit labeling designs for enhanced performance characteristics, including decreased power consumption. According to the improved signal constellation and bit labeling designs for enhanced performance characteristics, designs for 8-ary, 16-ary, 32-ary and 64-ary signal constellations are provided. According to an 8-ary constellation, improved bit labeling and bit coordinates are provided for a 1+7APSK signal constellation. According to a 16-ary constellation, improved bit labeling and bit coordinates are provided for a 6+10APSK signal constellation. According to three 32-ary constellations, improved bit labeling and bit coordinates are provided for a 16+16APSK signal constellation and two 4+12+16APSK signal constellations. According to two 64-ary constellations, improved bit labeling and bit coordinates are provided for an 8+16+20+20APSK signal constellation and a 12+16+16+20APSK signal constellation.
    • 提供了基于改进的信号星座图和位标签设计的用于高阶信号调制的方法,系统和软件,用于增强的性能特征,包括功耗降低。 根据改进的信号星座和位标签设计,增强了性能特征,提供了8路,16路,32路和64路信号星座的设计。 根据8位星座,为1 + 7APSK信号星座提供改进的比特标识和比特坐标。 根据16位星座,为6 + 10APSK信号星座提供了改进的比特标识和比特坐标。 根据三个32位星座,为16 + 16APSK信号星座和两个4 + 12 + 16APSK信号星座提供改进的比特标识和比特坐标。 根据两个64进制星座,为8 + 16 + 20 + 20APSK信号星座和12 + 16 + 16 + 20A + +信号星座提供了改进的比特标识和比特坐标。
    • 65. 发明授权
    • Method of estimating log-likelihood ratios and relative S-FSK receiver
    • 估计对数似然比和相对S-FSK接收机的方法
    • US08446986B2
    • 2013-05-21
    • US12953892
    • 2010-11-24
    • Daniele VeronesiLorenzo Guerrieri
    • Daniele VeronesiLorenzo Guerrieri
    • H03D3/00
    • H04L25/067H04L27/14
    • A method of estimating log-likelihood ratios for first and second streams of samples of a received S-FSK signal demodulated using first and second carriers includes estimating channel and noise parameters associated with first and second transmitted values for the first and second streams of samples obtained from the received S-FSK modulated signal. Current signal-to-noise ratios are estimated for current samples of the first and second streams of samples obtained from the received S-FSK modulated signal using the channel and noise parameters. The estimated current signal-to-noise ratios are compared with values of a discrete ordered set and respective pairs of consecutive values of the discrete ordered set between which the estimated current signal-to-noise ratios are comprised are identified. Log-likelihood ratios are estimated for the current samples of the first and second streams.
    • 使用第一和第二载波解调的接收的S-FSK信号的第一和第二采样流估计对数似然比的方法包括估计与获得的第一和第二样本流的第一和第二发送值相关联的信道和噪声参数 从接收到的S-FSK调制信号。 使用信道和噪声参数从接收到的S-FSK调制信号获得的第一和第二样本流的当前样本估计当前信噪比。 将估计的当前信噪比与离散有序集合的值和其中包括估计的当前信噪比之间的离散有序集合的相应的连续值对进行比较。 对于第一和第二流的当前样本估计对数似然比。
    • 68. 发明授权
    • Multiphase direct RF frequency to digital converter and related method
    • 多相直接射频到数字转换器及相关方法
    • US08351558B2
    • 2013-01-08
    • US12567427
    • 2009-09-25
    • Richard H. StrandbergPaul Cheng-Po Liang
    • Richard H. StrandbergPaul Cheng-Po Liang
    • H03D3/00H03D3/24G01R25/00H04L7/04
    • H04L27/18
    • The disclosure provides an effective means for fine-resolution determination of the frequency content of an RF signal using low speed digital circuits. The disclosure relates to a method and apparatus for decomposing a high frequency RF signal into several low frequency signals or data streams without loss of any information and without the use of extraneous circuit components such as local oscillators, mixers or offset phase-locked loops. Single or multiple phase oscillator outputs are fed directly to a single or multiple direct RF frequency-to-digital (DrfDC) circuits. The front end of the DrfDC circuit decomposes a high frequency signal into several low frequency signals without loss of any information. The low frequency signals are processed by the back-end of the DrfDC and converted into digital data streams. The digital data streams are then combined and averaged to represent the frequency of the input RF signal.
    • 本公开提供了使用低速数字电路精细分辨率确定RF信号的频率内容的有效手段。 本公开涉及一种用于将高频RF信号分解为几个低频信号或数据流而不丢失任何信息并且不使用诸如本地振荡器,混频器或偏移锁相环之类的外部电路部件的方法和装置。 单相或多相振荡器输出直接馈送到单个或多个直接RF频数(DrfDC)电路。 DrfDC电路的前端将高频信号分解成几个低频信号,而不会丢失任何信息。 低频信号由DrfDC的后端处理并转换为数字数据流。 然后将数字数据流组合并平均以表示输入RF信号的频率。
    • 70. 发明授权
    • Low power BPSK demodulator
    • 低功耗BPSK解调器
    • US08159288B2
    • 2012-04-17
    • US12528967
    • 2008-02-27
    • Zhenying LuoSameer Sonkusale
    • Zhenying LuoSameer Sonkusale
    • H03D3/00H04L27/22H04L27/227
    • H04L27/2272A61N1/3727A61N1/37276
    • A low power BPSK demodulator having a simple architecture, compact design and reliable is provided. The BPSK demodulator includes a first branch (210) having a first mixer (212) and a first low pass filter (214), a second branch (220) coupled to the first branch at the output of the first low pass filter (214) and input of the first mixer (212) and having a second mixer (222), and a third branch (230) coupled to the second branch at the input and output of the second mixer (222) and having a third mixer (232) a second low pass filter (234) and a voltage control oscillator (236), wherein the third branch and the second branch form a charge pumped based phase lock loop that locks onto a carrier frequency of the BPSK demodulator.
    • 提供了具有简单结构,紧凑设计和可靠性的低功率BPSK解调器。 BPSK解调器包括具有第一混频器(212)和第一低通滤波器(214)的第一分支(210),在第一低通滤波器(214)的输出处耦合到第一分支的第二分支(220) 和第二混合器(222)的输入和第二混频器(222)的输入端以及在第二混频器(222)的输入和输出处耦合到第二分支的第三分支(230),并具有第三混频器(232) 第二低通滤波器(234)和压控振荡器(236),其中所述第三分支和所述第二分支形成锁定在所述BPSK解调器的载波频率上的基于电荷泵浦的锁相环。