会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 6. 发明授权
    • Phase noise canceling OFDM receiver
    • 相位噪声消除OFDM接收机
    • US07733993B2
    • 2010-06-08
    • US11251515
    • 2005-10-14
    • Lars Lindh
    • Lars Lindh
    • H03D1/04
    • H04L27/2657H04L27/0014H04L27/2679H04L2027/0032H04L2027/0055H04L2027/0067
    • A receiver includes, in series, at least one receive antenna, a buffer, and arithmetic logic block, a symbol detector, and a phase noise estimator. A further feedback loop couples an output of the phase noise estimator to an input of the arithmetic logic block for providing an estimate of phase noise. The buffer is for storing the received signal. The arithmetic logic block, such as a multiplier, is for removing the estimate of phase noise, received via the feedback loop, from the buffered signal. The symbol detector is for estimating a symbol from the output of the arithmetic logic block. The phase noise estimator estimates phase noise from two inputs received from the symbol detector: the estimated symbol and the remainder signal. Preferably, the phase noise estimator performs an IFFT on these two inputs and Kalman filters the result. Iteratively estimating the phase noise improves precision substantially.
    • 接收器包括串联的至少一个接收天线,缓冲器和算术逻辑块,符号检测器和相位噪声估计器。 另一个反馈环路将相位噪声估计器的输出耦合到算术逻辑块的输入端,以提供相位噪声的估计。 缓冲器用于存储接收到的信号。 诸如乘法器的算术逻辑块用于从缓冲信号去除经由反馈回路接收的相位噪声的估计。 符号检测器用于从算术逻辑块的输出估计符号。 相位噪声估计器估计从符号检测器接收的两个输入的相位噪声:估计符号和余数信号。 优选地,相位噪声估计器对这两个输入执行IFFT,并且对该结果进行卡尔曼滤波。 迭代估计相位噪声大大提高了精度。
    • 7. 发明申请
    • Phase noise canceling OFDM receiver
    • 相位噪声消除OFDM接收机
    • US20070086533A1
    • 2007-04-19
    • US11251515
    • 2005-10-14
    • Lars Lindh
    • Lars Lindh
    • H04K1/10
    • H04L27/2657H04L27/0014H04L27/2679H04L2027/0032H04L2027/0055H04L2027/0067
    • A receiver includes, in series, at least one receive antenna, a buffer, and arithmetic logic block, a symbol detector, and a phase noise estimator. A further feedback loop couples an output of the phase noise estimator to an input of the arithmetic logic block for providing an estimate of phase noise. The buffer is for storing the received signal. The arithmetic logic block, such as a multiplier, is for removing the estimate of phase noise, received via the feedback loop, from the buffered signal. The symbol detector is for estimating a symbol from the output of the arithmetic logic block. The phase noise estimator estimates phase noise from two inputs received from the symbol detector: the estimated symbol and the remainder signal. Preferably, the phase noise estimator performs an IFFT on these two inputs and Kalman filters the result. Iteratively estimating the phase noise improves precision substantially.
    • 接收器包括串联的至少一个接收天线,缓冲器和算术逻辑块,符号检测器和相位噪声估计器。 另一个反馈环路将相位噪声估计器的输出耦合到算术逻辑块的输入端,以提供相位噪声的估计。 缓冲器用于存储接收到的信号。 诸如乘法器的算术逻辑块用于从缓冲信号去除经由反馈回路接收的相位噪声的估计。 符号检测器用于从算术逻辑块的输出估计符号。 相位噪声估计器估计从符号检测器接收的两个输入的相位噪声:估计符号和余数信号。 优选地,相位噪声估计器对这两个输入执行IFFT,并且对该结果进行卡尔曼滤波。 迭代估计相位噪声大大提高了精度。