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71. 发明申请

US20150237732A1 LOW-PROFILE PACKAGE WITH PASSIVE DEVICE 审中-公开
标题翻译：带有被动设备的低配置包
公开(公告)号：US20150237732A1
公开(公告)日：2015-08-20
申请号：US14200684
申请日：2014-03-07
申请人： QUALCOMM Incorporated
发明人： Mario Francisco Velez , Daeik Daniel Kim , Young Kyu Song , Xiaonan Zhang , Jonghae Kim , Changhan Hobie Yun , Chengjie Zuo
IPC分类号： H05K1/18 , H01L21/48 , H05K3/40 , H05K1/03 , H05K1/16 , H01L23/498 , H05K1/11
CPC分类号： H05K1/182 , H01F17/0006 , H01L21/4853 , H01L21/486 , H01L23/13 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49894 , H01L28/10 , H01L2924/15159 , H01L2924/15311 , H01L2924/157 , H01L2924/15788 , H05K1/0306 , H05K1/115 , H05K1/165 , H05K3/4038 , H05K2201/10015 , H05K2201/10242 , H05K2201/10984 , Y10T29/49165
摘要： A low-profile passive-on-package is provided that includes a plurality of recesses that receive corresponding interconnects. Because of the receipt of the interconnects in the recesses, the passive-on-package has a height that is less than a sum of a thickness for the substrate and an interconnect height or diameter.
摘要翻译：提供了一种低调无源封装，其包括接收相应互连的多个凹槽。由于在凹槽中接收到互连，所以被动封装的高度小于衬底的厚度和互连高度或直径的总和。

72. 发明申请

US20150130579A1 MULTI SPIRAL INDUCTOR 审中-公开
标题翻译：多螺旋电感器
公开(公告)号：US20150130579A1
公开(公告)日：2015-05-14
申请号：US14078174
申请日：2013-11-12
申请人： Qualcomm Incorporated
发明人： Daeik Daniel Kim , Jonghae Kim , Changhan Hobie Yun , Mario Francisco Velez , Chengjie Zuo
IPC分类号： H01F27/28 , H01F41/06
CPC分类号： H01F27/2804 , H01F17/0013 , H01F17/02 , H01F41/06 , H01F2017/0073 , H01F2027/2809 , Y10T29/4902
摘要： An apparatus includes a multi spiral inductor that includes a first spiral and a second spiral. The first spiral includes a first turn, a second turn, and a third turn. The first turn is adjacent to and separated from the second turn by first spacing. The second turn is adjacent to and separated from the third turn by second spacing. The first spacing is different from the second spacing.
摘要翻译：一种装置包括多螺旋电感器，其包括第一螺旋和第二螺旋。第一个螺旋包括第一回合，第二回合和第三回合。第一匝与第二匝相邻并且与第二匝分开。第二匝与第三匝相邻并且与第三匝分开第二个间距。第一间距与第二间距不同。

73. 发明申请

US20150130021A1 SOLONOID INDUCTOR IN A SUBSTRATE 有权
标题翻译：基质中的阳离子电导体
公开(公告)号：US20150130021A1
公开(公告)日：2015-05-14
申请号：US14079488
申请日：2013-11-13
申请人： QUALCOMM Incorporated
发明人： Daeik Daniel Kim , Young Kyu Song , Xiaonan Zhang , Jonghae Kim
IPC分类号： H01L49/02
CPC分类号： H01L28/10 , H01F17/0013 , H01F41/041 , H01F2017/0053
摘要： Some implementations provide an integrated device (e.g., semiconductor device) that includes a substrate and an inductor in the substrate. In some implementations, the inductor is a solenoid inductor. The inductor includes a set of windings. The set of windings has an inner perimeter. The set of windings includes a set of interconnects and a set of vias. The set of interconnects and the set of vias are located outside the inner perimeter of the set of windings. In some implementations, the set of windings further includes a set of capture pads. The set of interconnects is coupled to the set of vias through the set of capture pads. In some implementations, the set of windings has an outer perimeter. The set of pads is coupled to the set of interconnects such that the set of pads is at least partially outside the outer perimeter of the set of windings.
摘要翻译：一些实施方式提供了一种集成器件（例如，半导体器件），其包括衬底中的衬底和电感器。在一些实施方案中，电感器是螺线管电感器。电感器包括一组绕组。该组绕组具有内周。该组绕组包括一组互连和一组通孔。该组互连和一组通孔位于该组绕组的内周边之外。在一些实施方案中，该组绕组还包括一组捕获垫。该组互连通过一组捕获垫耦合到该组通孔。在一些实施方式中，该组绕组具有外周边。该组焊盘耦合到该组互连件，使得该组焊盘至少部分地位于该组绕组的外周边之外。

74. 发明申请

US20150092314A1 CONNECTOR PLACEMENT FOR A SUBSTRATE INTEGRATED WITH A TOROIDAL INDUCTOR 审中-公开
标题翻译：用于与电感电感器集成的基板的连接器放置
公开(公告)号：US20150092314A1
公开(公告)日：2015-04-02
申请号：US14039192
申请日：2013-09-27
申请人： QUALCOMM Incorporated
发明人： Daeik Daniel Kim , Young Kyu Song , Mario Francisco Velez , Jonghae Kim , Changhan Hobie Yun , Chengjie Zuo , Xiaonan Zhang , Ryan David Lane , Matthew Michael Nowak
IPC分类号： H01F27/29 , H01F41/04 , H01F27/40
CPC分类号： H01F27/29 , H01F17/0006 , H01F27/40 , H01F2017/002 , H01F2017/0073 , Y10T29/4902
摘要： A system includes a first connector coupled to a first surface of a substrate. The first connector enables the system to be electrically coupled to a first device external to the substrate. The system includes a second connector coupled to a second surface of the substrate. The system also includes a plurality of conductive vias extending through the substrate from the first surface to the second surface. The plurality of conductive vias surrounds the first connector and the second connector. The plurality of conductive vias is electrically coupled together to form a toroidal inductor. A first lead of the toroidal inductor is electrically coupled to the first connector. A second lead of the toroidal inductor is electrically coupled to the second connector.
摘要翻译：系统包括耦合到衬底的第一表面的第一连接器。第一连接器使得系统能够电耦合到衬底外部的第一器件。该系统包括耦合到基板的第二表面的第二连接器。该系统还包括从第一表面延伸穿过基底的多个导电通孔到第二表面。多个导电通孔围绕第一连接器和第二连接器。多个导电通孔电耦合在一起以形成环形电感器。环形电感器的第一引线电耦合到第一连接器。环形电感器的第二引线电耦合到第二连接器。

75. 发明授权

US10832848B2 Low DC resistance and high RF resistance power amplifier choke inductor 有权
公开(公告)号：US10832848B2
公开(公告)日：2020-11-10
申请号：US15722446
申请日：2017-10-02
申请人： QUALCOMM Incorporated
发明人： Daeik Daniel Kim , Bonhoon Koo , Babak Nejati
IPC分类号： H01F17/00 , H01F41/04 , H05K1/16 , H01F27/28 , H05K3/46
摘要： A multi-layer spiral inductive array includes a first multi-layer spiral inductor with a second layer matching a spiral pattern of a first layer. The multi-layer spiral inductive array also includes a second multi-layer spiral inductor with a third layer matching a spiral pattern of a fourth layer. The second multi-layer spiral inductor is coupled in series with the first multi-layer spiral inductor.

76. 发明授权

US10607980B2 Passive-on-glass (POG) device and method 有权
公开(公告)号：US10607980B2
公开(公告)日：2020-03-31
申请号：US15861140
申请日：2018-01-03
申请人： QUALCOMM Incorporated
发明人： Je-Hsiung Jeffrey Lan , Niranjan Sunil Mudakatte , Changhan Hobie Yun , Daeik Daniel Kim , Chengjie Zuo , David Francis Berdy , Mario Francisco Velez , Jonghae Kim
IPC分类号： H01L27/01 , H01L23/15 , H01L23/522 , H01L49/02 , H01L23/498 , H01L21/48 , H01G2/02 , H01G4/005
摘要： A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

77. 发明授权

US10490348B2 Two-dimensional structure to form an embedded three-dimensional structure 有权
公开(公告)号：US10490348B2
公开(公告)日：2019-11-26
申请号：US15192802
申请日：2016-06-24
申请人： QUALCOMM Incorporated
发明人： Mario Francisco Velez , Daeik Daniel Kim , Niranjan Sunil Mudakatte , David Francis Berdy , Changhan Hobie Yun , Jonghae Kim , Chengjie Zuo , Yunfei Ma , Robert Paul Mikulka
IPC分类号： H01F5/00 , H01F41/04 , H01F17/00 , H01L23/31 , H01L23/64 , H01L23/00
CPC分类号： H01F41/041 , H01F17/0013 , H01F17/0033 , H01F2017/002 , H01L23/3128 , H01L23/645 , H01L24/19 , H01L24/24 , H01L24/96 , H01L2224/023 , H01L2224/12105 , H01L2224/24195 , H01L2924/1206 , H01L2924/18162 , H01L2924/19042 , H01L2924/19105
摘要： Disclosed is an apparatus including a plurality of vias each having a defined shape, wherein each of the plurality of vias includes a first two-dimensional conductive layer plated on a first side of a substrate, the first two-dimensional conductive layer having the defined shape, a second two-dimensional conductive layer plated on a second side of the substrate, the second two-dimensional conductive layer having the defined shape, and a via conductively coupling the first two-dimensional conductive layer to the second two-dimensional conductive layer. The apparatus further includes a plurality of interconnects configured to conductively couple the plurality of vias, wherein the first two-dimensional conductive layer and the second two-dimensional conductive layer of each of the plurality of vias are perpendicular to the plurality of interconnects.

78. 发明授权

US10354795B2 Varying thickness inductor 有权
公开(公告)号：US10354795B2
公开(公告)日：2019-07-16
申请号：US15242007
申请日：2016-08-19
申请人： QUALCOMM Incorporated
发明人： Daeik Daniel Kim , Chengjie Zuo , Changhan Hobie Yun , Mario Francisco Velez , Robert Paul Mikulka , Xiangdong Zhang , Jonghae Kim , Je-Hsiung Lan
IPC分类号： H01F7/06 , H01F41/04 , H01F27/28 , H01F17/00
摘要： A method includes forming a first conductive spiral and a second conductive spiral of a spiral inductor coupled to a substrate. The second conductive spiral overlays the first conductive spiral. A first portion of an innermost turn of the spiral inductor has a first thickness in a direction perpendicular to the substrate. The first portion of the innermost turn includes a first portion of the first conductive spiral and does not include the second conductive spiral. A second portion of the innermost turn includes a first portion of the second conductive spiral. A portion of an outermost turn of the spiral inductor has a second thickness in the direction perpendicular to the substrate. The second thickness is greater than the first thickness. The portion of the outermost turn includes a second portion of the first conductive spiral and a second portion of the second conductive spiral.

79. 发明授权

US10290414B2 Substrate comprising an embedded inductor and a thin film magnetic core 有权
公开(公告)号：US10290414B2
公开(公告)日：2019-05-14
申请号：US14841132
申请日：2015-08-31
申请人： QUALCOMM Incorporated
发明人： Changhan Hobie Yun , Mario Francisco Velez , Chengjie Zuo , Daeik Daniel Kim , David Francis Berdy , Je-Hsiung Jeffrey Lan , Jonghae Kim , Niranjan Sunil Mudakatte , Robert Paul Mikulka
IPC分类号： H01F5/00 , H01F27/28 , H01F27/245 , H01F41/14 , H01F41/04 , H01F17/00 , H01F41/32 , H01L23/64 , H05K1/16
摘要： A substrate includes a first dielectric layer, a magnetic core at least partially in the first dielectric layer, where the magnetic core comprises a first non-horizontal thin film magnetic (TFM) layer. The substrate also includes a first inductor that includes a plurality of first interconnects, where the first inductor is positioned in the substrate to at least partially surround the magnetic core. The magnetic core may further include a second non-horizontal thin film magnetic (TFM) layer. The magnetic core may further include a core layer. The magnetic core may further include a third thin film magnetic (TFM) layer, and a fourth thin film magnetic (TFM) layer that is substantially parallel to the third thin film magnetic (TFM) layer.

80. 发明授权

US10249580B2 Stacked substrate inductor 有权
公开(公告)号：US10249580B2
公开(公告)日：2019-04-02
申请号：US15190158
申请日：2016-06-22
申请人： QUALCOMM Incorporated
发明人： Daeik Daniel Kim , Changhan Hobie Yun , David Francis Berdy , Chengjie Zuo , Mario Francisco Velez , Jonghae Kim
IPC分类号： H01L23/64 , H01F41/04 , H01L23/522 , H01L23/498 , H01L23/538 , H01L25/16 , H01L27/08
摘要： In conventional device packages, separate standalone inductors are provided and mounted on an interposer substrate along with a die. Separate inductors reduce integration density, decrease flexibility, increase footprint, and generally increase costs. To address such disadvantages, it is proposed to provide a part of an inductor in a substrate below a die. The proposed stacked substrate inductor may include a first inductor in a first substrate, a second inductor in a second a second substrate stacked on the first substrate, and an inductor interconnect coupling the first and second inductors. The core regions of the first and second inductors may overlap with each other at least partially. The proposed stacked substrate inductor may enhance integration density, increase flexibility, decrease footprint, and/or reduce costs.

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