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71. 发明授权

US09508708B2 Poly resistor for metal gate integrated circuits 有权
公开(公告)号：US09508708B2
公开(公告)日：2016-11-29
申请号：US14569932
申请日：2014-12-15
申请人： Texas Instruments Incorporated
发明人： Kamel Benaissa
IPC分类号： H01L27/06 , H01L27/11 , H01L27/02 , H01L49/02 , H01L29/43 , H01L29/49 , H01L29/51 , H01L29/66 , H01L29/78
CPC分类号： H01L27/0629 , H01L27/0288 , H01L27/1112 , H01L28/20 , H01L29/435 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/66545 , H01L29/6659 , H01L29/7843
摘要： An integrated circuit containing a metal gate transistor and a thin polysilicon resistor may be formed by forming a first layer of polysilicon and removed it in an area for the thin polysilicon resistor. A second layer of polysilicon is formed over the first layer of polysilicon and in the area for the thin polysilicon resistor. The thin polysilicon resistor is formed in the second layer of polysilicon and the sacrificial gate is formed in the first layer of polysilicon and the second layer of polysilicon. A PMD layer is formed over the second layer of polysilicon and a top portion of the PMD layer is removed so as to expose the sacrificial gate but not expose the second layer of polysilicon in the thin polysilicon resistor. The sacrificial gate is removed and a metal replacement gate is formed.

72. 发明授权

US09502435B2 Hybrid high electron mobility transistor and active matrix structure 有权
公开(公告)号：US09502435B2
公开(公告)日：2016-11-22
申请号：US14697596
申请日：2015-04-27
申请人： International Business Machines Corporation
发明人： Ali Afzali-Ardakani , Bahman Hekmatshoartabari , Devendra K. Sadana , Davood Shahrjerdi
IPC分类号： H01L27/12 , H01L29/778 , H01L29/40 , H01L29/66 , H01L29/43
CPC分类号： H01L27/286 , H01L27/1214 , H01L27/1218 , H01L27/1225 , H01L27/1251 , H01L27/3244 , H01L27/3274 , H01L29/408 , H01L29/432 , H01L29/435 , H01L29/66431 , H01L29/778 , H01L29/7786 , H01L29/78603 , H01L29/78654 , H01L51/0508 , H01L51/0529 , H01L51/0541 , H01L51/0558 , H01L51/0562 , H01L51/0587 , H01L51/105 , H01L51/107 , H05B33/0896 , H05B37/0209
摘要： Hybrid high electron mobility field-effect transistors including inorganic channels and organic gate barrier layers are used in some applications for forming high resolution active matrix displays. Arrays of such high electron mobility field-effect transistors are electrically connected to thin film switching transistors and provide high drive currents for passive devices such as organic light emitting diodes. The organic gate barrier layers are operative to suppress both electron and hole transport between the inorganic channel layer and the gate electrodes of the high electron mobility field-effect transistors.

73. 发明申请

US20160225479A1 MANGANESE TIN OXIDE BASED TRANSPARENT CONDUCTING OXIDE AND TRANSPARENT CONDUCTIVE FILM AND METHOD FOR FABRICATING TRANSPARENT CONDUCTIVE FILM USING THE SAME 有权
标题翻译：基于氧化锰的透明导电氧化物和透明导电膜以及使用其制造透明导电膜的方法
公开(公告)号：US20160225479A1
公开(公告)日：2016-08-04
申请号：US15014937
申请日：2016-02-03
申请人： Korea Institute of Science and Technology
发明人： Ji-Won CHOI , Won-Kook CHOI , Jin Sang KIM , Haena YIM
IPC分类号： H01B1/02 , C01G45/00 , H01L33/42 , H01L29/43 , H01L31/0224
CPC分类号： H01B1/02 , C01G19/02 , C01P2002/50 , C01P2002/54 , H01L29/43 , H01L31/022466 , H01L31/1884 , H01L33/42 , Y02E10/50
摘要： Disclosed is a manganese tin oxide-based transparent conducting oxide (TCO) with an optimized composition, which has low surface roughness, low sheet resistance and high transmittance even when deposited at room temperature, a multilayer transparent conductive film using the same and a method for fabricating the same. The manganese tin oxide-based transparent conducting oxide has a composition of MnxSn1-xO (0
摘要翻译：公开了一种具有优化组成的锰锡氧化物基透明导电氧化物（TCO），其即使在室温下沉积时也具有低的表面粗糙度，低的薄层电阻和高透射率，使用其的多层透明导电膜和制作相同。锰氧化锡系透明导电氧化物具有Mn x Sn 1-x O（0

74. 发明授权

US09379191B2 High electron mobility transistor including an isolation region 有权
标题翻译：高电子迁移率晶体管包括隔离区
公开(公告)号：US09379191B2
公开(公告)日：2016-06-28
申请号：US13338962
申请日：2011-12-28
申请人： Chun-Wei Hsu , Jiun-Lei Jerry Yu , Fu-Wei Yao , Chen-Ju Yu , Fu-Chih Yang , Chun Lin Tsai
发明人： Chun-Wei Hsu , Jiun-Lei Jerry Yu , Fu-Wei Yao , Chen-Ju Yu , Fu-Chih Yang , Chun Lin Tsai
IPC分类号： H01L29/267 , H01L29/43 , H01L29/66 , H01L29/778 , H01L29/417 , H01L29/10 , H01L29/20
CPC分类号： H01L29/66462 , H01L21/02271 , H01L29/1066 , H01L29/2003 , H01L29/267 , H01L29/41766 , H01L29/432 , H01L29/7786 , H01L2924/0002
摘要： A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A carrier channel is located between the first III-V compound layer and the second III-V compound layer. A source feature and a drain feature are disposed on the second III-V compound layer. A p-type layer is disposed on a portion of the second III-V compound layer between the source feature and the drain feature. A gate electrode is disposed on the p-type layer. The gate electrode includes a refractory metal. A depletion region is disposed in the carrier channel and under the gate electrode.
摘要翻译：高电子迁移率晶体管（HEMT）包括第一III-V族化合物层。第二III-V化合物层设置在第一III-V化合物层上，并且与组合物中的第一III-V化合物层不同。载体通道位于第一III-V化合物层和第二III-V化合物层之间。源特征和漏极特征设置在第二III-V复合层上。 p型层设置在源特征和漏极特征之间的第二III-V化合物层的一部分上。栅电极设置在p型层上。栅电极包括难熔金属。耗尽区域设置在载流子通道中和栅电极下方。

75. 发明授权

US09355843B2 Semiconductor device and method of manufacturing the same 有权
公开(公告)号：US09355843B2
公开(公告)日：2016-05-31
申请号：US14810023
申请日：2015-07-27
申请人： Sumitomo Electric Industries, Ltd.
发明人： Keiichi Yui , Ken Nakata , Tsuyoshi Kouchi , Isao Makabe
IPC分类号： H01L21/02 , H01L29/43 , H01L29/66 , H01L29/778 , H01L29/20
CPC分类号： H01L21/0254 , H01L21/0237 , H01L21/02378 , H01L21/02381 , H01L21/02389 , H01L21/02414 , H01L21/0242 , H01L21/02458 , H01L21/02505 , H01L21/0262 , H01L29/2003 , H01L29/432 , H01L29/66462 , H01L29/7786
摘要： A method of manufacturing a semiconductor device according to one aspect of the present invention includes a step of forming a first layer of InAlN, a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer, and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.

76. 发明授权

US09331162B2 Array substrate, liquid crystal display device having the same and method for manufacturing the same thereof 有权
标题翻译：阵列基板，液晶显示装置及其制造方法
公开(公告)号：US09331162B2
公开(公告)日：2016-05-03
申请号：US13798255
申请日：2013-03-13
申请人： Innolux Corporation
发明人： Chien-Hung Chen
IPC分类号： G02F1/136 , H01L29/43 , G02F1/1368 , G02F1/1362 , G02F1/1343 , G02F1/137
CPC分类号： G02F1/13439 , G02F1/133345 , G02F1/1341 , G02F1/1368 , G02F2001/13629 , G02F2001/13793 , H01L27/1222 , H01L27/1225 , H01L27/1259 , H01L29/43 , H01L29/66765 , H01L29/66969
摘要： An array substrate, comprising a substrate, a multi-layer electrode and a switch element, is provided. The multi-layer electrode is disposed on the substrate and comprises an electric conductive layer and a first etch-stop layer. The electric conductive layer covers the first etch-stop layer. The switch element is disposed on the substrate and electrically connected to the multi-layer electrode, and has a second etch-stop layer.
摘要翻译：提供了包括基板，多层电极和开关元件的阵列基板。多层电极设置在基板上并且包括导电层和第一蚀刻停止层。导电层覆盖第一蚀刻停止层。开关元件设置在基板上并电连接到多层电极，并且具有第二蚀刻停止层。

77. 发明申请

US20160087036A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20160087036A1
公开(公告)日：2016-03-24
申请号：US14813692
申请日：2015-07-30
申请人： Kabushiki Kaisha Toshiba
发明人： Tatsuo SHIMIZU , Ryosuke IIJIMA , Johji NISHIO , Teruyuki OHASHI
IPC分类号： H01L29/08 , H01L29/868 , H01L21/225 , H01L29/43 , H01L21/02 , H01L29/78 , H01L29/40
摘要： A semiconductor device according to an embodiment includes a SiC layer, an electrode electrically connected to the SiC layer and an impurity region provided between the SiC layer and the electrode. The impurity region includes first position and second position, the first position having highest concentration of an impurity in the impurity region, the highest concentration being not lower than 1×1020 cm−3 and not higher than 5×1022 cm−3, the second position having concentration of the impurity one digit lower than the highest concentration, the first position being between the electrode and the second position, a distance between the first position and the second position being 50 nm or shorter.
摘要翻译：根据实施例的半导体器件包括SiC层，电连接到SiC层的电极和设置在SiC层和电极之间的杂质区域。杂质区域包括第一位置和第二位置，第一位置具有杂质区杂质浓度最高，最高浓度不低于1×1020cm-3且不高于5×1022cm-3，第二位置位置具有比最高浓度低一位的杂质浓度，第一位置在电极和第二位置之间，第一位置和第二位置之间的距离为50nm或更短。

78. 发明授权

US09293573B2 Nitride semiconductor device and manufacturing method thereof 有权
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US09293573B2
公开(公告)日：2016-03-22
申请号：US13899107
申请日：2013-05-21
申请人： ROHM CO., LTD.
发明人： Minoru Akutsu , Tetsuya Fujiwara
IPC分类号： H01L29/66 , H01L29/78 , H01L29/51 , H01L29/778 , H01L29/43 , H01L29/20
CPC分类号： H01L29/78 , H01L29/2003 , H01L29/432 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66462 , H01L29/66477 , H01L29/7786
摘要： Provided are a nitride semiconductor device having an excellent boundary between a nitride semiconductor and a gate insulating film, resulting in improved device characteristics, and a manufacturing method therefor. The nitride semiconductor device includes: an electron transport layer made of a nitride semiconductor; an electron supply layer layered on the electron transport layer, the electron supply layer being made of a nitride semiconductor including Al and having an Al composition different from that of the electron transport layer; a source electrode and a drain electrode formed on the electron supply layer with a gap therebetween; a gate insulating film covering the surface of the electron supply layer between the source electrode and the drain electrode; a passivation film covering a surface of the gate insulating film and having an opening between the source electrode and the drain electrode; and a gate electrode having a main gate body in the opening facing the electron supply layer through the gate insulating film.
摘要翻译：本发明提供一种氮化物半导体与栅极绝缘膜之间具有极好的边界的氮化物半导体器件，从而提高器件特性及其制造方法。氮化物半导体器件包括：由氮化物半导体制成的电子传输层; 层叠在所述电子传输层上的电子供给层，所述电子供给层由包含Al并且具有不同于所述电子传输层的Al组成的氮化物半导体构成; 形成在电子供给层上的源电极和漏电极，其间具有间隙; 覆盖源电极和漏电极之间的电子供给层的表面的栅极绝缘膜; 覆盖所述栅极绝缘膜的表面并且在所述源电极和所述漏电极之间具有开口的钝化膜; 以及栅电极，所述栅电极通过所述栅极绝缘膜在所述开口中面向所述电子供给层。

79. 发明申请

US20160071984A1 DIODE WITH INSULATED ANODE REGIONS 审中-公开
公开(公告)号：US20160071984A1
公开(公告)日：2016-03-10
申请号：US14943794
申请日：2015-11-17
申请人： STMICROELECTRONICS S.R.L.
发明人： Antonino Alessandria , Leonardo Fragapane
IPC分类号： H01L29/868 , H01L29/66 , H01L29/06 , H01L27/06 , H01L29/36 , H01L29/43
CPC分类号： H01L29/868 , H01L27/0629 , H01L27/0664 , H01L27/0694 , H01L27/0727 , H01L27/0814 , H01L29/0692 , H01L29/36 , H01L29/43 , H01L29/66136 , H01L29/7804
摘要： A diode is integrated on a semiconductor chip having anode and cathode surfaces opposite to each other. The diode comprises a cathode region extending inwardly from the cathode surface, a drift region extending between the anode surface and the cathode region, and a plurality of anode regions extending from the anode surface in the drift region. The diode further comprises a cathode electrode coupled with the cathode region, and an anode electrode that contacts one or more contacted anode regions of said anode regions and is electrically insulated from one or more floating anode regions of the anode regions. The diode is configured so that charge carriers are injected from the floating anode regions into the drift region in response to applying of a control voltage exceeding a threshold voltage.

80. 发明授权

US09281374B2 Metal gate structure and fabrication method thereof 有权
标题翻译：金属栅结构及其制造方法
公开(公告)号：US09281374B2
公开(公告)日：2016-03-08
申请号：US14490679
申请日：2014-09-19
申请人： UNITED MICROELECTRONICS CORP.
发明人： Tsun-Min Cheng , Min-Chuan Tsai , Chih-Chien Liu , Jen-Chieh Lin , Pei-Ying Li , Shao-Wei Wang , Mon-Sen Lin , Ching-Ling Lin
IPC分类号： H01L29/49 , H01L29/423 , H01L29/43 , H01L29/772 , H01L29/66 , H01L29/78 , H01L29/51 , H01L21/8238 , H01L21/8234
CPC分类号： H01L29/4966 , H01L21/82345 , H01L21/823842 , H01L21/823857 , H01L29/4232 , H01L29/435 , H01L29/51 , H01L29/66045 , H01L29/66545 , H01L29/78
摘要： A metal gate structure located on a substrate includes a gate dielectric layer, a metal layer and a titanium aluminum nitride metal layer. The gate dielectric layer is located on the substrate. The metal layer is located on the gate dielectric layer. The titanium aluminum nitride metal layer is located on the metal layer.
摘要翻译：位于基板上的金属栅极结构包括栅介质层，金属层和氮化铝钛金属层。栅介质层位于衬底上。金属层位于栅极电介质层上。氮化铝钛金属层位于金属层上。

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