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    • 86. 发明授权
    • Methods and apparatuses to support memory transactions using partial physical addresses
    • 使用部分物理地址支持内存事务的方法和设备
    • US08131940B2
    • 2012-03-06
    • US11694999
    • 2007-03-31
    • Krishnakanth SistiaYen-Cheng Liu
    • Krishnakanth SistiaYen-Cheng Liu
    • G06F13/14G06F12/16
    • G06F12/0831G06F12/0813G06F2212/1016
    • Methods and apparatuses to support memory transactions using partial physical addresses are disclosed. Method embodiments generally comprise home agents monitoring multiple responses to multiple memory requests, wherein at least one of the responses has a partial address for a memory line, resolving conflicts for the memory requests, and suspending conflict resolution for the memory requests which match partial address responses until determining the full address. Apparatus embodiments generally comprise a home agent having a response monitor and a conflict resolver. The response monitor may observe a snoop response of a memory agent, wherein the snoop response only has a partial address and is for a memory line of a memory agent. The conflict resolver may suspend conflict resolution for memory transactions that match the partial address of the memory line until the conflict resolver receives a full address for the memory line.
    • 公开了使用部分物理地址来支持存储器事务的方法和装置。 方法实施例通常包括监视对多个存储器请求的多个响应的归属代理,其中响应中的至少一个具有用于存储器线的部分地址,解决存储器请求的冲突,以及针对匹配部分地址响应的存储器请求暂停冲突解决 直到确定完整的地址。 装置实施例通常包括具有响应监视器和冲突解决器的归属代理。 响应监视器可以观察存储器代理的窥探响应,其中侦听响应仅具有部分地址,并且用于存储器代理的存储器线。 冲突解决程序可能会暂停与内存条的部分地址匹配的内存事务的冲突解决,直到冲突解决程序接收到内存条的完整地址为止。
    • 87. 发明授权
    • Methods and arrangements to correct for double rounding errors when rounding floating point numbers to nearest away
    • 在将浮点数舍入到最近时纠正双舍入误差的方法和布置
    • US08095586B2
    • 2012-01-10
    • US12006146
    • 2007-12-31
    • Marius Cornea-Hasegan
    • Marius Cornea-Hasegan
    • G06F7/38G06F7/00G06F15/00
    • G06F7/49963
    • Methods and arrangements to correct for double rounding errors when rounding floating point numbers to nearest away are described. Embodiments include transformations, code, state machines or other logic to perform a floating point operation on one or more floating point numbers of precision P1 in base b, producing positive result res0 of precision greater than precision P1; rounding positive result res0 to precision P1 to the nearest away, producing positive result res1; and rounding the result res1 to precision P2 to the nearest away, where P2 is narrower than P1, producing result res2. The embodiments may also include correcting res2 for double rounding errors. The correcting may include determining that res1 is midway between two consecutive floating point numbers of precision P2, the larger being res2, determining that rounding res0 to produce res1 involved rounding up, and decrementing the significand of res2 to obtain the corrected result.
    • 描述在将浮点数舍入到最近时纠正双舍入误差的方法和布置。 实施例包括转换,代码,状态机或其他逻辑,以在基本b中的精度P1的一个或多个浮点数上执行浮点运算,产生精度大于精度P1的正结果res0; 舍入正结果res0到精度P1到最近,产生正结果res1; 并将结果res1舍入到精度P2到最近的距离,其中P2比P1窄,产生结果res2。 实施例还可以包括校正res2的双舍入误差。 校正可以包括确定res1是在精度P2的两个连续浮点数之间的中间,更大的是res2,确定舍入res0以产生涉及四舍五入的res1,并且减少res2的有效位数以获得校正结果。