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81. 发明授权

US08578068B2 Method of data communications with reduced latency 失效
标题翻译：减少延迟的数据通信方法
公开(公告)号：US08578068B2
公开(公告)日：2013-11-05
申请号：US12947520
申请日：2010-11-16
申请人： Michael A. Blocksome , Jeffrey J. Parker
发明人： Michael A. Blocksome , Jeffrey J. Parker
IPC分类号： G06F3/00 , G06F15/167
CPC分类号： G06F13/28
摘要： Data communications with reduced latency, including: writing, by a producer, a descriptor and message data into at least two descriptor slots of a descriptor buffer, the descriptor buffer comprising allocated computer memory segmented into descriptor slots, each descriptor slot having a fixed size, the descriptor buffer having a header pointer that identifies a next descriptor slot to be processed by a DMA controller, the descriptor buffer having a tail pointer that identifies a descriptor slot for entry of a next descriptor in the descriptor buffer; recording, by the producer, in the descriptor a value signifying that message data has been written into descriptor slots; and setting, by the producer, in dependence upon the recorded value, a tail pointer to point to a next open descriptor slot.
摘要翻译：具有减少的等待时间的数据通信，包括：由制作者将描述符和消息数据写入描述符缓冲器的至少两个描述符时隙中，所述描述符缓冲器包括分割成描述符时隙的分配的计算机存储器，每个描述符时隙具有固定大小，所述描述符缓冲器具有标识要由DMA控制器处理的下一个描述符时隙的标题指针，所述描述符缓冲器具有标识用于所述描述符缓冲器中的下一描述符的条目的描述符时隙的尾指针; 在描述符中由制作者记录表示消息数据已被写入描述符时隙的值; 并且由制作者根据所记录的值设置指向下一个打开的描述符时隙的尾部指针。

82. 发明授权

US08572629B2 Data communications in a parallel active messaging interface of a parallel computer 失效
标题翻译：并行计算机的并行活动消息接口中的数据通信
公开(公告)号：US08572629B2
公开(公告)日：2013-10-29
申请号：US12963694
申请日：2010-12-09
申请人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F9/46
CPC分类号： G06F9/546
摘要： Data communications in a parallel active messaging interface (‘PAMI’) of a parallel computer, the parallel computer including a plurality of compute nodes that execute a parallel application, the PAMI composed of data communications endpoints, each endpoint including a specification of data communications parameters for a thread of execution on a compute node, including specifications of a client, a context, and a task, the compute nodes and the endpoints coupled for data communications through the PAMI and through data communications resources, including receiving in an origin endpoint of the PAMI a data communications instruction, the instruction characterized by an instruction type, the instruction specifying a transmission of transfer data from the origin endpoint to a target endpoint and transmitting, in accordance with the instruction type, the transfer data from the origin endpoint to the target endpoint.
摘要翻译：并行计算机的并行活动消息接口（“PAMI”）中的数据通信，并行计算机包括执行并行应用的多个计算节点，由数据通信端点组成的PAMI，每个端点包括数据通信参数的规范对于在计算节点上执行的线程，包括客户端，上下文和任务的规范，所述计算节点和端点被耦合用于通过PAMI进行数据通信，并且通过数据通信资源，包括在源终端中接收 PAMI数据通信指令，以指令类型为特征的指令，指示传输数据从原始端点传输到目标端点的指令，并根据指令类型将传输数据从原点终端发送到目标端点。

83. 发明授权

US08566841B2 Processing communications events in parallel active messaging interface by awakening thread from wait state 失效
标题翻译：通过唤醒线程等待状态来处理通信事件并行活动消息接口
公开(公告)号：US08566841B2
公开(公告)日：2013-10-22
申请号：US12943105
申请日：2010-11-10
申请人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F15/163
CPC分类号： G06F9/546 , G06F9/3851 , G06F9/52 , G06F9/54 , G06F9/541 , G06F9/542
摘要： Processing data communications events in a parallel active messaging interface (‘PAMI’) of a parallel computer that includes compute nodes that execute a parallel application, with the PAMI including data communications endpoints, and the endpoints are coupled for data communications through the PAMI and through other data communications resources, including determining by an advance function that there are no actionable data communications events pending for its context, placing by the advance function its thread of execution into a wait state, waiting for a subsequent data communications event for the context; responsive to occurrence of a subsequent data communications event for the context, awakening by the thread from the wait state; and processing by the advance function the subsequent data communications event now pending for the context.
摘要翻译：在并行计算机的并行活动消息接口（“PAMI”）中处理数据通信事件，其包括执行并行应用的计算节点，PAMI包括数据通信端点和端点，用于通过PAMI进行数据通信，并通过其他数据通信资源，包括通过提前功能确定不存在针对其上下文等待的可操作的数据通信事件，通过提前功能将其执行线程置于等待状态，等待上下文的后续数据通信事件; 响应于上下文的后续数据通信事件的发生，线程从等待状态唤醒; 以及通过提前功能处理现在正在等待上下文的后续数据通信事件。

84. 发明授权

US08565089B2 Performing a scatterv operation on a hierarchical tree network optimized for collective operations 失效
标题翻译：在为集体操作优化的分层树网络上执行分散操作
公开(公告)号：US08565089B2
公开(公告)日：2013-10-22
申请号：US12748594
申请日：2010-03-29
申请人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
IPC分类号： H04L12/28 , H04L12/44 , G06F15/16 , G06F15/173
CPC分类号： G06F15/17318
摘要： Performing a scatterv operation on a hierarchical tree network optimized for collective operations including receiving, by the scatterv module installed on the node, from a nearest neighbor parent above the node a chunk of data having at least a portion of data for the node; maintaining, by the scatterv module installed on the node, the portion of the data for the node; determining, by the scatterv module installed on the node, whether any portions of the data are for a particular nearest neighbor child below the node or one or more other nodes below the particular nearest neighbor child; and sending, by the scatterv module installed on the node, those portions of data to the nearest neighbor child if any portions of the data are for a particular nearest neighbor child below the node or one or more other nodes below the particular nearest neighbor child.
摘要翻译：在对集体操作进行了优化的分层树网络上执行分散操作，包括由节点上安装的scatterv模块从节点上方的最邻近父节点接收具有该节点的至少一部分数据的数据块; 通过安装在节点上的scatterv模块维护节点的数据部分; 通过安装在节点上的scatterv模块来确定数据的任何部分是否用于节点下方的特定最近邻孩子或特定最近邻孩子下面的一个或多个其他节点; 并且如果数据的任何部分用于节点下方的特定最近邻居子节点或特定最邻近子节点下方的一个或多个其他节点，则将由节点上安装的scatterv模块发送到最近邻居子节点的那些部分数据。

85. 发明授权

US08539270B2 Profiling an application for power consumption during execution on a compute node 有权
标题翻译：在计算节点上分析执行期间的功耗应用程序
公开(公告)号：US08539270B2
公开(公告)日：2013-09-17
申请号：US13447501
申请日：2012-04-16
申请人： Charles J. Archer , Michael A. Blocksome , Amanda E. Peters , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Amanda E. Peters , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F1/26
CPC分类号： G06F1/32 , G06F11/3409 , G06F2201/88 , Y02D10/34
摘要： Methods, apparatus, and products are disclosed for profiling an application for power consumption during execution on a compute node that include: receiving an application for execution on a compute node; identifying a hardware power consumption profile for the compute node, the hardware power consumption profile specifying power consumption for compute node hardware during performance of various processing operations; determining a power consumption profile for the application in dependence upon the application and the hardware power consumption profile for the compute node; and reporting the power consumption profile for the application.
摘要翻译：公开了方法，装置和产品，用于在计算节点执行期间对用于功耗的应用进行分析，所述计算节点包括：在计算节点上接收用于执行的应用; 识别所述计算节点的硬件功耗简档，所述硬件功耗简档在执行各种处理操作期间指定计算节点硬件的功耗; 根据应用和计算节点的硬件功耗特性，确定应用的功耗曲线; 并报告应用程序的功耗曲线。

86. 发明授权

US08521502B2 Passing non-architected registers via a callback/advance mechanism in a simulator environment 有权
标题翻译：在模拟器环境中通过回调/提前机制传递非架构寄存器
公开(公告)号：US08521502B2
公开(公告)日：2013-08-27
申请号：US12785141
申请日：2010-05-21
申请人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F9/45
CPC分类号： G06F11/3409 , G06F11/3457 , G06F2201/88
摘要： Embodiments of the invention provide a method of calculating performance counter data for a computer simulator, while minimizing the performance costs associated with cycle-accurate simulation. A callback may be associated with the instructions of a user program and, when the instructions are executed, the associated callbacks may be executed as well. Upon execution, the callbacks may calculate performance counter data related to the associated instruction.
摘要翻译：本发明的实施例提供了一种计算计算机模拟器的性能计数器数据的方法，同时使与循环精确模拟相关的性能成本最小化。回调可以与用户程序的指令相关联，并且当执行指令时，也可以执行相关联的回调。在执行时，回调可以计算与相关指令相关的性能计数器数据。

87. 发明授权

US08489859B2 Performing a deterministic reduction operation in a compute node organized into a branched tree topology 失效
标题翻译：在组织成分支树拓扑的计算节点中执行确定性简化操作
公开(公告)号：US08489859B2
公开(公告)日：2013-07-16
申请号：US12790037
申请日：2010-05-28
申请人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F9/00
CPC分类号： G06F15/76 , G06F15/17318
摘要： Performing a deterministic reduction operation in a parallel computer that includes compute nodes, each of which includes computer processors and a CAU (Collectives Acceleration Unit) that couples computer processors to one another for data communications, including organizing processors and a CAU into a branched tree topology in which the CAU is a root and the processors are children; receiving, from each of the processors in any order, dummy contribution data, where each processor is restricted from sending any other data to the root CAU prior to receiving an acknowledgement of receipt from the root CAU; sending, by the root CAU to the processors in the branched tree topology, in a predefined order, acknowledgements of receipt of the dummy contribution data; receiving, by the root CAU from the processors in the predefined order, the processors' contribution data to the reduction operation; and reducing, by the root CAU, the processors' contribution data.
摘要翻译：在包括计算节点的并行计算机中执行确定性简化操作，每个节点包括计算机处理器和将计算机处理器彼此耦合以用于数据通信的CAU（集体加速单元），包括将处理器和CAU组织成分支树形拓扑其中CAU是根，处理器是孩子; 从每个处理器以任何顺序接收虚拟贡献数据，其中每个处理器在从根CAU接收到接收确认之前被限制不发送任何其他数据到根CAU; 由根CAU以分支树拓扑结构向处理器发送预定义的顺序，接收虚拟贡献数据的确认; 根据CAU从预定义的顺序从处理器接收处理器对减少操作的贡献数据; 并由根CAU减少处理器的贡献数据。

88. 发明授权

US08458244B2 Performing a local reduction operation on a parallel computer 失效
标题翻译：在并行计算机上执行局部缩减操作
公开(公告)号：US08458244B2
公开(公告)日：2013-06-04
申请号：US13585993
申请日：2012-08-15
申请人： Michael A. Blocksome , Daniel A. Faraj
发明人： Michael A. Blocksome , Daniel A. Faraj
IPC分类号： G06F15/76 , G06F15/16 , G06F9/02 , G06F12/00
CPC分类号： G06F15/17387 , G06F15/17318
摘要： A parallel computer including compute nodes, each including two reduction processing cores, a network write processing core, and a network read processing core, each processing core assigned an input buffer. Copying, in interleaved chunks by the reduction processing cores, contents of the reduction processing cores' input buffers to an interleaved buffer in shared memory; copying, by one of the reduction processing cores, contents of the network write processing core's input buffer to shared memory; copying, by another of the reduction processing cores, contents of the network read processing core's input buffer to shared memory; and locally reducing in parallel by the reduction processing cores: the contents of the reduction processing core's input buffer; every other interleaved chunk of the interleaved buffer; the copied contents of the network write processing core's input buffer; and the copied contents of the network read processing core's input buffer.
摘要翻译：并行计算机包括计算节点，每个包括两个减少处理核心，一个网络写入处理核心和一个网络读取处理核心，每个处理核心分配一个输入缓冲器。通过缩小处理核心在交织块中将缩小处理核心的输入缓冲器的内容复制到共享存储器中的交错缓冲器; 通过一个还原处理核心将网络写处理核心的输入缓冲器的内容复制到共享存储器; 通过另一个还原处理核心将网络读处理核心的输入缓冲器的内容复制到共享存储器; 并通过还原处理核心并行减少：还原处理核心的输入缓冲器的内容; 交错缓冲器的每隔一个交错块; 复制内容的网络写入处理核心的输入缓冲区; 以及网络读取处理核心的输入缓冲区的复制内容。

89. 发明授权

US08346883B2 Effecting hardware acceleration of broadcast operations in a parallel computer 有权
公开(公告)号：US08346883B2
公开(公告)日：2013-01-01
申请号：US12782791
申请日：2010-05-19
申请人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F15/167
CPC分类号： G06F15/17318
摘要： Compute nodes of a parallel computer organized for collective operations via a network, each compute node having a receive buffer and establishing a topology for the network; selecting a schedule for a broadcast operation; depositing, by a root node of the topology, broadcast data in a target node's receive buffer, including performing a DMA operation with a well-known memory location for the target node's receive buffer; depositing, by the root node in a memory region designated for storing broadcast data length, a length of the broadcast data, including performing a DMA operation with a well-known memory location of the broadcast data length memory region; and triggering, by the root node, the target node to perform a next DMA operation, including depositing, in a memory region designated for receiving injection instructions for the target node, an instruction to inject the broadcast data into the receive buffer of a subsequent target node.

90. 发明授权

US08325633B2 Remote direct memory access 有权
标题翻译：远程直接内存访问
公开(公告)号：US08325633B2
公开(公告)日：2012-12-04
申请号：US11740361
申请日：2007-04-26
申请人： Charles J. Archer , Michael A. Blocksome
发明人： Charles J. Archer , Michael A. Blocksome
IPC分类号： H04B1/44
CPC分类号： G06F13/28
摘要： Methods, parallel computers, and computer program products are disclosed for remote direct memory access. Embodiments include transmitting, from an origin DMA engine on an origin compute node to a plurality target DMA engines on target compute nodes, a request to send message, the request to send message specifying a data to be transferred from the origin DMA engine to data storage on each target compute node; receiving, by each target DMA engine on each target compute node, the request to send message; preparing, by each target DMA engine, to store data according to the data storage reference and the data length, including assigning a base storage address for the data storage reference; sending, by one or more of the target DMA engines, an acknowledgment message acknowledging that all the target DMA engines are prepared to receive a data transmission from the origin DMA engine; receiving, by the origin DMA engine, the acknowledgement message from the one or more of the target DMA engines; and transferring, by the origin DMA engine, data to data storage on each of the target compute nodes according to the data storage reference using a single direct put operation.
摘要翻译：公开了用于远程直接存储器访问的方法，并行计算机和计算机程序产品。实施例包括从源计算节点上的原始DMA引擎向目标计算节点上的多个目标DMA引擎发送发送消息的请求，发送消息的请求，该消息指定要从原始DMA引擎传输的数据到数据存储在每个目标计算节点上; 由每个目标计算节点上的每个目标DMA引擎接收发送消息的请求; 通过每个目标DMA引擎准备根据数据存储参考和数据长度存储数据，包括分配用于数据存储参考的基本存储地址; 由一个或多个目标DMA引擎发送确认消息，确认所有目标DMA引擎准备好从原始DMA引擎接收数据传输; 由原始DMA引擎从一个或多个目标DMA引擎接收确认消息; 并且由原始DMA引擎使用单个直接放置操作根据数据存储参考将数据传送到每个目标计算节点上的数据存储。

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