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1. 发明授权

US08732725B2 Managing internode data communications for an uninitialized process in a parallel computer 有权
标题翻译：管理并行计算机中未初始化进程的节点间数据通信
公开(公告)号：US08732725B2
公开(公告)日：2014-05-20
申请号：US13292293
申请日：2011-11-09
申请人： Charles J. Archer , Michael A. Blocksome , Douglas R. Miller , Jeffrey J. Parker , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Douglas R. Miller , Jeffrey J. Parker , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F3/00 , G06F9/44 , G06F9/46 , G06F13/00
CPC分类号： G06F15/167 , G06F9/544 , G06F15/17318
摘要： A parallel computer includes nodes, each having main memory and a messaging unit (MU). Each MU includes computer memory, which in turn includes, MU message buffers. Each MU message buffer is associated with an uninitialized process on the compute node. In the parallel computer, managing internode data communications for an uninitialized process includes: receiving, by an MU of a compute node, one or more data communications messages in an MU message buffer associated with an uninitialized process on the compute node; determining, by an application agent, that the MU message buffer associated with the uninitialized process is full prior to initialization of the uninitialized process; establishing, by the application agent, a temporary message buffer for the uninitialized process in main computer memory; and moving, by the application agent, data communications messages from the MU message buffer associated with the uninitialized process to the temporary message buffer in main computer memory.
摘要翻译：并行计算机包括各自具有主存储器和消息传送单元（MU）的节点。每个MU包括计算机存储器，其又包括MU消息缓冲器。每个MU消息缓冲区与计算节点上的未初始化进程相关联。在并行计算机中，管理未初始化过程的节点间数据通信包括：由计算节点的MU接收与计算节点上的未初始化过程相关联的MU消息缓冲器中的一个或多个数据通信消息; 由应用代理确定与未初始化过程相关联的MU消息缓冲器在未初始化过程的初始化之前已满; 由应用代理建立用于主计算机存储器中未初始化过程的临时消息缓冲器; 并且由应用代理将与未初始化过程相关联的MU消息缓冲器的数据通信消息移动到主计算机存储器中的临时消息缓冲器。

2. 发明申请

US20130117764A1 Internode Data Communications In A Parallel Computer 失效
标题翻译：并行计算机中的国际数据通信
公开(公告)号：US20130117764A1
公开(公告)日：2013-05-09
申请号：US13290642
申请日：2011-11-07
申请人： Charles J. Archer , Michael A. Blocksome , Douglas R. Miller , Jeffrey J. Parker , Joseph D. Ratterman , Brian E. Smith
发明人： Charles J. Archer , Michael A. Blocksome , Douglas R. Miller , Jeffrey J. Parker , Joseph D. Ratterman , Brian E. Smith
IPC分类号： G06F9/46
CPC分类号： G06F9/544
摘要： Internode data communications in a parallel computer that includes compute nodes that each include main memory and a messaging unit, the messaging unit including computer memory and coupling compute nodes for data communications, in which, for each compute node at compute node boot time: a messaging unit allocates, in the messaging unit's computer memory, a predefined number of message buffers, each message buffer associated with a process to be initialized on the compute node; receives, prior to initialization of a particular process on the compute node, a data communications message intended for the particular process; and stores the data communications message in the message buffer associated with the particular process. Upon initialization of the particular process, the process establishes a messaging buffer in main memory of the compute node and copies the data communications message from the message buffer of the messaging unit into the message buffer of main memory.
摘要翻译：并行计算机中的国际数据通信包括计算节点，每个计算节点包括主存储器和消息传送单元，消息传送单元包括计算机存储器和耦合用于数据通信的计算节点，其中针对计算节点启动时的每个计算节点：消息单元在消息接发单元的计算机存储器中分配预定数量的消息缓冲器，每个消息缓冲器与在计算节点上被初始化的进程相关联; 在计算节点上的特定进程的初始化之前接收用于该特定进程的数据通信消息; 并将数据通信消息存储在与特定进程相关联的消息缓冲器中。在特定进程的初始化时，该过程在计算节点的主存储器中建立消息缓存器，并将数据通信消息从消息传送单元的消息缓冲器复制到主存储器的消息缓冲器中。

3. 发明申请

US20120124249A1 Method Of Data Communications With Reduced Latency 失效
标题翻译：减少延迟的数据通信方法
公开(公告)号：US20120124249A1
公开(公告)日：2012-05-17
申请号：US12947520
申请日：2010-11-16
申请人： Michael A. Blocksome , Jeffrey J. Parker
发明人： Michael A. Blocksome , Jeffrey J. Parker
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Data communications with reduced latency, including: writing, by a producer, a descriptor and message data into at least two descriptor slots of a descriptor buffer, the descriptor buffer comprising allocated computer memory segmented into descriptor slots, each descriptor slot having a fixed size, the descriptor buffer having a header pointer that identifies a next descriptor slot to be processed by a DMA controller, the descriptor buffer having a tail pointer that identifies a descriptor slot for entry of a next descriptor in the descriptor buffer; recording, by the producer, in the descriptor a value signifying that message data has been written into descriptor slots; and setting, by the producer, in dependence upon the recorded value, a tail pointer to point to a next open descriptor slot.
摘要翻译：具有减少的等待时间的数据通信，包括：由制作者将描述符和消息数据写入描述符缓冲器的至少两个描述符时隙中，所述描述符缓冲器包括分割成描述符时隙的分配的计算机存储器，每个描述符时隙具有固定大小，所述描述符缓冲器具有标识要由DMA控制器处理的下一个描述符时隙的标题指针，所述描述符缓冲器具有标识用于所述描述符缓冲器中的下一描述符的条目的描述符时隙的尾指针; 在描述符中由制作者记录表示消息数据已被写入描述符时隙的值; 并且由制作者根据所记录的值设置指向下一个打开的描述符时隙的尾部指针。

4. 发明授权

US08037213B2 Replenishing data descriptors in a DMA injection FIFO buffer 失效
标题翻译：在DMA注入FIFO缓冲区中补充数据描述符
公开(公告)号：US08037213B2
公开(公告)日：2011-10-11
申请号：US11755501
申请日：2007-05-30
申请人： Charles J. Archer , Michael A. Blocksome , Bob R. Cernohous , Philip Heidelberger , Sameer Kumar , Jeffrey J. Parker
发明人： Charles J. Archer , Michael A. Blocksome , Bob R. Cernohous , Philip Heidelberger , Sameer Kumar , Jeffrey J. Parker
IPC分类号： G06F3/00 , H04L12/28
CPC分类号： G06F13/28
摘要： Methods, apparatus, and products are disclosed for replenishing data descriptors in a Direct Memory Access (‘DMA’) injection first-in-first-out (‘FIFO’) buffer that include: determining, by a messaging module on an origin compute node, whether a number of data descriptors in a DMA injection FIFO buffer exceeds a predetermined threshold, each data descriptor specifying an application message for transmission to a target compute node; queuing, by the messaging module, a plurality of new data descriptors in a pending descriptor queue if the number of the data descriptors in the DMA injection FIFO buffer exceeds the predetermined threshold; establishing, by the messaging module, interrupt criteria that specify when to replenish the injection FIFO buffer with the plurality of new data descriptors in the pending descriptor queue; and injecting, by the messaging module, the plurality of new data descriptors into the injection FIFO buffer in dependence upon the interrupt criteria.
摘要翻译：公开了用于在直接存储器访问（“DMA”）注入先进先出（'FIFO'）缓冲器中补充数据描述符的方法，装置和产品，其包括：由原始计算节点无论DMA注入FIFO缓冲器中的多个数据描述符是否超过预定阈值，每个数据描述符指定用于传输到目标计算节点的应用消息; 如果DMA注入FIFO缓冲器中的数据描述符的数量超过预定阈值，则由消息接发模块排队等待描述符队列中的多个新数据描述符; 由所述消息传递模块建立中断标准，所述中断标准指定何时用所述待处理描述符队列中的所述多个新数据描述符补充所述注入FIFO缓冲器; 以及根据所述中断标准，由所述消息收发模块将所述多个新数据描述符注入到所述注入FIFO缓冲器中。

5. 发明授权

US07958274B2 Heuristic status polling 有权
标题翻译：启发式状态轮询
公开(公告)号：US07958274B2
公开(公告)日：2011-06-07
申请号：US11764282
申请日：2007-06-18
申请人： Charles J. Archer , Michael A. Blocksome , Philip Heidelberger , Sameer Kumar , Jeffrey J. Parker , Joseph D. Ratterman
发明人： Charles J. Archer , Michael A. Blocksome , Philip Heidelberger , Sameer Kumar , Jeffrey J. Parker , Joseph D. Ratterman
IPC分类号： G06F3/00
CPC分类号： H04L12/44 , H04L12/403
摘要： Methods, compute nodes, and computer program products are provided for heuristic status polling of a component in a computing system. Embodiments include receiving, by a polling module from a requesting application, a status request requesting status of a component; determining, by the polling module, whether an activity history for the component satisfies heuristic polling criteria; polling, by the polling module, the component for status if the activity history for the component satisfies the heuristic polling criteria; and not polling, by the polling module, the component for status if the activity history for the component does not satisfy the heuristic criteria.
摘要翻译：提供方法，计算节点和计算机程序产品用于计算系统中组件的启发状态轮询。实施例包括通过轮询模块从请求应用程序接收请求状态的组件的状态请求; 由轮询模块确定该组件的活动历史是否满足启发式轮询标准; 如果组件的活动历史满足启发式轮询标准，轮询由轮询模块组成状态; 如果组件的活动历史不满足启发式标准，则轮询模块不会轮询该组件的状态。

6. 发明申请

US20080313376A1 Heuristic Status Polling 有权
标题翻译：启发式状态轮询
公开(公告)号：US20080313376A1
公开(公告)日：2008-12-18
申请号：US11764282
申请日：2007-06-18
申请人： Charles J. Archer , Michael A. Blocksome , Philip Heidelberger , Sameer Kumar , Jeffrey J. Parker , Joseph D. Ratterman
发明人： Charles J. Archer , Michael A. Blocksome , Philip Heidelberger , Sameer Kumar , Jeffrey J. Parker , Joseph D. Ratterman
IPC分类号： G06F13/22
CPC分类号： H04L12/44 , H04L12/403
摘要： Methods, compute nodes, and computer program products are provided for heuristic status polling of a component in a computing system. Embodiments include receiving, by a polling module from a requesting application, a status request requesting status of a component; determining, by the polling module, whether an activity history for the component satisfies heuristic polling criteria; polling, by the polling module, the component for status if the activity history for the component satisfies the heuristic polling criteria; and not polling, by the polling module, the component for status if the activity history for the component does not satisfy the heuristic criteria.
摘要翻译：提供方法，计算节点和计算机程序产品用于计算系统中组件的启发状态轮询。实施例包括通过轮询模块从请求应用程序接收请求状态的组件的状态请求; 由轮询模块确定该组件的活动历史是否满足启发式轮询标准; 如果组件的活动历史满足启发式轮询标准，轮询由轮询模块组成状态; 如果组件的活动历史不满足启发式标准，则轮询模块不会轮询该组件的状态。

7. 发明授权

US08775531B2 Completion processing for data communications instructions 失效
标题翻译：数据通信指令的完成处理
公开(公告)号：US08775531B2
公开(公告)日：2014-07-08
申请号：US12985651
申请日：2011-01-06
申请人： Michael A. Blocksome , Sameer Kumar , Jeffrey J. Parker
发明人： Michael A. Blocksome , Sameer Kumar , Jeffrey J. Parker
IPC分类号： G06F15/16
CPC分类号： G06F15/17306 , G06F9/546
摘要： Completion processing of data communications instructions in a distributed computing environment with computers coupled for data communications through communications adapters and an active messaging interface (‘AMI’), injecting for data communications instructions into slots in an injection FIFO buffer a transfer descriptor, at least some of the instructions specifying callback functions; injecting a completion descriptor for each instruction that specifies a callback function into an injection FIFO buffer slot having a corresponding slot in a pending callback list; listing in the pending callback list callback functions specified by data communications instructions; processing each descriptor in the injection FIFO buffer, setting a bit in a completion bit mask corresponding to the slot in the FIFO where the completion descriptor was injected; and calling by the AMI any callback functions in the pending callback list as indicated by set bits in the completion bit mask.
摘要翻译：在分布式计算环境中完成处理与通过通信适配器和主动消息接口（“AMI”）进行数据通信的计算机的数据通信指令，将数据通信指令注入到注入FIFO缓冲器中的传输描述符中的至少一些指定回调函数的指令; 将指定回调函数的每个指令的完成描述符注入到具有待处理回呼列表中的相应时隙的注入FIFO缓冲器槽中; 在挂起的回调列表中列出由数据通信指令指定的回调函数; 处理注入FIFO缓冲器中的每个描述符，将与完成描述符被注入的FIFO中的时隙相对应的完成位掩码中的位设置; 并由AMI调用挂起回调列表中的任何回调函数，如完成位掩码中的设置位所示。

8. 发明申请

US20120179736A1 Completion Processing For Data Communications Instructions 有权
标题翻译：数据通信指令的完成处理
公开(公告)号：US20120179736A1
公开(公告)日：2012-07-12
申请号：US12985611
申请日：2011-01-06
申请人： Michael A. Blocksome , Sameer Kumar , Jeffrey J. Parker
发明人： Michael A. Blocksome , Sameer Kumar , Jeffrey J. Parker
IPC分类号： G06F15/16
CPC分类号： H04L29/08135 , G06F9/546 , H04L67/10
摘要： Completion processing of data communications instructions in a distributed computing environment, including receiving, in an active messaging interface (AMI) data communications instructions, at least one instruction specifying a callback function; injecting into an injection FIFO buffer of a data communication adapter, an injection descriptor, each slot in the injection FIFO buffer having a corresponding slot in a pending callback list; listing in the pending callback list any callback function specified by an instruction, incrementing a pending callback counter for each listed callback function; transferring payload data as per each injection descriptor, incrementing a transfer counter upon completion of each transfer; determining from counter values whether the pending callback list presently includes callback functions whose data transfers have been completed; calling by the AMI any such callback functions from the pending callback list, decrementing the pending callback counter for each callback function called.
摘要翻译：包括在分布式计算环境中对数据通信指令的完成处理，包括在活动消息接口（AMI）数据通信指令中接收指定回调函数的至少一个指令; 注入到数据通信适配器的注入FIFO缓冲器中，注入描述符，注入FIFO缓冲器中的每个时隙在待处理回呼列表中具有对应的时隙; 在挂起的回调列表中列出由指令指定的任何回调函数，为每个列出的回调函数增加待决回调计数器; 根据每个注入描述符传送有效载荷数据，在每次传送完成时增加传输计数器; 从计数器值确定待处理回呼列表当前是否包括其数据传输已经完成的回调函数; 由AMI从挂起的回调列表中调用任何这样的回调函数，为调用的每个回调函数递减挂起的回调计数器。

9. 发明授权

US07890670B2 Direct memory access transfer completion notification 有权
标题翻译：直接内存访问传输完成通知
公开(公告)号：US07890670B2
公开(公告)日：2011-02-15
申请号：US11746348
申请日：2007-05-09
申请人： Charles J. Archer , Michael A. Blocksome , Jeffrey J. Parker
发明人： Charles J. Archer , Michael A. Blocksome , Jeffrey J. Parker
IPC分类号： G06F13/28 , G06F12/00
CPC分类号： G06F13/28
摘要： DMA transfer completion notification includes: inserting, by an origin DMA engine on an origin node in an injection first-in-first-out (‘FIFO’) buffer, a data descriptor for an application message to be transferred to a target node on behalf of an application on the origin node; inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the message, the completion notification descriptor specifying a packet header for a completion notification packet; transferring, by the origin DMA engine to the target node, the message in dependence upon the data descriptor; sending, by the origin DMA engine, the completion notification packet to a local reception FIFO buffer using a local memory FIFO transfer operation; and notifying, by the origin DMA engine, the application that transfer of the message is complete in response to receiving the completion notification packet in the local reception FIFO buffer.
摘要翻译： DMA传输完成通知包括：由原始DMA引擎插入先进先出（“FIFO”）缓冲器中的原始节点，代表要传送到目标节点的应用消息的数据描述符原始节点上的应用程序; 由原始DMA引擎在消息的数据描述符之后插入注入FIFO缓冲器中的完成通知描述符，完成通知描述符指定完成通知包的包头; 根据数据描述符将原始DMA引擎传送到目标节点消息; 通过原始DMA引擎，使用本地存储器FIFO传送操作将完成通知包发送到本地接收FIFO缓冲器; 并且由原始DMA引擎通知响应于在本地接收FIFO缓冲器中接收到完成通知分组来完成该消息的传送的应用程序。

10. 发明申请

US20080273543A1 Signaling Completion of a Message Transfer from an Origin Compute Node to a Target Compute Node 失效
标题翻译：从原始计算节点到目标计算节点的信令传输的信令完成
公开(公告)号：US20080273543A1
公开(公告)日：2008-11-06
申请号：US11744319
申请日：2007-05-04
申请人： Michael A. Blocksome , Jeffrey J. Parker
发明人： Michael A. Blocksome , Jeffrey J. Parker
IPC分类号： H04L12/26
CPC分类号： G06F13/28 , H04L49/15 , H04L49/1515
摘要： Signaling completion of a message transfer from an origin node to a target node includes: sending, by an origin DMA engine, an RTS message, the RTS message specifying an application message for transfer to the target node from the origin node; receiving, by the origin DMA engine, a remote get message containing a data descriptor for the message and a completion notification descriptor, the completion notification descriptor specifying a local direct put transfer operation for transferring data locally on the origin node; inserting, by the origin DMA engine in an injection FIFO buffer, the data descriptor followed by the completion notification descriptor; transferring, by the origin DMA engine to the target node, the message in dependence upon the data descriptor; and notifying, by the origin DMA engine, the application that transfer of the message is complete in dependence upon the completion notification descriptor.
摘要翻译：从原始节点到目标节点的消息传送的信令完成包括：由原始DMA引擎发送RTS消息，RTS消息指定用于从原始节点传送到目标节点的应用消息; 由原始DMA引擎接收包含消息的数据描述符的远程获取消息和完成通知描述符，完成通知描述符指定用于在原点上本地传送数据的本地直接传送操作; 由原始DMA引擎在注入FIFO缓冲器中插入数据描述符，后跟完成通知描述符; 根据数据描述符将原始DMA引擎传送到目标节点消息; 并且由原始DMA引擎通知根据完成通知描述符完成消息的传送的应用程序。

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