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81. 发明申请

US20150201396A1 COMMUNICATIONS APPARATUS, COMPUTER PRODUCT, COMMUNICATIONS METHOD, AND COMMUNICATIONS SYSTEM 有权
标题翻译：通信设备，计算机产品，通信方法和通信系统
公开(公告)号：US20150201396A1
公开(公告)日：2015-07-16
申请号：US14669654
申请日：2015-03-26
申请人： FUJITSU LIMITED
发明人： Koichiro YAMASHITA , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara , Toshiya Otomo
IPC分类号： H04W64/00 , H04W24/10 , H04W4/00
CPC分类号： H04W64/006 , H04W4/04 , H04W4/38 , H04W4/70 , H04W24/10
摘要： A communications apparatus is included among a communications apparatus group arranged in a given area and capable of communicating with a nearby communications apparatus. The communications apparatus includes a sensor that detects a given property at a location of the communications apparatus; communications circuitry that receives from the nearby communications apparatus, a detection result that is obtained by another communications apparatus, for the given property at the location of the other communications apparatus; a processor that determines whether a difference between the detection result received by the communications circuitry and a detection result of the sensor is a given amount or less. The communications circuitry transmits the received detection result to the nearby communications apparatus, when the processor determines that the difference is the given amount or less, and refrains from transmitting the received detection result, when the processor determines that the difference is not the given amount or less.
摘要翻译：通信装置被包括在布置在给定区域中并且能够与附近的通信装置通信的通信装置组中。通信装置包括检测通信装置的位置处的给定属性的传感器; 从另一个通信装置接收来自附近的通信装置的通信电路，由另一通信装置获得的检测结果，用于在另一个通信装置的位置处的给定属性; 确定由通信电路接收的检测结果与传感器的检测结果之间的差是否为给定量或更少的处理器。当处理器确定差是给定量或更小时，通信电路将接收到的检测结果发送到附近的通信装置，并且当处理器确定差异不是给定量时，并且不发送接收到的检测结果，减。

82. 发明授权

US09015369B2 Data transferring apparatus and data transferring method 有权
标题翻译：数据传输装置和数据传输方法
公开(公告)号：US09015369B2
公开(公告)日：2015-04-21
申请号：US13624337
申请日：2012-09-21
申请人： Fujitsu Limited
发明人： Takahisa Suzuki , Koichiro Yamashita , Hiromasa Yamauchi , Koji Kurihara
IPC分类号： G06F13/28 , G06F13/00
CPC分类号： G06F13/28
摘要： A memory stores data generated by a processor and a transferring unit burst transfers the data from the memory unit to a processing unit. Based on an access capability of the processor when accessing the memory, a prescribed value for a burst width and information concerning the time that the processing unit consumes to process the data are set in advance at the data transferring apparatus. When the transferring unit performs data transfer, the time allowed for data transfer is calculated based on the information concerning the time that the processing unit consumes to process the data, and the burst width is determined as a value greater than or equal to the prescribed value for the burst width and is as close as possible to the prescribed value for the burst width within a range in which data transfer can be finished within the allowed time.
摘要翻译：存储器存储由处理器生成的数据和传送单元突发将数据从存储器单元传送到处理单元。基于访问存储器时的处理器的访问能力，在数据传送装置上预先设置突发宽度的规定值和处理单元消耗处理数据的时间的信息。当传送单元执行数据传送时，基于处理单元消耗处理数据的时间的信息来计算数据传送所需的时间，突发宽度被确定为大于或等于规定值的值对于突发宽度，并且在允许的时间内可以完成数据传送的范围内，对于突发宽度尽可能接近规定值。

83. 发明授权

US09015364B2 Data transfer control apparatus, data transfer control method, and computer product 有权
公开(公告)号：US09015364B2
公开(公告)日：2015-04-21
申请号：US13718302
申请日：2012-12-18
申请人： Fujitsu Limited
发明人： Hiromasa Yamauchi , Koichiro Yamashita , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F13/28
摘要： A data transfer control apparatus includes a transferring unit that transfers data from a transfer source memory to a transfer destination memory, according to an instruction from a first processor; and a first processor configured to detect a process execute by the first processor, determine whether transfer of the data is urgent, based on the type of the detected process, and control the transferring unit or the first processor to transfer the data, based on a determination result.

84. 发明申请

US20140201546A1 POWER SUPPLY CONTROL METHOD AND SYSTEM 有权
标题翻译：电源控制方法与系统
公开(公告)号：US20140201546A1
公开(公告)日：2014-07-17
申请号：US14213646
申请日：2014-03-14
申请人： FUJITSU LIMITED
发明人： Tetsuo HIRAKI , Hiromasa Yamauchi , Koichiro Yamashita , Fumihiko Hayakawa , Naoki Odate , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F1/266 , G06F1/3228 , G06F1/3265 , H04M1/72561 , H04W52/0251 , Y02D10/153 , Y02D70/164
摘要： A power supply control method includes detecting that a result of a first function performed by a first device ceases to be displayed on a display screen; suspending power supply to the first device and supplying power to a second device, based on a detection of the result ceasing to be displayed; and causing the second device to output a response signal to a CPU in response to a control signal from the CPU.
摘要翻译：一种电源控制方法，包括检测由第一装置执行的第一功能的结果不再显示在显示屏幕上; 基于对不再显示的结果的检测，暂停向第一设备供电并向第二设备供电; 并且响应于来自CPU的控制信号，使第二设备向CPU输出响应信号。

85. 发明申请

US20140143788A1 ASSIGNMENT METHOD AND MULTI-CORE PROCESSOR SYSTEM 有权
标题翻译：分配方法和多核处理系统
公开(公告)号：US20140143788A1
公开(公告)日：2014-05-22
申请号：US14166164
申请日：2014-01-28
申请人： FUJITSU LIMITED
发明人： Koji Kurihara , Koichiro Yamashita , Takahisa Suzuki , Hiromasa Yamauchi , Toshiya Otomo , Naoki ODATE
IPC分类号： G06F9/50
CPC分类号： G06F9/5016 , G06F9/5044
摘要： An assignment method executed by a given core of a multi-core processor includes identifying for each core, the number of storage areas to be used by a given thread and the number of storage areas used by threads already assigned; detecting for each core, a highest value from the number of storage areas used by the threads already assigned; determining whether a sum of a greater value of the detected highest value of a core selected as a candidate assignment destination and the number of storage areas to be used by the given thread, and the detected highest value of the cores excluding the selected core, is at most the number of storage areas of the shared resource; and assigning the given thread to the selected core, when the sum is at most the number of storage areas of the shared resource.
摘要翻译：由多核处理器的给定核心执行的分配方法包括识别每个核心，给定线程使用的存储区域的数量以及已经分配的线程使用的存储区域的数量; 检测每个核心，从已经分配的线程使用的存储区域的数量的最大值; 确定被选择为候选分配目的地的核心的检测到的最高值的较大值与由给定线程使用的存储区域的数量的总和以及检测到的不包括所选择的核心的核心的最大值之和是否为最多共享资源的存储区域数; 并且当给定的线程最多为共享资源的存储区域的数量时，将给定的线程分配给所选择的核心。

86. 发明申请

US20140095573A1 DATA COMMUNICATION METHOD AND DATA COMMUNICATION SYSTEM 有权
标题翻译：数据通信方法与数据通信系统
公开(公告)号：US20140095573A1
公开(公告)日：2014-04-03
申请号：US14095167
申请日：2013-12-03
申请人： FUJITSU LIMITED
发明人： Koji Kurihara , Koichiro Yamashita , Takahisa Suzuki , Hiromasa Yamauchi , Toshiya Otomo , Naoki Odate
IPC分类号： H04L29/08
CPC分类号： H04L67/10 , H04L67/1095 , H04L67/2838 , H04W4/08 , H04W4/18
摘要： A data communication method includes registering as a group and by a first data processing device of plural data processing devices, at least one second data processing device capable of communicating with the first data processing device; transmitting by the first data processing device and to the data processing devices, a first reception request for data; transmitting by the first data processing device and to the at least one second data processing device, a second reception request for the data when there is no response to the first reception request from the first data processing devices; and transmitting the data to the second data processing device, by the first data processing device and based on a response from the second data processing device.
摘要翻译：一种数据通信方法，包括以多组数据处理装置作为组和第一数据处理装置登记能够与第一数据处理装置通信的至少一个第二数据处理装置; 由第一数据处理装置和数据处理装置发送第一数据接收请求; 当由第一数据处理设备和至少一个第二数据处理设备发送时，对来自第一数据处理设备的第一接收请求没有响应的数据的第二接收请求; 以及由所述第一数据处理装置根据来自所述第二数据处理装置的响应将数据发送到所述第二数据处理装置。

87. 发明申请

US20140032700A1 DATA PROCESSING METHOD AND MOBILE TERMINAL 审中-公开
标题翻译：数据处理方法和移动终端
公开(公告)号：US20140032700A1
公开(公告)日：2014-01-30
申请号：US14041566
申请日：2013-09-30
申请人： FUJITSU LIMITED
发明人： Koji Kurihara , Koichiro Yamashita , Takahisa Suzuki , Hiromasa Yamauchi , Toshiya Otomo , Naoki Odate
IPC分类号： H04L29/08
CPC分类号： G06F15/173 , A63F2300/408 , G06F9/46 , G06F9/52 , G06F9/544 , G06F15/17331 , H04L67/06
摘要： A data processing method is executed by a first device, and includes suspending execution of a first process by the first device that belongs to a first device group that includes plural devices; saving based on a request for execution of a second process from a second device that belongs to a second device group that includes plural devices, process information of the first process to shared memory that is set in each of the devices of the first device group and shared by the devices of the first device group; and releasing the saving of the process information of the first process consequent to completion of the execution of the second process.
摘要翻译：数据处理方法由第一设备执行，并且包括由属于包括多个设备的第一设备组的第一设备暂停执行第一处理; 基于来自属于包括多个设备的第二设备组的第二设备执行第二处理的请求的保存，所述第一进程的处理信息设置在所述第一设备组的每个设备中的共享存储器，以及由第一设备组的设备共享; 并且释放在完成第二处理的执行之后保存第一处理的处理信息。

88. 发明申请

US20140025903A1 MULTI-CORE PROCESSOR SYSTEM 审中-公开
标题翻译：多核处理器系统
公开(公告)号：US20140025903A1
公开(公告)日：2014-01-23
申请号：US14036758
申请日：2013-09-25
申请人： FUJITSU LIMITED
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F12/14
CPC分类号： G06F12/1483 , G06F11/1658 , G06F11/1666 , G06F11/167 , G06F11/20 , G06F12/1491 , G06F21/78
摘要： A multi-core processor system includes CPUs; memory; and a memory protect controller that is disposed between the plurality of CPUs and the memory, and that accesses a first memory area consequent to an access request of the CPUs upon application execution and further accesses a second memory area established when the system is booted.
摘要翻译：多核处理器系统包括CPU; 记忆; 以及存储器保护控制器，其设置在所述多个CPU和所述存储器之间，并且在应用执行时访问由所述CPU进行访问请求的第一存储器区域，并进一步访问在所述系统引导时建立的第二存储器区域。

89. 发明申请

US20140019989A1 MULTI-CORE PROCESSOR SYSTEM AND SCHEDULING METHOD 审中-公开
标题翻译：多核处理器系统和调度方法
公开(公告)号：US20140019989A1
公开(公告)日：2014-01-16
申请号：US14026285
申请日：2013-09-13
申请人： FUJITSU LIMITED
发明人： Takahisa Suzuki , Koichiro Yamashita , Hiromasa Yamauchi , Koji Kurihara , Toshiya Otomo , Naoki Odate
IPC分类号： G06F9/50
CPC分类号： G06F9/5088
摘要： A multi-core processor system includes plural CPUs; memory that is shared among the CPUs; and a monitoring unit that instructs a change of assignment of threads to the CPUs based on a first process count stored in the memory and representing a count of processes under execution by the CPUs and a second process count representing a count of processes assigned to the CPUs, respectively.
摘要翻译：多核处理器系统包括多个CPU; 在CPU之间共享的内存; 以及监视单元，其基于存储在所述存储器中的第一处理计数来指示将所述线程的分配改变为CPU，并且表示由所述CPU执行的处理的计数，以及表示分配给所述CPU的处理的计数的第二处理计数，分别。

90. 发明申请

US20140019717A1 SYNCHRONIZATION METHOD, MULTI-CORE PROCESSOR SYSTEM, AND SYNCHRONIZATION SYSTEM 有权
标题翻译：同步方法，多核处理器系统和同步系统
公开(公告)号：US20140019717A1
公开(公告)日：2014-01-16
申请号：US14026469
申请日：2013-09-13
申请人： FUJITSU LIMITED
发明人： Koichiro Yamashita , Hiromasa Yamauchi , Takahisa Suzuki , Koji Kurihara
IPC分类号： G06F15/78
CPC分类号： G06F15/7839 , G06F8/458 , G06F9/30087 , G06F9/3834 , G06F9/3838 , G06F9/3842 , G06F9/3885 , G06F9/467 , G06F9/52 , G06F9/544 , G06F15/167 , G06F2212/507
摘要： A synchronization method is executed by a multi-core processor system. The synchronization method includes registering based on a synchronous command issued from a first CPU, CPUs to be synchronized and a count of the CPUs into a specific table; counting by each of the CPUs and based on a synchronous signal from the first CPU, an arrival count for a synchronous point, and creating by each of the CPUs, a second shared memory area that is a duplication of a first shared memory area accessed by processes executed by the CPUs; and comparing the first shared memory area and the second shared memory area when the arrival count becomes equal to the count of the CPUs, and based on a result of the comparison, judging the processes executed by the CPUs.
摘要翻译：同步方法由多核处理器系统执行。同步方法包括基于从第一CPU发出的同步命令，要同步的CPU和CPU的计数到特定表中进行注册; 由每个CPU进行计数，并且基于来自第一CPU的同步信号，同步点的到达计数以及由每个CPU创建作为第一共享存储器区域的复制的第二共享存储区域由CPU执行的进程; 以及当到达计数等于CPU的计数时，比较第一共享存储区域和第二共享存储区域，并且基于比较结果，判断由CPU执行的处理。

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