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81. 发明申请

US20160179121A1 TRANSMISSION CHANNEL FOR ULTRASOUND APPLICATIONS 有权
标题翻译：用于超声波应用的传输通道
公开(公告)号：US20160179121A1
公开(公告)日：2016-06-23
申请号：US14573438
申请日：2014-12-17
申请人： STMicroelectronics S.r.l.
发明人： Davide Ugo Ghisu , Sandro Rossi , Dario Bianchi
IPC分类号： G05F3/02 , H03K19/0185
CPC分类号： B06B1/0215 , A61B8/4483 , G05F3/02 , H03K3/356182 , H03K17/0822 , H03K17/687 , H03K19/018521 , H03K2217/0063
摘要： A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a buffer with anti-memory circuitry to couple drains of the buffer transistors to voltage reference terminals during a clamping phase.
摘要翻译：传输通道传输高电压脉冲并接收高电压脉冲的回波。传输通道包括具有防存储器电路的缓冲器，以在夹持阶段将缓冲晶体管的漏极耦合到电压参考端子。

82. 发明申请

US20160161969A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20160161969A1
公开(公告)日：2016-06-09
申请号：US14698438
申请日：2015-04-28
申请人： SK hynix Inc.
发明人： Tae-Heui KWON
IPC分类号： G05F3/02
CPC分类号： G05F3/02
摘要： A semiconductor device may include: a first reference voltage generation unit: suitable for outputting an external voltage as a first reference voltage and clamping the first reference voltage based on a preset voltage in a positive direction from a ground voltage; a first internal voltage generation unit suitable for receiving the external voltage to drive an internal voltage terminal with a drivability corresponding to the first reference voltage; and a second internal voltage generation unit suitable for receiving the external voltage to drive the internal voltage terminal based on a second reference voltage greater than the preset voltage in the positive direction from the ground voltage.
摘要翻译：半导体器件可以包括：第一参考电压产生单元，适于输出作为第一参考电压的外部电压，并且基于来自接地电压的正方向的预设电压来钳位第一参考电压; 第一内部电压产生单元，其适于接收外部电压以驱动具有与第一参考电压相对应的驾驶性能的内部电压端子; 以及第二内部电压产生单元，其适于接收外部电压以基于大于来自接地电压的正方向上的预设电压的第二参考电压来驱动内部电压端子。

83. 发明申请

US20160156347A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20160156347A1
公开(公告)日：2016-06-02
申请号：US14643321
申请日：2015-03-10
申请人： Kabushiki Kaisha Toshiba
发明人： Masayuki USUDA
IPC分类号： H03K17/22 , G05F3/02
CPC分类号： H03K17/223 , G05F3/02
摘要： According to one embodiment, a semiconductor device includes a reference circuit configured to generate a bias voltage, a regulator configured to generate a regulator output based on the bias voltage and a power supply voltage, an integrated circuit to which the regulator output is supplied as a power supply, and a reset circuit configured to detect whether a difference between the bias voltage and the power supply voltage is equal to or higher than a threshold voltage and output a reset signal based on a detection result.
摘要翻译：根据一个实施例，半导体器件包括被配置为产生偏置电压的参考电路，被配置为基于偏置电压和电源电压产生调节器输出的调节器，调节器输出被提供给其的集成电路电源，以及复位电路，被配置为检测偏置电压和电源电压之间的差是否等于或高于阈值电压，并且基于检测结果输出复位信号。

84. 发明申请

US20160147245A1 VOLTAGE REFERENCE CIRCUIT 有权
标题翻译：电压参考电路
公开(公告)号：US20160147245A1
公开(公告)日：2016-05-26
申请号：US14554353
申请日：2014-11-26
申请人： Taiwan Semiconductor Manufacturing Company Limited
发明人： Amit Kundu , Jaw-Juinn Horng
IPC分类号： G05F3/02
CPC分类号： G05F3/262 , G05F3/02
摘要： A voltage reference circuit is provided. In some embodiments, the voltage reference circuit includes a MOS stack that includes two or more MOS transistors having a substantially same voltage threshold. The voltage reference circuit is configured to generate, via the MOS stack, a first voltage waveform having a first temperature co-efficient and a second voltage waveform having a second temperature co-efficient. In some embodiments, the first temperature co-efficient has a polarity that is opposite a polarity of the second temperature co-efficient. In some embodiments, the first voltage waveform and the second voltage waveform are used to generate a reference voltage waveform, where the reference voltage waveform is substantially temperature independent due to the opposite polarities of the first temperature co-efficient and the second temperature co-efficient.
摘要翻译：提供电压参考电路。在一些实施例中，电压参考电路包括MOS堆叠，其包括具有基本相同的电压阈值的两个或更多个MOS晶体管。电压参考电路被配置为经由MOS堆叠产生具有第一温度系数的第一电压波形和具有第二温度系数的第二电压波形。在一些实施例中，第一温度系数具有与第二温度系数的极性相反的极性。在一些实施例中，第一电压波形和第二电压波形用于产生参考电压波形，其中由于第一温度系数和第二温度系数的相反极性，参考电压波形基本上是温度无关的。

85. 发明申请

US20160141304A1 METHOD TO MATCH SOI TRANSISTORS USING A LOCAL HEATER ELEMENT 审中-公开
标题翻译：使用本地加热器元件匹配SOI晶体管的方法
公开(公告)号：US20160141304A1
公开(公告)日：2016-05-19
申请号：US15003927
申请日：2016-01-22
申请人： Texas Instruments Incorporated
发明人： Andrew Marshall
IPC分类号： H01L27/12 , H01L49/02 , G05F3/02 , H01L23/34 , H01L21/3205 , H01L21/3215 , H01L21/84 , H01L27/06
CPC分类号： H01L27/1203 , G05F3/02 , H01C17/26 , H01L21/32055 , H01L21/32155 , H01L21/84 , H01L23/345 , H01L27/0629 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit with a matched transistor pair with a matching resistance heater coupled to each transistor of the matched transistor pair. A method for forming a matching resistance heater. A method for operating an SOI integrated circuit containing a matched transistor pair with a matching resistance heater coupled to each transistor of the matched transistor pair.
摘要翻译：具有匹配晶体管对的集成电路，其具有耦合到匹配晶体管对的每个晶体管的匹配电阻加热器。一种形成匹配电阻加热器的方法。一种用于操作含有匹配电阻加热器的匹配晶体管对的SOI集成电路的方法，耦合到匹配晶体管对的每个晶体管。

86. 发明授权

US09323270B1 Transmission channel for ultrasound applications 有权
标题翻译：用于超声波应用的传输通道
公开(公告)号：US09323270B1
公开(公告)日：2016-04-26
申请号：US14553749
申请日：2014-11-25
申请人： STMicroelectronics S.r.l.
发明人： Sandro Rossi , Davide Ugo Ghisu , Fabio Quaglia , Antonio Davide Leone
IPC分类号： G05F3/02
CPC分类号： G05F3/02 , B06B1/0215 , H03K4/94 , H03K17/162
摘要： A transmission channel transmits high-voltage pulses and receives echos of the high-voltage pulses. The transmission channel includes a current generator circuit, which generates current-integrator drive currents, a receiver, which amplifies transducer-echo signals, and control circuitry. The control circuitry generates one or more control signals to control generation of current-integrator drive currents by the current generator circuit during transducer-driving periods and reception of transducer-echo signals by the receiver during echo-reception periods. A current integrator integrates current-integrator drive currents generated by current generator circuit to generate transducer drive signals.
摘要翻译：传输通道传输高电压脉冲并接收高电压脉冲的回波。传输通道包括产生电流积分器驱动电流的电流发生器电路，放大换能器回波信号的接收器和控制电路。控制电路产生一个或多个控制信号，以在换能器驱动期间由电流发生器电路控制电流积分器驱动电流的产生，并且在回波接收周期期间由接收器接收换能器 - 回波信号。电流积分器集成了由电流发生器电路产生的电流积分器驱动电流以产生换能器驱动信号。

87. 发明授权

US09323269B1 Voltage regulator with positive and negative power supply spike rejection 有权
标题翻译：稳压器正负电源尖峰抑制
公开(公告)号：US09323269B1
公开(公告)日：2016-04-26
申请号：US14323067
申请日：2014-07-03
申请人： Marvell International Ltd.
发明人： Chih-Kai Kang , Wyant Chan , Pierte Roo
IPC分类号： G05F3/16 , G05F3/20 , H02H7/00 , H02H9/00 , G05F3/02
CPC分类号： G05F3/02 , G05F1/467 , G05F1/468 , H02H9/04
摘要： A voltage regulator includes a supply filter, a bias filter, and first and second circuits. The supply filter is configured to operate from a supply voltage, and to generate a filtered supply voltage at a first node. The supply filter includes a transistor and a capacitor. First and control terminals of the transistor receive the supply voltage. A second terminal of the transistor and a first terminal of the capacitor are connected to the first node. The first circuit is configured to operate from both the supply voltage and the filtered supply voltage, and to generate a second reference voltage based on an input reference voltage. The bias filter is configured to generate a filtered second reference voltage based on the second reference voltage. The second circuit is configured to operate from the filtered supply voltage, and to generate a regulated voltage based on the filtered second reference voltage.
摘要翻译：电压调节器包括电源滤波器，偏置滤波器以及第一和第二电路。电源滤波器被配置为从电源电压操作，并且在第一节点处产生经滤波的电源电压。电源滤波器包括晶体管和电容器。晶体管的第一个和控制端接收电源电压。晶体管的第二端子和电容器的第一端子连接到第一节点。第一电路被配置为从电源电压和滤波的电源电压两者操作，并且基于输入参考电压产生第二参考电压。偏置滤波器被配置为基于第二参考电压产生滤波的第二参考电压。第二电路被配置为根据滤波的电源电压进行工作，并且基于滤波的第二参考电压产生调节电压。

88. 发明授权

US09323268B2 Low voltage isolation switch, in particular for a transmission channel for ultrasound applications 有权
标题翻译：低电压隔离开关，特别适用于超声波应用的传输通道
公开(公告)号：US09323268B2
公开(公告)日：2016-04-26
申请号：US13538598
申请日：2012-06-29
申请人： Sandro Rossi , Antonio Ricciardo , Davide Ugo Ghisu
发明人： Sandro Rossi , Antonio Ricciardo , Davide Ugo Ghisu
IPC分类号： H03K17/56 , H03K17/16 , H03K17/30 , G05F3/02 , H03K19/0185 , H03K19/0944
CPC分类号： G05F3/02 , H03K19/018521 , H03K19/09443
摘要： A switching circuit is electrically coupled between a connection terminal and an output terminal of a transmission channel and includes first and second switching transistors electrically coupled in series to each other and having respective body diodes in anti-series, between the connection terminal and the output terminal. The switching circuit comprises a bootstrap circuit connected to respective first and second control terminals of these first and one second switching transistors, as well as to respective first and second voltage references. The bootstrap circuit includes a first parasitic capacitance electrically coupled between the first control terminal and a first bootstrap node, and a second parasitic capacitance electrically coupled between the second control terminal and a second bootstrap node. The parasitic capacitances have value of at least one order of magnitude lower with respect to the gate-source capacitances of the first and second switching transistors.
摘要翻译：开关电路电耦合在传输通道的连接端子和输出端子之间，并且包括彼此串联耦合并且具有反串联的相应体二极管的第一和第二开关晶体管，在连接端子和输出端子之间。开关电路包括连接到这些第一和第二开关晶体管的相应第一和第二控制端的自举电路，以及相应的第一和第二电压基准。引导电路包括电耦合在第一控制端和第一自举节点之间的第一寄生电容以及电耦合在第二控制端和第二自举节点之间的第二寄生电容。寄生电容具有相对于第一和第二开关晶体管的栅极 - 源极电容降低至少一个数量级的值。

89. 发明授权

US09300293B2 Fault detection for a distributed signal line 有权
标题翻译：分布式信号线的故障检测
公开(公告)号：US09300293B2
公开(公告)日：2016-03-29
申请号：US13894014
申请日：2013-05-14
申请人： Advanced Micro Devices, Inc.
发明人： Donald A. Priore , John G. Petrovick, Jr. , Stephen V. Kosonocky , Robert S. Orefice
IPC分类号： H03K19/00 , G05F1/10 , G05F3/02 , H03K19/003
CPC分类号： H03K19/003
摘要： An integrated circuit device includes a first signal line for distributing a first signal. The first signal line includes a plurality of branch lines, and a leaf node is defined at an end of each branch line. First logic is coupled to the leaf nodes and operable to generate a first status signal indicative of a collective first logic state of the leaf nodes of the signal line corresponding to the first signal.
摘要翻译：集成电路装置包括用于分配第一信号的第一信号线。第一信号线包括多个分支线，并且在每个分支线的末端定义叶节点。第一逻辑耦合到叶节点并且可操作以产生指示对应于第一信号的信号线的叶节点的集体第一逻辑状态的第一状态信号。

90. 发明申请

US20160071823A1 STACK PACKAGE AND SYSTEM-IN-PACKAGE INCLUDING THE SAME 有权
标题翻译：堆叠包装和系统包装，包括它们
公开(公告)号：US20160071823A1
公开(公告)日：2016-03-10
申请号：US14570888
申请日：2014-12-15
申请人： SK hynix Inc
发明人： Sang-Hwan KIM
IPC分类号： H01L25/065 , G05F3/02
CPC分类号： H01L25/0657 , G05F3/02 , H01L2224/05554 , H01L2224/48091 , H01L2224/48145 , H01L2924/0002 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A system-in-package includes first and second semiconductor chips disposed in a first region over a substrate, and a controller disposed in a second region over the substrate and selectively supplying a power supply voltage to the first or second semiconductor chip based on a data output operation of the first and second semiconductor chips, wherein each of the first and second semiconductor chips includes a first power supply region coupled with the controller through a first line and receiving the power supply voltage from the controller in common during an input/output operation of the first and second semiconductor chips, an output driver suitable for outputting data, and a second power supply region independently coupled with the controller through one of a second line and a third line and independently receiving the power supply voltage for an operation of the output driver from the controller during the data output operation.
摘要翻译：系统级封装包括：布置在衬底上的第一区域中的第一和第二半导体芯片，以及设置在衬底上的第二区域中的控制器，并且基于数据选择性地向第一或第二半导体芯片提供电源电压第一和第二半导体芯片的输出操作，其中第一和第二半导体芯片中的每一个包括通过第一线与控制器耦合的第一电源区域，并且在输入/输出操作期间从控制器接收来自控制器的电源电压第一和第二半导体芯片的输出驱动器，适于输出数据的输出驱动器，以及通过第二线路和第三线路之一独立地与控制器耦合的第二电源区域，并独立地接收用于输出的操作的电源电压在数据输出操作期间控制器的驱动程序。

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