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1. 发明申请

US20230030354A1 METHOD FOR ANNEALING BONDING WAFERS 有权
公开(公告)号：US20230030354A1
公开(公告)日：2023-02-02
申请号：US17874742
申请日：2022-07-27
申请人： IHP GmbH - Innovations for High Performance Microelectronics / Leibniz-Institut fur Innovative Mikro
发明人： Patrick Krüger , Thomas Voss , Matthias Wietstruck
IPC分类号： C04B37/00 , C03B25/02
摘要： The invention relates to a method for annealing of at least two wafers bonded via low-temperature direct bonding comprising heating the bonded wafers up to a first annealing temperature in the range of 100° C. to 500° C., preferably 150° C. to 400° C., even more preferred 150° C. to 200° C., holding the first annealing temperature in a range of 1 to 4 hours, preferably 1 to 3 hours, cooling down the bonded wafers to room temperature, re-heating the bonded wafers to a second annealing temperature in the range of 100° C. to 500° C., preferably 150° C. to 400° C., even more preferred 150° C. to 200° C., and cooling down the bonded wafers to room temperature.

2. 发明授权

US11527271B2 Self-correcting modular-redundancy-memory device 有权
公开(公告)号：US11527271B2
公开(公告)日：2022-12-13
申请号：US17466015
申请日：2021-09-03
申请人： IHP GmbH—Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik
发明人： Oliver Schrape , Anselm Breitenreiter , Frank Vater , Milos Krstic
IPC分类号： G11C7/10 , G11C7/22 , H03K5/135 , H03K5/15
摘要： The invention is directed to a self-correcting modular-redundancy-memory device, comprising three bistable-memory elements and a majority voter. The bistable-memory elements receive respective binary data signal, clock signal, and a feedback signal. Each of the bistable-memory elements is configured, in response to the clock signal assuming a first value, to provide a binary output signal with an output-signal value correlated to a data-signal value of the data signal, and in response to the clock signal assuming a second clock-signal value, to provide the output signal with the output-signal value indicative of a current feedback-signal value of the feedback signal. The majority voter receives the output signals each of the bistable-memory elements and is configured to provide the feedback signal with the feedback-signal value indicative of that output-signal value taken on by a majority of the currently received output signals.

3. 发明申请

US20220197066A1 SLOT WAVEGUIDE FOR A PHASE SHIFTER BASED ON FERROELECTRIC MATERIALS 有权
公开(公告)号：US20220197066A1
公开(公告)日：2022-06-23
申请号：US17557345
申请日：2021-12-21
申请人： IHP GmbH- Innovations for High Performance Microelectronics/ Leibniz-Institut fur Innovative Mikroel
发明人： Andreas MAI , Patrick STEGLICH , Christian MAI , Catherine DUBOURDIEU , Veeresh DESHPANDE , Dong-Jik KIM
IPC分类号： G02F1/025
摘要： The present invention relates to a slot waveguide formed by a vertical material stack comprising a top layer with a first refractive index, a center layer including a ferroelectric material and with a second refractive index, and a Si1-xGex pseudosubstrate layer with 0

4. 发明授权

US10693229B2 Electronically pivotable array antenna with broadcast-based control 有权
公开(公告)号：US10693229B2
公开(公告)日：2020-06-23
申请号：US14894069
申请日：2014-05-27
申请人： IHP GMBH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS LEIBNIZ-INSTITUT FUR INNOVATIVE MIKROELEKTRONIK
发明人： Eckhard Grass , Chafik Meliani
IPC分类号： H01Q3/26 , H01Q3/36 , H01Q23/00 , H04L29/06
摘要： The present invention relates to a phased array antenna (10) with an electronically variable antenna pattern, wherein control signals for at least two phased antenna elements (13) are processed for a broadcast transmission and are broadcast to the phased antenna elements (13) via a wireless medium or using feed lines for useful signal components of the phased antenna elements in a frequency band differing from the frequency band of the useful signal components. As a result of using the broadcast transmission in a different frequency band, there is no need for any additional signals or lines for the array antenna, and the complexity of the array antenna can be reduced and the flexibility and reconfigurability can be improved.

5. 发明授权

US09985416B2 CMOS-compatible germanium tunable laser 有权
公开(公告)号：US09985416B2
公开(公告)日：2018-05-29
申请号：US14377032
申请日：2013-02-11
申请人： IHP GmbH—Innovations for High Performance Microelectronics/Leibniz-Institut Fur Innovative Mikroelektronik
发明人： Giovanni Capellini , Christian Wenger , Thomas Schroder , Grzegorz Kozlowski
IPC分类号： H01L27/15 , H01L31/12 , H01L21/00 , H01S5/32 , H01L33/34 , H01S5/02
CPC分类号： H01S5/3201 , H01L33/34 , H01S5/021 , H01S5/3223
摘要： A semiconductor light emitter device, comprising a substrate, an active layer made of Germanium, which is configured to emit light under application of an operating voltage to the semiconductor light emitter device, wherein a gap is arranged on the substrate, which extends between two bridgeposts laterally spaced from each other, the active layer is arranged on the bridgeposts and bridges the gap, and wherein the semiconductor light emitter device comprises a stressor layer, which induces a tensile strain in the active layer above the gap.

6. 发明授权

US09873949B2 Method and device for producing nanotips 有权
公开(公告)号：US09873949B2
公开(公告)日：2018-01-23
申请号：US14897769
申请日：2014-06-13
申请人： IHP GmbH-Innovations for High Performance Microelectronics/Leibniz-Institut Fur Innovative Mikroelektronik
发明人： Wolfgang Mehr , Andre Wolff
IPC分类号： B44C1/22 , C23F4/00 , H01J37/073 , H01J1/304 , H01J9/02 , H01J37/32 , B81C1/00 , C23C16/50 , H01L21/3065 , H01L21/308
CPC分类号： C23F4/00 , B81C1/00111 , C23C16/50 , H01J1/3044 , H01J9/025 , H01J37/073 , H01J37/32963 , H01J37/32981 , H01J2201/30411 , H01J2209/0226 , H01J2237/334 , H01L21/3065 , H01L21/3081
摘要： A method for producing a nanotip from a tip material provides a substrate which consists of the tip material or has the material in the form of a coating, produces a mask from a mask material selected so that, in a predefined reactive ion etching process, the mask material is removed at a lower etching rate than the tip material, and carries out the reactive ion etching process in an etching chamber. The mask material is additionally selected so that a gaseous component is released therefrom during the reactive ion etching process, the gaseous component not being released from the tip material. The method further comprises detecting the gaseous component while the ion etching process is being carried out, repeatedly determining whether an amount of the gaseous component in the etching chamber reaches a predefined lower threshold, and stopping the reactive ion etching process when the lower threshold is reached.

7. 发明授权

US09082809B2 Graphene base transistor having compositionally-graded collector barrier layer 有权
标题翻译：具有组成梯度的集电极阻挡层的石墨烯基晶体管
公开(公告)号：US09082809B2
公开(公告)日：2015-07-14
申请号：US13473873
申请日：2012-05-17
申请人： Jaroslaw Dabrowski , Wolfgang Mehr , Johann Christoph Scheytt , Grzegorz Lupina
发明人： Jaroslaw Dabrowski , Wolfgang Mehr , Johann Christoph Scheytt , Grzegorz Lupina
IPC分类号： H01L29/06 , H01L29/737 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/76
CPC分类号： H01L29/7376 , H01L29/0821 , H01L29/0895 , H01L29/1004 , H01L29/1606 , H01L29/7606
摘要： A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterized in that the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer.
摘要翻译：一种结型晶体管，在衬底上包括发射极层，集电极层和包含石墨烯层的基极层，其中发射极阻挡层设置在基极层和发射极层之间，并且集电极势垒层被布置在基底层和集电体层之间并且与石墨烯层相邻，其特征在于，集电极阻挡层是组成梯度的材料层，其具有在从基极层到集电极层的方向上减小的电子亲和力。

8. 发明授权

US08809667B2 Thermoelectric semiconductor component 有权
标题翻译：热电半导体元件
公开(公告)号：US08809667B2
公开(公告)日：2014-08-19
申请号：US13138199
申请日：2010-01-12
申请人： Martin Kittler , Manfred Reiche
发明人： Martin Kittler , Manfred Reiche
IPC分类号： H01L35/12 , H01L27/16
CPC分类号： H01L35/12 , H01L27/16 , H01L35/32
摘要： A thermoelectric semiconductor component, comprising an electrically insulating substrate surface and a plurality of spaced-apart, alternating p-type (4) and n-type semiconductor structural elements (5) which are disposed on said surface and which are connected to each other in series in an electrically conductive manner alternatingly at two opposite ends of the respective semiconductor structural elements by conductive structures, in such a way that a temperature difference (2ΔT) between the opposite ends produces an electrical voltage between the conductive structures or that a voltage difference between the conductive structures (7, 9; 13, 15) produces a temperature difference (2ΔT) between the opposite ends, characterized in that the semiconductor structural elements have a first boundary surface between a first and a second silicon layer, the lattice structures of which are considered ideal and are rotated by an angle of rotation relative to each other about a first axis perpendicular to the substrate surface and tilted by a tilt angle about a second axis lying parallel to the substrate surface, in such a way that a dislocation network is present in the region of the boundary surface.
摘要翻译：一种热电半导体部件，包括电绝缘基板表面和多个间隔开的交替的p型（4）和n型半导体结构元件（5），它们设置在所述表面上并彼此连接通过导电结构在相应的半导体结构元件的两个相对端处交替地以导电方式串联，使得相对端之间的温差（2＆Dgr; T）在导电结构之间产生电压，或者电压导电结构（7,9; 13,15）之间的差异在相对端之间产生温度差（2＆Dgr; T），其特征在于半导体结构元件具有第一和第二硅层之间的第一边界面，它们的晶格结构被认为是理想的并且围绕第一轴线p相对于彼此旋转旋转角度垂直于衬底表面并且以平行于衬底表面的第二轴线的倾斜角度倾斜，使得位错网络存在于边界表面的区域中。

9. 发明申请

US20140027715A1 P-TYPE GRAPHENE BASE TRANSISTOR 有权
标题翻译： P型石墨基片晶体管
公开(公告)号：US20140027715A1
公开(公告)日：2014-01-30
申请号：US13721360
申请日：2012-12-20
申请人： IHP GmbH - Innovations for High Performance Microelectronics
发明人： Wolfgang Mehr , Jaroslaw Dabrowski , Max Lemme , Gunther Lippert , Grzegorz Lupina , Johann Christoph Scheytt
IPC分类号： H01L29/73
CPC分类号： H01L29/7317 , H01L29/1606 , H01L29/165 , H01L29/267 , H01L29/402 , H01L29/7371 , H01L29/7606
摘要： A hot hole transistor with a graphene base comprises on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer.
摘要翻译：具有石墨烯基底的热孔晶体管在基底上包括发射极层，集电极层和包含石墨烯层的基底层，其中发射极阻挡层设置在基极层和发射极层之间，并且集电极屏障层布置在基底和收集层之间并且邻近石墨烯层。

10. 发明授权

US08227888B2 Semiconductor component with countersignal circuit for preventing crosstalk between electronic assemblies 有权
标题翻译：具有用于防止电子组件之间串扰的集中电路的半导体部件
公开(公告)号：US08227888B2
公开(公告)日：2012-07-24
申请号：US11547578
申请日：2005-04-08
申请人： Gunther Lippert , Gerald Lippert
发明人： Gunther Lippert , Gerald Lippert
IPC分类号： H01L29/00
CPC分类号： H01L27/0248 , H01L21/765 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor component including a first integrated circuit in a substrate which is adapted to produce electrical signals with a high-frequency signal component, wherein the substrate is such that the high-frequency signal component can propagate on a substrate surface and/or in the substrate interior, a second integrated circuit in the same substrate which is such that its function can be compromised by high-frequency signals, and a countersignal circuit in the same substrate which is adapted to deliver an electrical countersignal which at least at a selected location of the substrate surface and/or the substrate interior attenuates or eliminates the high-frequency electrical signal component emanating from the first integrated circuit, wherein the countersignal circuit includes a receiver which is adapted to produce an electrical signal dependent on the instantaneous field strength of the high-frequency signal component, and a shielding transistor provided in the substrate and having a control electrode and a first field electrode and a second field electrode, whose control electrode is connected on the input side to the receiver and whose first and second field electrodes are acted upon with a predeterminable first and second electrical potential.
摘要翻译：一种半导体元件，包括在衬底中的第一集成电路，其适于产生具有高频信号分量的电信号，其中所述衬底使得所述高频信号分量可以在衬底表面和/或所述衬底中传播内部，在相同基板中的第二集成电路，其功能可以被高频信号损害，以及在相同基板中的基准信号电路，其适于传递电信号，该电信号至少在所选择的位置处衬底表面和/或衬底内部衰减或消除从第一集成电路发出的高频电信号分量，其中，该信号电路包括接收器，该接收器适于产生取决于高频电信号的瞬时场强的电信号，频率信号分量，以及设置在基板中的屏蔽晶体管控制电极和第一场电极和第二场电极，其控制电极在输入侧连接到接收器，并且其第一和第二场电极具有可预定的第一和第二电位。

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