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1. 发明授权

US08749291B2 LCD driving circuit with ESD protection 有权
标题翻译： LCD驱动电路具有ESD保护功能
公开(公告)号：US08749291B2
公开(公告)日：2014-06-10
申请号：US12724716
申请日：2010-03-16
申请人： Masakuni Kawagoe , Shoji Nitawaki , Chikashi Fuchigami
发明人： Masakuni Kawagoe , Shoji Nitawaki , Chikashi Fuchigami
IPC分类号： H03K5/08
CPC分类号： G09G3/3681 , G09G3/3692 , G09G2330/04 , G09G2330/06
摘要： A semiconductor integrated circuit has an output terminal connected to an external load, an internal signal line by which the output terminal is connected to an internal node, and a voltage generator that outputs a voltage to the internal node, for output through the internal signal line and the output terminal to the external load. A voltage attenuating element is connected to the internal signal line to attenuate voltage swings on the internal signal line. A limiting circuit is connected to the internal node to limit the voltage at the internal node to a predetermined range. Moderate voltage swings caused by external electromagnetic interference are kept within the predetermined range by the voltage attenuating element, so that the limiting circuit does not operate and the average output voltage is not changed.
摘要翻译：半导体集成电路具有连接到外部负载的输出端子，输出端子连接到内部节点的内部信号线，以及向内部节点输出电压的电压发生器，通过内部信号线输出并将输出端子连接到外部负载。电压衰减元件连接到内部信号线，以衰减内部信号线上的电压摆幅。限制电路连接到内部节点以将内部节点处的电压限制在预定范围内。由外部电磁干扰引起的中等电压摆幅由电压衰减元件保持在预定范围内，使得限制电路不工作，平均输出电压不变。

2. 发明授权

US08723303B2 Multi-chip package semiconductor memory device 有权
标题翻译：多芯片封装半导体存储器件
公开(公告)号：US08723303B2
公开(公告)日：2014-05-13
申请号：US13159513
申请日：2011-06-14
申请人： Hidekazu Nasu , Satoshi Miyazaki
发明人： Hidekazu Nasu , Satoshi Miyazaki
IPC分类号： H01L23/02 , H01L23/48
CPC分类号： G11C5/02 , H01L25/0652 , H01L2224/48145 , H01L2224/48147 , H01L2224/49171 , H01L2224/49175 , H01L2225/06562 , H01L2924/09701 , H01L2924/181 , H01L2924/00 , H01L2924/00012
摘要： An MCP type semiconductor memory device having a structure in which a stack memory chip including a plurality of stacked memory chips and a memory controller chip are juxtaposed on a substrate, which achieves a reduction in package size. The semiconductor memory device includes a stack memory chip including a plurality of stacked memory chips, a substrate on which the stack memory chip is provided, and a memory controller chip adjacent the stack memory chip on the substrate. The stack memory chip is constructed such that an upper memory chip is stacked so as to shift toward a mounting position of the memory controller chip relative to a memory chip immediately below the upper memory chip. At least a part of the memory controller chip is received within a space between the substrate and a part of the stack memory chip that protrudes toward the memory controller chip.
摘要翻译：一种MCP型半导体存储器件，其结构是将包括多个堆叠的存储器芯片的堆叠存储器芯片和存储器控制器芯片并置在基板上，这实现了封装尺寸的减小。半导体存储器件包括堆叠存储器芯片，其包括多个层叠的存储器芯片，其上提供有堆叠存储器芯片的衬底以及与衬底上的堆叠存储器芯片相邻的存储器控制器芯片。堆叠存储器芯片被构造成使得上部存储器芯片被堆叠以便相对于位于上部存储器芯片正下方的存储器芯片朝向存储器控制器芯片的安装位置移动。存储器控制器芯片的至少一部分被接收在衬底和向存储器控制器芯片突出的堆叠存储器芯片的一部分之间的空间内。

3. 发明授权

US08692510B2 Battery charger, voltage monitoring device and self-diagnosis method of reference voltage circuit 有权
标题翻译：电池充电器，电压监测装置和参考电压电路的自诊断方法
公开(公告)号：US08692510B2
公开(公告)日：2014-04-08
申请号：US13172990
申请日：2011-06-30
申请人： Yukihiro Kita
发明人： Yukihiro Kita
IPC分类号： H02J7/00 , H02J7/04
CPC分类号： H02J7/0052 , G01R31/02 , H01M10/4285 , H02J7/0004 , H02J7/0047 , H03M1/34
摘要： Disclosed is a battery charger including a battery cell, a reference voltage generating section, an A/D converting section including an A/D converter and a control section. The reference voltage generating section includes a first reference voltage circuit generating a first reference voltage and a second reference voltage circuit generating a second reference voltage equal to the first reference voltage. To diagnose the A/D converter, the first reference voltage circuit is used. To diagnose the first reference voltage circuit, a second A/D conversion value obtained by A/D converting a second divided voltage of the second reference voltage via the A/D converter using the first reference voltage is compared with a first reference value obtained by A/D converting a first divided voltage of the first reference voltage via the A/D converter using the first reference voltage when the first reference voltage circuit is normal.
摘要翻译：公开了一种电池充电器，其包括电池单元，参考电压产生部分，包括A / D转换器和控制部分的A / D转换部分。参考电压产生部分包括产生第一参考电压的第一参考电压电路和产生等于第一参考电压的第二参考电压的第二参考电压电路。为了诊断A / D转换器，使用第一个参考电压电路。为了诊断第一参考电压电路，将通过使用第一参考电压经由A / D转换器将第二参考电压的第二分压进行A / D转换而获得的第二A / D转换值与由第一参考电压当第一参考电压电路正常时，A / D经由A / D转换器使用第一参考电压转换第一参考电压的第一分压。

4. 发明授权

US08692355B2 Minute capacitance element and semiconductor device using the same 有权
标题翻译：分钟电容元件和使用其的半导体器件
公开(公告)号：US08692355B2
公开(公告)日：2014-04-08
申请号：US12958478
申请日：2010-12-02
申请人： Daisuke Tanaka , Hiroyoshi Ichikura
发明人： Daisuke Tanaka , Hiroyoshi Ichikura
IPC分类号： H01L25/00
CPC分类号： H01L23/5223 , G09G3/3685 , G09G2310/027 , G09G2310/0291 , G09G2320/0204 , H01L23/5225 , H01L2924/0002 , H01L2924/30105 , H03F3/005 , H01L2924/00
摘要： A minute capacitance element has a high accuracy capacitance and is resistant to external noises. The minute capacitance element includes: first and second metal electrodes having respective opposite facets facing each other formed on an insulator layer to define a first gap therebetween; and a shield electrode being connectable to an externally applied potential and formed on the insulator layer within the first gap to define a slit confining a synthetic capacitance.
摘要翻译：微小的电容元件具有高精度的电容并且能够抵抗外部噪声。微电容元件包括：第一和第二金属电极，其具有彼此面对的相对面，形成在绝缘体层上以在其间限定第一间隙; 以及屏蔽电极，其可连接到外部施加的电势，并形成在第一间隙内的绝缘体层上，以限定合成电容的狭缝。

5. 发明授权

US08664798B2 Semiconductor integrated circuit device and power supply circuit 有权
标题翻译：半导体集成电路器件和电源电路
公开(公告)号：US08664798B2
公开(公告)日：2014-03-04
申请号：US12691764
申请日：2010-01-22
申请人： Ken Nozaki
发明人： Ken Nozaki
IPC分类号： H02J1/00
CPC分类号： H02J1/08 , Y10T307/50 , Y10T307/696 , Y10T307/702
摘要： A semiconductor integrated circuit device includes a power supply circuit that generates one or more internal supply voltages from an external supply voltage, and one or more functional circuits that operate on the one or more internal supply voltages. A step-down converter in the power supply circuit generates one or more stepped-down voltages from the external supply voltage. A control circuit in the power supply circuit compares the external supply voltage with a reference voltage and selects the internal supply voltages from among the external supply voltage and the stepped-down voltages according to the result of the comparison. The semiconductor integrated circuit device can accordingly operate on different external power supplies, and can continue to operate on battery power even if the battery voltage drops.
摘要翻译：半导体集成电路器件包括从外部电源电压产生一个或多个内部电源电压的电源电路和一个或多个在一个或多个内部电源电压上工作的功能电路。电源电路中的降压转换器从外部电源电压产生一个或多个降压电压。电源电路中的控制电路将外部电源电压与参考电压进行比较，并根据比较结果从外部电源电压和降压电压中选择内部电源电压。因此，半导体集成电路器件可以在不同的外部电源上工作，并且即使电池电压下降，也可以继续工作在电池电力上。

6. 发明授权

US08624555B2 Voltage monitoring system, voltage monitoring device, and method of setting information 有权
标题翻译：电压监控系统，电压监控装置及信息设定方法
公开(公告)号：US08624555B2
公开(公告)日：2014-01-07
申请号：US13033061
申请日：2011-02-23
申请人： Yoshihiro Murakami
发明人： Yoshihiro Murakami
IPC分类号： H01M10/44 , H01M10/46
CPC分类号： G01R1/00
摘要： A voltage monitoring system includes a plurality of voltage monitoring devices connected to each other in series for monitoring a voltage of each of battery units obtained by dividing per specific number a plurality of batteries connected in series. Each of the voltage monitoring devices includes a reception unit for receiving specific information transmitted from a former stage; a storage unit for storing the specific information received with the reception unit as self specific information; and a transmission unit for adding predetermined information to the specific information received with the reception unit, and for transmitting the specific information to a later stage as later stage specific information.
摘要翻译：电压监视系统包括串联连接的多个电压监视装置，用于监视通过按特定数量划分的串联连接的多个电池获得的每个电池单元的电压。每个电压监视装置包括用于接收从前级发送的特定信息的接收单元; 存储单元，用于将与所述接收单元接收的特定信息存储为自身特定信息; 以及发送单元，用于将预定信息添加到与接收单元接收的特定信息，并且用于将特定信息发送到稍后阶段作为后期特定信息。

7. 发明授权

US08593179B2 Delay circuit and inverter for semiconductor integrated device 有权
标题翻译：半导体集成器件延迟电路和逆变器
公开(公告)号：US08593179B2
公开(公告)日：2013-11-26
申请号：US13241304
申请日：2011-09-23
申请人： Takashi Tomita
发明人： Takashi Tomita
IPC分类号： H03K19/20
CPC分类号： H03H11/265 , H03K5/131 , H03K2005/00039
摘要： An inverter of a delay circuit in a semiconductor integrated device that has a high resistance to an electrostatic discharge. The delay circuit includes at least one inverter. Each inverter has high and low potential parts. The low potential part includes a pair of FETs. A source terminal of one FET is connected to a drain terminal of the other FET at a first common node. The high potential part includes another pair of FETs, with a source terminal of one FET being connected to a drain terminal of the other FET at a second common node. A power supply potential is applied to the first common node when the inverter output becomes a high potential. A ground potential is applied to the second common node when the inverter output becomes a low potential.
摘要翻译：在半导体集成器件中的延迟电路的反相器具有高静电放电性。延迟电路包括至少一个逆变器。每个逆变器具有高低电位部分。低电位部分包括一对FET。一个FET的源极端子在第一公共节点处连接到另一个FET的漏极端子。高电位部分包括另一对FET，其中一个FET的源极端子在第二公共节点处连接到另一个FET的漏极端子。当逆变器输出变为高电位时，向第一公共节点施加电源电位。当逆变器输出变为低电位时，将地电位施加到第二公共节点。

8. 发明授权

US08558562B2 Method and circuitry for identifying type of plug connected to a dual-use jack 有权
标题翻译：用于识别连接到两用插孔的插头类型的方法和电路
公开(公告)号：US08558562B2
公开(公告)日：2013-10-15
申请号：US12926275
申请日：2010-11-05
申请人： Naotaka Saito
发明人： Naotaka Saito
IPC分类号： G01R27/08 , H04R1/10
CPC分类号： H04R5/04 , G01R31/043 , H01R13/703
摘要： This method is applied to a dual-use jack of an electronic device. Either a headphone plug or a line output plug is inserted into the dual-use jack. The method determines the type of a plug connected to the dual-use jack when the plug is inserted into the dual-use jack. The determination is made based on a load resistance of the plug connected to the jack. The method includes feeding an electric current through the load resistance in a first direction. The method compares a voltage across the load resistance to a reference voltage and determines the type of the plug in use. The method also includes feeding an electric current through the load resistance in a second direction. This electric current can reduce or eliminate a pop-noise when the plug type is determined. The second direction is different from the first direction.
摘要翻译：该方法适用于电子设备的双重使用插座。将耳机插头或线路输出插头插入双用途插孔。当插头插入双用途插孔时，该方法确定连接到双用插孔的插头类型。基于连接到千斤顶的插头的负载电阻进行确定。该方法包括沿第一方向馈送电流通过负载电阻。该方法将负载电阻与参考电压进行比较，并确定使用中的插头类型。该方法还包括在第二方向上馈送电流通过负载电阻。当确定插头类型时，该电流可以减少或消除爆音。第二个方向与第一个方向不同。

9. 发明授权

US08522613B2 Acceleration sensor 有权
标题翻译：加速度传感器
公开(公告)号：US08522613B2
公开(公告)日：2013-09-03
申请号：US12942130
申请日：2010-11-09
申请人： Takeharu Suzuki
发明人： Takeharu Suzuki
IPC分类号： G01P15/12
CPC分类号： G01P15/123 , G01P15/0802 , G01P15/18 , G01P2015/0842 , Y10T29/49002 , Y10T83/04
摘要： There is provided an acceleration sensor including: a weight portion; plural fixed portions formed above a bottom plate around a periphery of the weight portion; a beam portion coupling the fixed portions and the weight portion, and holding the weight portion at a position separated from the bottom plate; a detection portion provided at the beam portion and detecting deformation of the beam portion; a frame portion provided so as to project out from the bottom plate and surround the fixed portions at a position separated from the fixed portions; and a lid portion of plate shape that seals an opening of the frame portion.
摘要翻译：提供了一种加速度传感器，包括：重量部分; 多个固定部分，形成在所述重物部分周围的底板上方; 连接所述固定部和所述重物部的梁部，并且将所述配重部保持在与所述底板分离的位置; 检测部，设置在所述梁部，并检测所述梁部的变形; 框架部分，设置成从底板突出并且在与固定部分分离的位置处围绕固定部分; 以及密封框架部分的开口的板形的盖部分。

10. 发明授权

US08519931B2 Source driver for display panel and drive control method 有权
标题翻译：显示面板和驱动控制方式的源驱动程序
公开(公告)号：US08519931B2
公开(公告)日：2013-08-27
申请号：US12473491
申请日：2009-05-28
申请人： Haisong Wang
发明人： Haisong Wang
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G3/3688 , G09G2300/0426 , G09G2310/027 , G09G2320/0233
摘要： A source driver and drive control method that cancel offset voltages and enable quality display when a vertical synchronization signal is not fed to the source driver. A source driver receives a horizontal synchronization signal of an image signal, and a binary control signal which varies in two values in synchronization with the horizontal synchronization signal and in which start values of adjacent frames of the image signal are different, excluding a vertical synchronization signal of the image signal, to apply a drive voltage to source signal lines of a display panel. In the source driver, the vertical cycle of the image signal is analyzed based on the binary control signal; a pseudo vertical synchronization signal is generated based on the vertical cycle; and a cancel operation of an offset voltage component of the drive voltage is performed based on the pseudo vertical synchronization signal.
摘要翻译：一种源驱动器和驱动控制方法，当垂直同步信号未馈送到源驱动器时，其消除偏移电压并使质量显示能力。源极驱动器接收图像信号的水平同步信号，以及与水平同步信号同步地变化的两个值的二进制控制信号，其中图像信号的相邻帧的起始值不同，除了垂直同步信号的图像信号，以将驱动电压施加到显示面板的源极信号线。在源驱动器中，基于二进制控制信号分析图像信号的垂直周期; 基于垂直周期生成伪垂直同步信号; 并且基于伪垂直同步信号执行驱动电压的偏移电压分量的取消操作。

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