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    • 1. 发明授权
    • Circuit configuration with a step-up converter, and inverter circuit having such a circuit configuration
    • 具有升压转换器的电路配置和具有这种电路配置的逆变器电路
    • US09042145B2
    • 2015-05-26
    • US13080791
    • 2011-04-06
    • Christoph Schill
    • Christoph Schill
    • H02M7/155H02M7/537H02J7/34H02J1/10H02J1/00
    • H02M7/537Y10T307/511Y10T307/582Y10T307/696Y10T307/702Y10T307/707
    • An inverter circuit contains a first and second DC sources for providing a DC voltage, a common step-up converter for boosting the DC voltage, an intermediate circuit capacitor connected between the outputs of the common step-up converter, and an inverter for converting the DC voltage provided by the capacitor into an AC voltage. The common step-up converter contains a series circuit having a first inductance and a first rectifier element and is connected between an output of the first DC source and one side of the intermediate circuit capacitor as well as a series circuit which includes a second inductance and a second rectifier element and is connected between an output of the second DC source and another side of the intermediate circuit capacitor. The common step-up converter further contains a common switching element which is connected between the first and second DC sources.
    • 逆变器电路包括用于提供DC电压的第一和第二DC源,用于升压DC电压的公共升压转换器,连接在公共升压转换器的输出之间的中间电路电容器和用于将 电容提供的直流电压为交流电压。 公共升压转换器包括具有第一电感和第一整流器元件的串联电路,并且连接在第一直流电源的输出端和中间电路电容器的一侧之间,以及串联电路,其包括第二电感和 第二整流元件,连接在第二直流电源的输出端和中间电路电容器的另一侧之间。 公共升压转换器还包括连接在第一和第二DC源之间的公共开关元件。
    • 3. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08704410B2
    • 2014-04-22
    • US12962809
    • 2010-12-08
    • Koichi NakayamaTetsuyoshi ShiotaKenichi Kawasaki
    • Koichi NakayamaTetsuyoshi ShiotaKenichi Kawasaki
    • H01H47/00
    • H03K19/0016Y10T307/702Y10T307/74Y10T307/858
    • A semiconductor device includes: a first power line to supply a first voltage to a plurality of internal circuits; a second power line to supply the first voltage to the plurality of internal circuits; a first switch provided between said first power line and each of the plurality of internal circuits; a second switch provided between said second power line and each of the plurality of internal circuits; and a control circuit to control the first switch of a second internal circuit included in the plurality of the internal circuits based on the amounts of noise and voltage drop at power-on in a first circuit included in the plurality of internal circuits.
    • 半导体器件包括:向多个内部电路提供第一电压的第一电力线; 第二电力线,用于向所述多个内部电路提供所述第一电压; 设置在所述第一电力线与所述多个内部电路中的每一个之间的第一开关; 设置在所述第二电力线与所述多个内部电路中的每一个之间的第二开关; 以及控制电路,其基于在所述多个内部电路中包括的第一电路中的通电时的噪声和电压降的量来控制包括在所述多个内部电路中的第二内部电路的第一开关。
    • 4. 发明申请
    • POWER-GOOD SIGNAL GENERATOR AND CONTROLLER WITH POWER SEQUENCING FREE
    • 功率良好的信号发生器和控制器,无功功率
    • US20130175869A1
    • 2013-07-11
    • US13470363
    • 2012-05-14
    • Li-Min LEEZhong-Wei LIUChung-Che YUShian-Sung SHIU
    • Li-Min LEEZhong-Wei LIUChung-Che YUShian-Sung SHIU
    • H02J4/00
    • H02J4/00Y10T307/702Y10T307/951
    • A power-good signal generator generates a power-good signal according to a control signal of a controller, and comprises an impedance element, a controlled transistor and a power sequencing free circuit. An end of the impedance element is coupled to a second voltage source. The controlled transistor has first and second input/output ends and a controlled end, wherein the first input/output end is coupled to the other end of the impedance element to generate the power-good signal. An operating state of the controlled transistor is changed in response to the control signal. The power sequencing free circuit is coupled to the controlled end and one of the first input/output end and the second voltage source. When the second voltage source is supplied before the first voltage source, the power sequencing free circuit turns on the controlled transistor to clamp the power-good signal to be lower than a predetermined voltage level.
    • 功率良好信号发生器根据控制器的控制信号产生功率良好信号,并且包括阻抗元件,受控晶体管和电力排序自由电路。 阻抗元件的端部耦合到第二电压源。 受控晶体管具有第一和第二输入/输出端和受控端,其中第一输入/输出端耦合到阻抗元件的另一端以产生功率良好信号。 控制晶体管的工作状态响应于控制信号而改变。 电源排序自由电路耦合到受控端和第一输入/输出端和第二电压源中的一个。 当在第一电压源之前提供第二电压源时,电力排序自由电路导通受控晶体管,以将功率良好信号钳位到低于预定电压电平。
    • 5. 发明授权
    • Generator set control system
    • 发电机组控制系统
    • US08358036B2
    • 2013-01-22
    • US13329445
    • 2011-12-19
    • Chad Eric DozierEdward Maurer SchroederMatthew Lee Wagner
    • Chad Eric DozierEdward Maurer SchroederMatthew Lee Wagner
    • H02J1/00H02J3/00H02P9/00H02P11/00H02H7/06
    • H02J3/38Y10T307/702Y10T307/718
    • A control system is provided for use with a plurality of generator sets. The control system may have a bus, an arbitration relay, a switching device, a control module, and first, second, and third discrete signal cables. The control module may be configured to receive a group start signal and initiate startup of a first of the plurality of generator sets, and to generate a signal on the first discrete signal cable based on an operational status of the first of the plurality of generator sets. The control module may also be configured to determine if the second discrete signal cable is active, to activate the second discrete signal cable and the arbitration relay based on the determination, and to activate the switching device to connect the first of the plurality of generator sets to the bus based on a status of the third discrete signal cable.
    • 提供了一种与多个发电机组一起使用的控制系统。 控制系统可以具有总线,仲裁中继,交换设备,控制模块以及第一,第二和第三离散信号电缆。 控制模块可以被配置为接收组启动信号并启动多个发电机组中的第一组的启动,并且基于多个发电机组中的第一个发电机组的操作状态在第一离散信号电缆上产生信号 。 所述控制模块还可以被配置为确定所述第二离散信号电缆是否是有效的,以基于所述确定激活所述第二离散信号电缆和所述仲裁继电器,并且激活所述交换设备以连接所述多个发电机组中的第一组 基于第三条离散信号电缆的状态到总线。
    • 8. 发明申请
    • Analog power sequencer and method
    • 模拟电源定序器和方法
    • US20120153992A1
    • 2012-06-21
    • US12928739
    • 2010-12-17
    • Masashi Nogawa
    • Masashi Nogawa
    • H03K5/22H02J4/00
    • G06F1/26Y10T307/50Y10T307/696Y10T307/702Y10T307/735
    • Supply voltage sequencing circuitry includes a first sequencer (10-1) that produces an active level of a Power Good signal PG if a first supply voltage VOUT1 exceeds an upper threshold V90% while a control signal EN_PG is active, and produces an inactive level of PG if EN_PG is inactive. The PG level is latched when a control signal EN is inactive. A Power Down signal PD is produced if VOUT1 is less than a lower threshold V10% while EN is inactive. An active level of PD is produced when EN is active. A power-up sequence of supply voltages VOUT1, VOUT2, and VOUT3 monitored by the first sequencer and similar second (10-2) and third (10-3) sequencers, respectively, is determined by connection of PG of each of the first and second sequencers to control the supply voltage monitored by the next sequencer. A desired power-down sequence of the supply voltages is determined by connections of the PDs of the first and second sequencers in the power-down sequence to EN_PG inputs and EN inputs of other sequencers, respectively, in accordance with a predetermined power-down algorithm.
    • 电源电压排序电路包括第一定序器(10-1),如果在控制信号EN_PG有效时第一电源电压VOUT1超过上阈值V90%,则产生电源良好信号PG的有效电平,并且产生无效电平 PG如果EN_PG不活动。 当控制信号EN无效时,PG电平被锁存。 如果VOUT1小于下限阈值V10%,而EN无效,则会产生掉电信号PD。 当EN活动时,产生PD的有效电平。 由第一定序器和类似的第二(10-2)和第三(10-3)个定序器分别监视的电源电压VOUT1,VOUT2和VOUT3的上电序列分别通过连接第一和第 第二个定序器来控制下一个音序器监控的电源电压。 电源电压的期望掉电序列由下列顺序决定:按照预定的掉电算法,将功率衰减序列中的第一和第二定序器的PD分别连接到EN_PG输入和其他定序器的EN输入端 。