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1. 发明授权

US11255701B2 Capacitive detection, energy transfer, and/or data transfer system 有权
公开(公告)号：US11255701B2
公开(公告)日：2022-02-22
申请号：US16953184
申请日：2020-11-19
申请人： PragmatIC Printing Limited
发明人： Joao De Oliveira
IPC分类号： G01D5/241
摘要： A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the moveable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor. The first moveable entity further comprises a first resistor connecting the first moveable entity electrode to the second moveable entity electrode, and the base further comprises: signal supply means arranged to supply a time-varying electrical signal to the first base electrode; and signal detection means arranged to detect an electrical signal from the second base electrode.

2. 发明授权

US09768782B2 Electronic circuits 有权
公开(公告)号：US09768782B2
公开(公告)日：2017-09-19
申请号：US14905737
申请日：2014-07-16
申请人： Pragmatic Printing Ltd
发明人： Joao de Oliveira , Scott Darren White , Catherine Ramsdale
IPC分类号： H03K3/03 , H03K19/0944 , H03K17/16 , H03K3/037 , H03K3/356 , H03K19/20 , H03K23/00
CPC分类号： H03K19/0944 , H03K3/0315 , H03K3/037 , H03K3/356017 , H03K17/16 , H03K19/09441 , H03K19/20 , H03K23/002
摘要： An electronic circuit comprises: an input terminal; an output terminal; first and second supply rails; first, second, third, and fourth field effect transistors, FETs, each of a first type and each having respective gate, source and drain terminals; and first and second loads. The source of the first FET is connected to the first supply rail, the drain of the first FET and the source of the second FET are connected to the output terminal, the drain of the second FET is connected to the second supply rail, the gate of the third FET and the gate of the fourth FET are connected to the input terminal, the drain of the third FET is connected to the second supply rail, the first load is connected between the first supply rail and the source of the third FET, and the second load is connected between the drain of the fourth FET and the second supply rail. In one aspect of the invention, the gate of the first FET is connected to a node between the source of the third FET and the first load such that a voltage at the source of the third FET is applied to the gate of the first FET, and the gate of the second FET is connected to a node between the drain of the fourth FET and the second load such that a voltage at the drain of the fourth FET is applied to the gate of the second FET.

3. 发明申请

US20150001597A1 SUBSTANTIALLY PLANAR ELECTRONIC DEVICES AND CIRCUITS 有权
标题翻译：主要平面电子设备和电路
公开(公告)号：US20150001597A1
公开(公告)日：2015-01-01
申请号：US14380199
申请日：2013-02-21
申请人： PRAGMATIC PRINTING LIMITED
发明人： Antony Colin Fryer , Richard David Price
IPC分类号： H01L29/66 , H01L27/12 , H01L29/78
CPC分类号： H01L29/66795 , H01L27/1288 , H01L27/1292 , H01L29/7855 , H01L29/78636 , H01L29/7869
摘要： A method of manufacturing a substantially planar electronic device is disclosed. The method employs a resist having three different thicknesses used for defining different structures in a single masking step. Exemplary structures are substantially planar transistors having side-gates and diodes.
摘要翻译：公开了一种制造基本上平面的电子设备的方法。该方法采用具有三种不同厚度的抗蚀剂，其用于在单个掩蔽步骤中限定不同的结构。示例性结构是具有侧栅和二极管的大致平面的晶体管。

4. 发明申请

US20230050030A1 ELECTRONIC DEVICE AND ASSOCIATED METHOD OF MANUFACTURE 有权
公开(公告)号：US20230050030A1
公开(公告)日：2023-02-16
申请号：US17761290
申请日：2020-09-15
申请人： PRAGMATIC PRINTING LIMITED
发明人： Brian COBB
IPC分类号： G06K19/077 , G06F7/58 , G06F21/60
摘要： An electronic device is disclosed that comprises a substrate and an electronic circuit with a layer between them. The layer comprises an electrically insulating medium containing a spatial distribution of conductive elements. The electronic circuit comprises memory contacts arranged for electrical connection to a corresponding contact on the substrate when at least one of the conductive element forms a connection between a memory contact and the corresponding contact but for electrical insulation from the corresponding contact when no conductive elements forms such a connection. A selection of the memory contacts, that is at least partially random, is thus electrically connected to the corresponding contact on the substrate. Memory circuitry is configured to store a representation of a respective electrical connection status of the memory contacts.

5. 发明申请

US20210072047A1 Capacitive Detection, Energy Transfer, and/or Data Transfer System 有权
公开(公告)号：US20210072047A1
公开(公告)日：2021-03-11
申请号：US16953184
申请日：2020-11-19
申请人： PragmatIC Printing Limited
发明人： Joao De Oliveira
IPC分类号： G01D5/241
摘要： A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the moveable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor. The first moveable entity further comprises a first resistor connecting the first moveable entity electrode to the second moveable entity electrode, and the base further comprises: signal supply means arranged to supply a time-varying electrical signal to the first base electrode; and signal detection means arranged to detect an electrical signal from the second base electrode.

6. 发明申请

US20230026967A1 A METHOD OF CONNECTING CIRCUIT ELEMENTS 有权
公开(公告)号：US20230026967A1
公开(公告)日：2023-01-26
申请号：US17792440
申请日：2021-01-29
申请人： PRAGMATIC PRINTING LIMITED
发明人： Ken WILLIAMSON , Richard PRICE , Scott WHITE
IPC分类号： H01L23/538 , G06K19/077 , H01L21/48 , H05K1/18
摘要： The present invention relates to a method of connecting circuit elements and a corresponding system for connecting circuit elements. The method includes providing a plurality of flexible circuit elements on a carrier element; forming a connecting structure. The formed connecting structure includes at least two contact points; and operative connections between each of the plurality of flexible circuit elements and the at least two contact points. The method further includes severing the operative connection between at least one of the plurality of flexible circuit elements and the at least two contact points.

7. 发明授权

US10020377B2 Electronic devices 有权
公开(公告)号：US10020377B2
公开(公告)日：2018-07-10
申请号：US15345360
申请日：2016-11-07
申请人： Pragmatic Printing Ltd
发明人： John James Gregory , Richard David Price
IPC分类号： G03F7/20 , H01L27/22 , H01L29/66 , H01L27/12
CPC分类号： H01L29/66477 , G03F7/2022 , H01L27/1266 , H01L27/1288 , H01L29/66757 , H01L29/66765 , H01L29/66969 , H01L29/78696
摘要： A method of manufacturing an electronic device comprising a first terminal (e.g. a source terminal), a second terminal (e.g. a drain terminal), a semiconductor channel connecting the first and second terminals and a gate terminal to which a potential may be applied to control a conductivity of the channel. The method comprises a first exposure of a photoresist from above the substrate using a mask and a second exposure from below, wherein in the second exposure the first and second terminals shield a part of the photoresist from exposure. An intermediate step reduces the solubility of the photoresist exposed in the first exposure. A window is formed in the photoresist at the location which was shielded by the mask, but exposed to radiation from below. Semiconductor material, dielectric material and conductor material are deposited inside the window to form a semiconductor channel, gate dielectric, and a gate terminal, respectively.

8. 发明授权

US09601597B2 Substantially planar electronic devices and circuits 有权
公开(公告)号：US09601597B2
公开(公告)日：2017-03-21
申请号：US14380199
申请日：2013-02-21
申请人： Pragmatic Printing Limited
发明人： Antony Colin Fryer , Richard David Price
IPC分类号： H01L29/76 , H01L27/12 , H01L51/40 , H01L21/336 , H01L29/66 , H01L29/78 , H01L29/786
CPC分类号： H01L29/66795 , H01L27/1288 , H01L27/1292 , H01L29/7855 , H01L29/78636 , H01L29/7869
摘要： A method of manufacturing a substantially planar electronic device is disclosed. The method employs a resist having three different thicknesses used for defining different structures in a single masking step. Exemplary structures are substantially planar transistors having side-gates and diodes.

9. 发明授权

US09263553B2 Transistor and its method of manufacture 有权
标题翻译：晶体管及其制造方法
公开(公告)号：US09263553B2
公开(公告)日：2016-02-16
申请号：US13638061
申请日：2011-03-29
申请人： Richard David Price
发明人： Richard David Price
IPC分类号： H01L21/336 , H01L29/66 , H01L51/05 , H01L27/12 , G03F7/00
CPC分类号： H01L27/1288 , G03F7/0002 , H01L27/1214 , H01L27/1259 , H01L27/1292 , H01L29/66757 , H01L51/0541
摘要： A transistor includes a substrate, a source terminal and a drain terminal, each terminal being supported by the substrate, and the source and drain terminal being separated by a portion of the substrate, a layer of semiconductive material deposited so as to cover the portion of the substrate and to connect the source terminal to the drain terminal, a layer of dielectric material deposited so as to cover at least a portion of the layer of semiconductive material, and a layer of electrically conductive material deposited so as to cover at least a portion of the layer of dielectric material. The layer of electrically conductive material providing a gate terminal to which a potential may be applied to control a conductivity of the layer of semiconductive material connecting the source and drain terminals.
摘要翻译：晶体管包括衬底，源极端子和漏极端子，每个端子由衬底支撑，并且源极和漏极端子由衬底的一部分分隔开，沉积的半导体材料层以覆盖部分并且将源极端子连接到漏极端子，沉积以覆盖半导体材料层的至少一部分的介电材料层和沉积的覆盖至少一部分的导电材料层的介电材料层。提供栅极端子的导电材料层可以施加电位以控制连接源极和漏极端子的半导体材料层的导电性。

10. 发明授权

US10871383B2 Capacitive detection, energy transfer, and/or data transfer system 有权
公开(公告)号：US10871383B2
公开(公告)日：2020-12-22
申请号：US16725251
申请日：2019-12-23
申请人： PragmatIC Printing Limited
发明人： Joao De Oliveira
IPC分类号： G01D5/241
CPC分类号： G01D5/2412
摘要： A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the movable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor. The first moveable entity further comprises a first resistor connecting the first moveable entity electrode to the second moveable entity electrode, and the base further comprises: signal supply means arranged to supply a time-varying electrical signal to the first base electrode; and signal detection means arranged to detect an electrical signal from the second base electrode.

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