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    • 2. 发明授权
    • Method for manufacturing a layer of gallium nitride or gallium and aluminum nitride
    • 制造氮化镓或镓和氮化铝层的方法
    • US08093077B2
    • 2012-01-10
    • US12934359
    • 2009-03-11
    • Hacene Lahreche
    • Hacene Lahreche
    • H01L21/00
    • H01L21/02458H01L21/02376H01L21/02378H01L21/02381H01L21/02505H01L21/02513H01L21/0254H01L21/02598H01L21/02631
    • The present invention relates to a method for manufacturing a crack free monocrystalline nitride layer having the composition AlxGa1-xN, where 0≦x≦0.3, on a substrate that is likely to generate tensile stress in the layer and to structures containing such layer and substrate. The method includes forming a nucleation layer on the substrate; forming a monocrystalline intermediate layer of aluminum or gallium nitride at a selected thickness on the nucleation layer; forming a monocrystalline seed layer of an AlBN compound in which the boron content is between 0 and 10% at a selected temperature and thickness on the intermediate layer with the thicknesses of the seed and intermediate layers being in a ratio of between 0.05 and 1; and forming the monocrystalline nitride layer of AlxGa1-xN nitride at a selected temperature on the seed layer, with the temperature of formation of the seed layer being 50 to 150° C. higher than the temperature of formation of the monocrystalline nitride layer in order to avoid producing cracks in the monocrystalline nitride layer.
    • 本发明涉及一种制造具有组成Al x Ga 1-x N的无裂纹单晶氮化物层的方法,其中0< NlE; x≦̸ 0.3在可能在该层中产生拉伸应力的基底上,以及含有该层和基底的结构 。 该方法包括在基板上形成成核层; 在成核层上形成选定厚度的铝或氮化镓的单晶中间层; 在中间层上的选定温度和厚度下形成硼含量为0至10%的AlBN化合物的单晶种子层,其中种子和中间层的厚度为0.05至1的比率; 并且在种子层上在选定温度下形成Al x Ga 1-x N氮化物的单晶氮化物层,晶种层的形成温度比单晶氮化物层的形成温度高50至150℃以便于 避免在单晶氮化物层中产生裂纹。
    • 4. 发明申请
    • TREATMENT FOR BONDING INTERFACE STABILIZATION
    • 用于接合界面稳定的处理
    • US20110233720A1
    • 2011-09-29
    • US13153709
    • 2011-06-06
    • Eric NeyretSebastien Kerdiles
    • Eric NeyretSebastien Kerdiles
    • H01L29/06H01L21/762
    • H01L21/76254
    • A method and/or system are provided for producing a structure comprising a thin layer of semiconductor material on a substrate. The method includes creating an area of embrittlement in the thickness of a donor substrate, bonding the donor substrate with a support substrate and detaching the donor substrate at the level of the area of embrittlement to transfer a thin layer of the donor substrate onto the support substrate. The method also includes thermal treatment of this resulting structure to stabilize the bonding interface between the thin layer and the substrate support. The invention also relates to the structures obtained by such a process.
    • 提供了一种方法和/或系统,用于产生包括在衬底上的薄层半导体材料的结构。 该方法包括在施主衬底的厚度上形成脆化区域,用支撑衬底粘合施主衬底,并将施主衬底分离在脆化区域的水平,以将施主衬底的薄层转移到支撑衬底上 。 该方法还包括对所得结构的热处理,以稳定薄层和基底支撑体之间的结合界面。 本发明还涉及通过这种方法获得的结构。
    • 5. 发明授权
    • Method of splitting a substrate
    • 分离底物的方法
    • US08003493B2
    • 2011-08-23
    • US12676320
    • 2008-10-21
    • Nadia Ben MohamedSébastien Kerdiles
    • Nadia Ben MohamedSébastien Kerdiles
    • H01L21/30
    • H01L21/187H01L21/76254
    • A process for splitting a semiconductor substrate having an identification notch on its periphery, by creating a weakened zone in the substrate by implanting atomic species into the substrate while the substrate is held in place on a portion of its periphery during the implanting; and splitting the substrate along the weakened zone by placing the held portion of the substrate in a splitting-wave initiation sector while positioning the notch for initiating a splitting wave followed by the propagation of the wave into the substrate. During splitting the notch is positioned so that it is in a quarter of the periphery of the substrate diametrically opposite the sector for initiating the splitting wave or in the quarter of the periphery of the substrate that is centered on the sector.
    • 一种通过在植入期间将衬底保持在其周边的一部分上保持在适当位置的情况下通过将原子物质注入到衬底中而在衬底中产生弱化区域来分裂其外围具有识别缺口的半导体衬底的工艺; 以及通过将衬底的保持部分放置在分裂波起始扇区中并沿着弱化区域分裂衬底,同时定位用于引发分裂波的陷波,随后将波传播到衬底中。 在分割期间,凹口被定位成使得其位于衬底周边的四分之一处,与衬底的圆周方向相反,用于引发分裂波,或者位于以扇形为中心的衬底周边的四分之一部分中。
    • 7. 发明授权
    • Composite substrate and method of fabricating the same
    • 复合基板及其制造方法
    • US07977747B2
    • 2011-07-12
    • US12708011
    • 2010-02-18
    • Frédéric AllibertSébastien Kerdiles
    • Frédéric AllibertSébastien Kerdiles
    • H01L27/01
    • H01L21/76251
    • The invention specifically relates to methods of fabricating a composite substrate by providing a first insulating layer on a support substrate at a thickness of e1 and providing a second insulating layer on a source substrate at a thickness of e2, with each layer having an exposed face for bonding; providing plasma activation energy in an amount sufficient to activate a portion of the thickness of the face of the first insulating layer emp1 and a portion of the thickness of the face of the second insulating layer emp1; providing a final insulating layer by molecular bonding the activated face of the first insulating layer with the activated face of the second insulating layer; and removing a back portion of the source substrate while retaining an active layer comprising a remaining portion of the source substrate bonded to the support substrate with the final insulating layer interposed therein to form the composite substrate. The thicknesses e1, e2 of the first and second insulating layers are sufficient to provide the final insulating layer with a thickness of 50 nanometers or less, and the plasma activation energy and respective thicknesses e1, e2 of the first and second insulating layers are selected such that only respective thicknesses emp1 and emp2 of the faces of the first insulating layer and the second insulating layer are activated.
    • 本发明具体涉及通过在e1的厚度上在支撑基板上设置第一绝缘层并以e2的厚度在源极基底上提供第二绝缘层来制造复合衬底的方法,其中每个层具有用于 粘接; 提供足以激活第一绝缘层emp1的表面的厚度的一部分和第二绝缘层emp1的表面的厚度的一部分的量的等离子体激活能; 通过将第一绝缘层的活化面与第二绝缘层的活化面分子结合来提供最终绝缘层; 以及去除源极衬底的后部,同时保持包含源极衬底的剩余部分的活性层,所述剩余部分与所述支撑衬底接合,并且其中插入最终绝缘层以形成所述复合衬底。 第一和第二绝缘层的厚度e1,e2足以提供厚度为50纳米或更小的最终绝缘层,并且选择第一和第二绝缘层的等离子体激活能和各自的厚度e1,e2, 仅激活第一绝缘层和第二绝缘层的面的相应厚度emp1和emp2。
    • 10. 发明授权
    • Process of forming and controlling rough interfaces
    • 形成和控制粗糙界面的过程
    • US07807548B2
    • 2010-10-05
    • US11827715
    • 2007-07-13
    • Bernard AsparChrystelle Lagahe BlanchardNicolas Sousbie
    • Bernard AsparChrystelle Lagahe BlanchardNicolas Sousbie
    • H01L21/30
    • B81B3/001B81C1/00952B81C2201/115
    • The invention provides a method for forming a semiconductor component with a rough buried interface. The method includes providing a first semiconductor substrate having a first surface of roughness R1. The method further includes thermally oxidizing the first surface of the first semiconductor substrate to form an oxide layer defining an external oxide surface on the first semiconductor substrate and a buried oxide-semiconductor interface below the oxide surface, so that the buried oxide surface has a roughness R2 that is less than R1. The method also includes assembling the oxide surface of the first semiconductor substrate with a second substrate. The invention also provides a component formed according to the method of the invention.
    • 本发明提供一种用于形成具有粗糙掩埋界面的半导体部件的方法。 该方法包括提供具有粗糙度R1的第一表面的第一半导体衬底。 该方法还包括热氧化第一半导体衬底的第一表面以形成限定第一半导体衬底上的外部氧化物表面的氧化物层和氧化物表面下方的掩埋氧化物半导体界面,使得掩埋氧化物表面具有粗糙度 R2小于R1。 该方法还包括用第二衬底组装第一半导体衬底的氧化物表面。 本发明还提供了根据本发明的方法形成的部件。