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1. 发明授权

US10887663B2 Smooth switching of video sources sharing a common link 有权
公开(公告)号：US10887663B2
公开(公告)日：2021-01-05
申请号：US14834702
申请日：2015-08-25
申请人： Valens Semiconductor Ltd.
发明人： Eyran Lida
IPC分类号： H04N21/647 , H04N21/2343 , H04N21/24 , H04N21/242 , H04N19/42 , H04N19/88 , H04N7/01 , H04N19/186 , H04N19/30 , H04N5/44
摘要： Methods and systems for smooth switching of video sources. One method includes the steps of: Inferring that first and second network paths share a common link that has insufficient bandwidth to carry both the respective first and second incoming high-definition uncompressed videos (HD-UVs) generated by first and second real-time video encoders (RT-VEs). And synchronizing a smooth switching between the first and second incoming HD-UVs by: indicating the first and second RT-VEs to increase their first and second compression ratios to ratios that enable the common link to carry both the first and second compressed videos; indicating a video switcher to perform the smooth switching between the first and second corresponding outgoing HD-UVs; indicating the first RT-VE to stop sending the first compressed video after the smooth switching; and indicating the second RT-VE to decrease the second compression ratio.

2. 发明授权

US10523339B2 Reducing transmission rate to support fast convergence 有权
公开(公告)号：US10523339B2
公开(公告)日：2019-12-31
申请号：US16142160
申请日：2018-09-26
申请人： Valens Semiconductor Ltd.
发明人： Eyran Lida , Aviv Salamon , Gaby Gur Cohen , Israel Greiss
IPC分类号： H04B15/00 , H04B1/38 , H04B1/10 , H04L25/03 , H04L25/02
摘要： Methods and systems for rapidly recovering from a serious interference. One method includes the following steps: transmitting, by a transmitter to a transceiver over a communication channel, ongoing data at a fixed data rate above 100. Mbps; receiving, by a receiver from the transceiver, an indication indicating that the transceiver is experiencing a serious interference; responsive to the indication, reducing data rate at which the transmitter transmits; storing excess data that cannot be sent during the period of the reduced data rate; and increasing the data rate, at which the transmitter transmits, to a level that enables it to transmit, within less than 1 millisecond from the moment of reducing the data rate, both the stored excess data and the ongoing data at the fixed data rate.

3. 发明授权

US10298518B2 Creating bi-directional co-shared sessions and switching bi-directional co-shared sessions 有权
公开(公告)号：US10298518B2
公开(公告)日：2019-05-21
申请号：US15815886
申请日：2017-11-17
申请人： Valens Semiconductor Ltd.
发明人： Eyran Lida , Nadav Banet
IPC分类号： H04L12/927 , H04L12/727 , H04L12/911 , H04L12/841 , H04N21/00 , H04L12/24 , H04L29/06
摘要： Methods and systems for fast switching between bi-directional co-shared sessions having different network paths over a resource reservation network. Embodiment of one method includes: creating a bi-directional parent session (Sp) between first and second session partners, creating a bi-directional derivative session (Sd) between the first session partner and a third session partner, and reassigning a predetermined amount of co-shared network resources (PA-CSNR) assigned to the Sp using the following steps: (i) sending a first message to request the second session partner to stop using the PA-CSNR, (ii) sending a second message to register whether the PA-CSNR are assigned to the Sd, and (iii) sending a third message to allow the third session partner to utilize at least some of the PA-CSNR for the Sd.

4. 发明授权

US10116589B2 Fast switching between co-shared sessions 有权
公开(公告)号：US10116589B2
公开(公告)日：2018-10-30
申请号：US15223248
申请日：2016-07-29
申请人： Valens Semiconductor Ltd.
发明人： Eyran Lida , Nadav Banet
IPC分类号： H04L12/927 , H04L12/727 , H04L12/911 , H04L12/841 , H04N21/00 , H04L12/24 , H04L29/06
摘要： System and method for a resource reservation network that switches fast between bi-directional co-shared sessions having different network paths. A session creation module (SCM) creates a bi-directional parent session (Sp), between first and second session partners, by: allocating co-shared network resources over a first network hop, and allocating network resources over a second network hop. The SCM further creates a bi-directional derivative session (Sd) between the first session partner and a third session partner, by: allocating network resources to the Sd over a third network hop, and not allocating specifically for the Sd all the network resources required for the Sd over the first network hop. And the network is able to switch between the Sp and the Sd within a duration that is less than half the duration required to create the Sd.

5. 发明申请

US20180227080A1 Forward error correction for incomplete blocks 审中-公开
公开(公告)号：US20180227080A1
公开(公告)日：2018-08-09
申请号：US15890219
申请日：2018-02-06
申请人： Valens Semiconductor Ltd.
发明人： Shai Stein , Eran Rippel
IPC分类号： H04L1/00
摘要： Methods and systems that enable recovery of a lost packet from an incomplete block transmitted over a communication network. In one embodiment, a system includes a first processor configured to: receive a block of packets during a period spanning a certain duration, calculate a parity packet (PP) for the block, and provide in PP an indication of the number of packets in the block, where the block comprises k

6. 发明申请

US20180227068A1 Virtual HDBaseT link 审中-公开
公开(公告)号：US20180227068A1
公开(公告)日：2018-08-09
申请号：US15890245
申请日：2018-02-06
申请人： Valens Semiconductor Ltd.
发明人： Shai Stein , Eran Rippel
IPC分类号： H04J3/06
CPC分类号： H04J3/0667 , H03M13/1165 , H03M13/1168 , H03M13/118 , H03M13/1185 , H03M13/15 , H03M13/2921 , H04J3/0664 , H04J3/067 , H04J3/0673 , H04J3/0697 , H04L1/005 , H04L1/0054 , H04L1/0057 , H04L1/0061 , H04L1/0063 , H04L1/0083 , H04L1/1812 , H04L1/1835 , H04L12/40 , H04L12/40013 , H04N21/4305 , H04N21/43635
摘要： Methods and systems for providing a virtual HDBaseT® link. In one embodiment, a first switch transmits packets over an Ethernet network that includes one or more hops. The payload of each of the packets includes an HDBaseT® T-packet belonging to an HDBaseT® session. A first processor sets, for each packet from among a plurality of the packets, a timestamp value in the packet to correspond to the time at which the packet is transmitted by the first switch. A second switch receives the packets over the Ethernet network. A second processor calculates a clock correction value based on the timestamps in the plurality of packets, and utilizes the clock correction value to perform at least one of the following: (i) control transmission, by the second switch, of data in T-packets in the payloads of the packets, and (ii) recover a source clock of native media delivered over the Ethernet network.

7. 发明申请

US20170289058A1 Indicating delays added to packets due to retransmission 审中-公开
公开(公告)号：US20170289058A1
公开(公告)日：2017-10-05
申请号：US15630819
申请日：2017-06-22
申请人： Valens Semiconductor Ltd.
发明人： Eyran Lida
IPC分类号： H04L12/875 , H04L1/08
CPC分类号： H04L47/56 , H04L1/007 , H04L1/08 , H04L1/1819 , H04L1/1841 , H04L1/1877 , H04L5/143 , H04L25/4919 , H04L27/0008
摘要： System and method indicating delays added to packets due to retransmission events. The method includes the steps of receiving multiple packet streams and multiplexing them into a first multiplexed packet stream; storing in memory the first multiplexed packet stream together with time indications; receiving a retransmission request and selecting data for retransmission; multiplexing the first multiplexed packet stream and the data for retransmission into a second multiplexed packet stream; utilizing the time indications for calculating delays that were added to packets of the second multiplexed packet stream as a result of fulfilling the retransmission request; adding the calculated delays to at least some of the packets of the second multiplexed packet stream; and transmitting the second multiplexed packet stream.

8. 发明授权

US09685991B2 Reducing transmission rate to support fast convergence 有权
公开(公告)号：US09685991B2
公开(公告)日：2017-06-20
申请号：US15169961
申请日：2016-06-01
申请人： Valens Semiconductor Ltd.
发明人： Eyran Lida , Aviv Salamon , Gaby Gur Cohen , Israel Greiss
IPC分类号： H04J1/16 , H04L1/00 , H04B1/74 , H04B1/04 , H04L12/825 , H04L25/03
CPC分类号： H04B1/74 , H04B1/0475 , H04L25/03885 , H04L47/25
摘要： Methods and systems for fast recovery from serious differential interferences. An exemplary method includes the following steps: transmitting, by a transmitter to a transceiver, at a fixed data rate above 100 Mbps; receiving, by a receiver from the transceiver, an indication indicating that the transceiver is experiencing a serious interference; responsive to the indication, reducing the data rate at which the transmitter transmits; storing excess data that could not be sent during the period of the reduced data rate; and increasing, within less than 1 millisecond, the data rate at which the transmitter transmits to a level that enables it to transmit both the stored excess data and the ongoing data at the fixed data rate.

9. 发明授权

US09621612B2 Methods and systems for distributed calculations of latency variation 有权
公开(公告)号：US09621612B2
公开(公告)日：2017-04-11
申请号：US14482340
申请日：2014-09-10
申请人： Valens Semiconductor Ltd.
发明人： Eyran Lida , Aviv Salamon
IPC分类号： H04L12/26 , H04L29/06 , H04L12/24 , H04L12/46 , H04L12/911 , H04L29/08 , H04L12/64
CPC分类号： H04L65/602 , H04L12/46 , H04L12/6418 , H04L29/06 , H04L41/14 , H04L41/147 , H04L43/0852 , H04L43/087 , H04L43/16 , H04L47/70 , H04L65/1069 , H04L65/4084 , H04L65/60 , H04L65/605 , H04L65/608 , H04L65/80 , H04L67/141 , H04L67/32
摘要： Methods and systems for calculating latency variations in a distributed manner, including the steps of: calculating, by first and second switches, first and second local latency variations, of first and second streaming sessions, at first and second output ports of the first and second switches, respectively. Receiving, by the third switch, the first and second local latency variations; wherein a first and second paths of the first and second streaming sessions, respectively, are passing through a third output port of the third switch after passing through the first and second output ports, respectively. And calculating, by the third switch, a third local latency variation of the first streaming session at the third output port, based on the first and second local latency variations.

10. 发明授权

US09594719B2 Seamless addition of high bandwidth lanes 有权
标题翻译：无缝添加高带宽通道
公开(公告)号：US09594719B2
公开(公告)日：2017-03-14
申请号：US14813433
申请日：2015-07-30
申请人： Valens Semiconductor Ltd.
发明人： Eyran Lida , Aviv Salamon
IPC分类号： G06F13/42 , G06F13/364 , G06F13/40
CPC分类号： G06F13/4282 , G06F13/364 , G06F13/404
摘要： Seamless addition of high bandwidth lanes, including the steps of: sending, by a master, an idle sequence using 7b/10b code words over new high bandwidth lanes in parallel to sending and receiving 8b/10b data with a fixed delay over master-to-slave (m2s) and slave-to-master (s2m) active high bandwidth lanes; sending in parallel a synchronization sequence and a known non-idle sequence during an inter packet gap; utilizing, by the slave, the known non-idle sequence for deskewing the new high bandwidth lanes; and sending, by the master, a transition sequence over both the m2s active high bandwidth lane and the new high bandwidth lanes, and immediately thereafter the master is ready to transmit high bandwidth data using 8b/10b code words over both the m2s active high bandwidth lane and the new high bandwidth lanes.
摘要翻译：包括以下步骤：无缝地添加高带宽通道，包括以下步骤：由主机通过新的高带宽通道使用7b / 10b码字并行发送和接收具有固定延迟的8b / 10b数据的主/从 -slave（m2s）和slave-to-master（s2m）主动高带宽通道; 在帧间间隔期间并行发送同步序列和已知非空闲序列; 利用从机将已知的非空闲序列用于对新的高带宽通道进行偏移校正; 并且由主机发送在m2s主动高带宽通道和新的高带宽通道上的转换序列，并且在此之后，主机准备好在m2s有效高带宽上使用8b / 10b码字传输高带宽数据车道和新的高带宽车道。

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