专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09111764B2 Integrated semiconductor device and a bridge circuit with the integrated semiconductor device 有权
标题翻译：集成半导体器件和具有集成半导体器件的桥接电路
公开(公告)号：US09111764B2
公开(公告)日：2015-08-18
申请号：US13548266
申请日：2012-07-13
申请人： Franz Hirler , Andreas Meiser , Steffen Thiele
发明人： Franz Hirler , Andreas Meiser , Steffen Thiele
IPC分类号： H03K17/687 , H01L27/06 , H01L27/082 , H01L27/088 , H01L29/423 , H01L29/40 , H01L29/732 , H01L29/735 , H01L29/78 , H01L29/06 , H01L23/48
CPC分类号： H01L27/0623 , H01L23/481 , H01L23/528 , H01L27/0826 , H01L27/088 , H01L29/0634 , H01L29/1095 , H01L29/402 , H01L29/42372 , H01L29/7327 , H01L29/735 , H01L29/7395 , H01L29/7802 , H01L29/781 , H01L29/7811 , H01L29/7813 , H01L29/7824 , H01L2924/0002 , H03K17/687 , H03K19/018507 , H03K2217/0063 , H03K2217/0072 , H03K2217/0081 , H01L2924/00
摘要： A bridge circuit is provided. The bridge circuit includes a first integrated semiconductor device having a high-side switch, a second integrated semiconductor device having a low-side switch electrically connected with the high-side switch, a first level-shifter electrically connected with the high-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device, and a second level-shifter electrically connected with the low-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device. Further, an integrated semiconductor device is provided.
摘要翻译：提供了桥接电路。桥电路包括具有高侧开关的第一集成半导体器件，具有与高侧开关电连接的低侧开关的第二集成半导体器件，与高侧开关电连接的第一电平移位器和集成在第一集成半导体器件和第二集成半导体器件中的一个中，以及与低侧开关电连接并集成在第一集成半导体器件和第二集成半导体器件中的一个中的第二电平转换器。此外，提供了集成半导体器件。

2. 发明申请

US20140015586A1 Integrated Semiconductor Device and a Bridge Circuit with the Integrated Semiconductor Device 有权
标题翻译：集成半导体器件和集成半导体器件的桥接电路
公开(公告)号：US20140015586A1
公开(公告)日：2014-01-16
申请号：US13548266
申请日：2012-07-13
申请人： Franz Hirler , Andreas Meiser , Steffen Thiele
发明人： Franz Hirler , Andreas Meiser , Steffen Thiele
IPC分类号： H03L5/00
CPC分类号： H01L27/0623 , H01L23/481 , H01L23/528 , H01L27/0826 , H01L27/088 , H01L29/0634 , H01L29/1095 , H01L29/402 , H01L29/42372 , H01L29/7327 , H01L29/735 , H01L29/7395 , H01L29/7802 , H01L29/781 , H01L29/7811 , H01L29/7813 , H01L29/7824 , H01L2924/0002 , H03K17/687 , H03K19/018507 , H03K2217/0063 , H03K2217/0072 , H03K2217/0081 , H01L2924/00
摘要： A bridge circuit is provided. The bridge circuit includes a first integrated semiconductor device having a high-side switch, a second integrated semiconductor device having a low-side switch electrically connected with the high-side switch, a first level-shifter electrically connected with the high-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device, and a second level-shifter electrically connected with the low-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device. Further, an integrated semiconductor device is provided.
摘要翻译：提供了桥接电路。桥电路包括具有高侧开关的第一集成半导体器件，具有与高侧开关电连接的低侧开关的第二集成半导体器件，与高侧开关电连接的第一电平移位器和集成在第一集成半导体器件和第二集成半导体器件中的一个中，以及与低侧开关电连接并集成在第一集成半导体器件和第二集成半导体器件中的一个中的第二电平转换器。此外，提供了集成半导体器件。

3. 发明授权

US08373449B2 Circuit arrangement including a common source sense-FET 有权
标题翻译：电路布置包括一个公共源极检测FET
公开(公告)号：US08373449B2
公开(公告)日：2013-02-12
申请号：US12982641
申请日：2010-12-30
申请人： Steffen Thiele , Andreas Meiser
发明人： Steffen Thiele , Andreas Meiser
IPC分类号： H02M1/00
CPC分类号： G01R19/0092 , H03F2200/261 , H03F2200/462 , H03K2217/0027
摘要： A current sensing circuit arrangement is disclosed. The circuit arrangement includes a load transistor for controlling a load current to a load being coupled to a drain electrode of the load transistor. A sense transistor is coupled to the load transistor. The sense transistor has a drain electrode that provides a measurement current representative of the load current. The load transistor and the sense transistor are field effect transistors having a common source electrode. A measurement circuit is configured to receive the measurement current from the sense transistor and to generate an output signal therefrom, the output signal being representative of the load current.
摘要翻译：公开了一种电流感测电路装置。电路装置包括负载晶体管，用于控制耦合到负载晶体管的漏电极的负载的负载电流。感测晶体管耦合到负载晶体管。感测晶体管具有提供表示负载电流的测量电流的漏电极。负载晶体管和感测晶体管是具有公共源电极的场效应晶体管。测量电路被配置为从感测晶体管接收测量电流并从其产生输出信号，该输出信号代表负载电流。

4. 发明申请

US20110124087A1 PHOTOBIOREACTOR 有权
公开(公告)号：US20110124087A1
公开(公告)日：2011-05-26
申请号：US12812569
申请日：2009-01-19
申请人： Andreas Meiser , Miguel Verhein
发明人： Andreas Meiser , Miguel Verhein
IPC分类号： C12N1/00 , C12M1/00
CPC分类号： C12N1/12 , C12M21/02 , C12M23/26 , C12M23/34 , C12M23/52 , C12M23/56 , C12M25/06 , C12M41/12 , C12M41/32
摘要： A method of operating a closed photobioreactor for cultivation of phototrophic microorganisms. The photobioreactor comprises a culture liquid and is partially or completely surrounded by water of a water body. A density difference between the culture liquid and the surrounding water is provided so that the position of the photobioreactor in the water body is controlled. A closed photobioreactor for cultivation of phototrophic microorganisms. The photobioreactor is adapted to comprise a culture liquid and to be partially or completely surrounded by water of a water body. The photobioreactor comprises means for determining the density difference between the culture liquid and the surrounding water.
摘要翻译：一种操作闭合光生物反应器以培养光营养微生物的方法。光生物反应器由培养液组成，部分或完全被水体的水包围。提供培养液和周围水之间的密度差，使得水体中光生物反应器的位置受到控制。用于培养光营养微生物的封闭光生物反应器。光生物反应器适于包含培养液体并被水体的水部分或完全包围。光生物反应器包括用于确定培养液和周围水之间的密度差的装置。

5. 发明授权

US07468307B2 Semiconductor structure and method 有权
标题翻译：半导体结构与方法
公开(公告)号：US07468307B2
公开(公告)日：2008-12-23
申请号：US11476497
申请日：2006-06-28
申请人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/76
CPC分类号： H01L21/743 , H01L23/535 , H01L29/0653 , H01L29/7809 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.
摘要翻译：半导体结构包括半导体层堆叠，其包括第一导电类型的半导体衬底，第二导电类型的重掺杂掩埋层和形成在半导体层的顶部上的第三导电类型的单晶半导体层和埋入层，与埋层的接触，在接触孔中形成的接触以及半导体结构的不同部分的横向绝缘，所述绝缘体形成在隔离沟槽中。可以在隔离沟槽内形成与半导体衬底的接触。

6. 发明申请

US20070018195A1 Semiconductor structure and method 有权
标题翻译：半导体结构与方法
公开(公告)号：US20070018195A1
公开(公告)日：2007-01-25
申请号：US11476497
申请日：2006-06-28
申请人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L29/74
CPC分类号： H01L21/743 , H01L23/535 , H01L29/0653 , H01L29/7809 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.
摘要翻译：半导体结构包括半导体层堆叠，其包括第一导电类型的半导体衬底，第二导电类型的重掺杂掩埋层和形成在半导体层的顶部上的第三导电类型的单晶半导体层和埋入层，与埋层的接触，在接触孔中形成的接触以及半导体结构的不同部分的横向绝缘，所述绝缘体形成在隔离沟槽中。可以在隔离沟槽内形成与半导体衬底的接触。

7. 发明申请

US20140073123A1 Method for Producing a Controllable Semiconductor Component 有权
标题翻译：生产可控半导体元件的方法
公开(公告)号：US20140073123A1
公开(公告)日：2014-03-13
申请号：US13614076
申请日：2012-09-13
申请人： Andreas Meiser , Markus Zundel
发明人： Andreas Meiser , Markus Zundel
IPC分类号： H01L21/768 , H01L21/28
CPC分类号： H01L29/7813 , H01L21/28008 , H01L21/28229 , H01L21/743 , H01L21/76877 , H01L21/76898 , H01L23/481 , H01L29/1095 , H01L29/401 , H01L29/407 , H01L29/4236 , H01L29/4916 , H01L29/495 , H01L29/51 , H01L29/66734 , H01L29/7827 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a method for producing a controllable semiconductor component. In a semiconductor body with a top side and a bottom side, a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body are formed in a common etching process. The first trench has a first width and the second trench has a second width greater than the first width. Then, in a common process, an oxide layer is formed in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench. Subsequently, the oxide layer is removed from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.
摘要翻译：公开了一种制造可控半导体部件的方法。在具有顶侧和底侧的半导体本体中，在公共蚀刻工艺中形成从顶侧突出到半导体本体的第一沟槽和从顶侧突出到半导体本体中的第二沟槽。第一沟槽具有第一宽度，第二沟槽具有大于第一宽度的第二宽度。然后，在共同的工艺中，在第一沟槽和第二沟槽中形成氧化物层，使得氧化物层填充第一沟槽并使第二沟槽的表面电绝缘。随后，完全或至少部分地从第一沟槽去除氧化物层，使得半导体主体包括布置在第一沟槽中的暴露的第一表面区域。

8. 发明申请

US20140048904A1 Semiconductor Device, Integrated Circuit and Manufacturing Method Thereof 有权
标题翻译：半导体器件，集成电路及其制造方法
公开(公告)号：US20140048904A1
公开(公告)日：2014-02-20
申请号：US13589717
申请日：2012-08-20
申请人： Markus Zundel , Andreas Meiser , Hans-Peter Lang , Thorsten Meyer , Peter Irsigler
发明人： Markus Zundel , Andreas Meiser , Hans-Peter Lang , Thorsten Meyer , Peter Irsigler
IPC分类号： H01L29/06 , H01L23/48 , H01L29/66 , H01L21/762 , H01L21/02
CPC分类号： H01L27/0694 , H01L21/02 , H01L21/743 , H01L21/762 , H01L21/76224 , H01L21/823418 , H01L21/823475 , H01L23/48 , H01L27/0629 , H01L29/06 , H01L29/0657 , H01L29/407 , H01L29/417 , H01L29/41741 , H01L29/41766 , H01L29/4236 , H01L29/456 , H01L29/66477 , H01L29/66727 , H01L29/66734 , H01L29/78 , H01L29/7803 , H01L29/7813 , H01L29/7827 , H01L29/7845 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要： One embodiment of a semiconductor device includes a semiconductor body with a first side and a second side opposite to the first side. The semiconductor device further includes a first contact trench extending into the semiconductor body at the first side. The first contact trench includes a first conductive material electrically coupled to the semiconductor body adjoining the first contact trench. The semiconductor further includes a second contact trench extending into the semiconductor body at the second side. The second contact trench includes a second conductive material electrically coupled to the semiconductor body adjoining the second contact trench.
摘要翻译：半导体器件的一个实施例包括具有第一侧和与第一侧相对的第二侧的半导体本体。半导体器件还包括在第一侧延伸到半导体本体中的第一接触沟槽。第一接触沟槽包括电耦合到邻接第一接触沟槽的半导体本体的第一导电材料。半导体还包括在第二侧延伸到半导体本体中的第二接触沟槽。第二接触沟槽包括电耦合到邻接第二接触沟槽的半导体本体的第二导电材料。

9. 发明申请

US20140015046A1 Current Sense Transistor with Embedding of Sense Transistor Cells 有权
标题翻译：电流检测晶体管嵌入感应晶体管电池
公开(公告)号：US20140015046A1
公开(公告)日：2014-01-16
申请号：US13549463
申请日：2012-07-14
申请人： Steffen THIELE , Andreas MEISER , Markus ZUNDEL
发明人： Steffen THIELE , Andreas MEISER , Markus ZUNDEL
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7815 , G01R19/0092 , H01L23/58 , H01L27/124 , H01L29/41741 , H01L29/41766 , H01L29/7813 , H01L2924/0002 , H03K17/0822 , H03K2217/0027 , H01L2924/00
摘要： A semiconductor device a field of transistor cells integrated in a semiconductor body. A number of the transistor cells forming a power transistor and at least one of the transistor cells forming a sense transistor. A first source electrode is arranged on the semiconductor body electrically connected to the transistor cell(s) of the sense transistor but electrically isolated from the transistor cells of the power transistor. A second source electrode is arranged on the semiconductor body and covers the transistor cells of both the power transistor and the sense transistor, and at least partially covering the first source electrode in such a manner that the second source electrode is electrically connected only to the transistor cells of the power transistor but electrically isolated from the transistor cells of the sense transistor.
摘要翻译：一种半导体器件，集成在半导体本体中的晶体管单元的场。形成功率晶体管的多个晶体管单元和形成感测晶体管的至少一个晶体管单元。第一源电极布置在电连接到感测晶体管的晶体管单元的半导体本体上，但与功率晶体管的晶体管单元电隔离。第二源电极布置在半导体本体上并覆盖功率晶体管和感测晶体管的晶体管单元，并且至少部分地覆盖第一源电极，使得第二源电极仅电连接到晶体管功率晶体管的单元，但与感测晶体管的晶体管单元电隔离。

10. 发明授权

US08546875B1 Vertical transistor having edge termination structure 有权
标题翻译：具有边缘端接结构的垂直晶体管
公开(公告)号：US08546875B1
公开(公告)日：2013-10-01
申请号：US13420076
申请日：2012-03-14
申请人： Franz Hirler , Andreas Meiser
发明人： Franz Hirler , Andreas Meiser
IPC分类号： H01L29/40
CPC分类号： H01L29/7811 , H01L23/481 , H01L29/0623 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L29/42372 , H01L29/4238 , H01L29/7813 , H01L2924/0002 , H01L2924/00
摘要： Described herein are embodiments of a vertical power transistor having drain and gate terminals located on the same side of a semiconductor body and capable of withstanding high voltages in the off-state, in particular voltages of more than 100V.
摘要翻译：这里描述的是垂直功率晶体管的实施例，其具有位于半导体本体的相同侧上的漏极和栅极端子，并且能够承受处于断开状态的高电压，特别是大于100V的电压。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式