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1. 发明授权

US10033419B1 Termination for single-ended receiver 有权
公开(公告)号：US10033419B1
公开(公告)日：2018-07-24
申请号：US15413508
申请日：2017-01-24
申请人： Euhan Chong , Shayan Shahramian , Behzad Dehlaghi , Anthony Chan Carusone
发明人： Euhan Chong , Shayan Shahramian , Behzad Dehlaghi , Anthony Chan Carusone
IPC分类号： H04B1/16
摘要： Described herein is a termination circuit for a receiver receiving a single-ended signal. The termination circuit includes the first stage having a low-pass transfer function having a first pole/zero pair, and a second stage coupled to the first stage, where the second stage has a high-pass transfer function having a second pole/zero pair that cancels out the first pole/zero pair.

2. 发明授权

US08787776B2 Optical receiver with monolithically integrated photodetector 失效
标题翻译：具有单片集成光电检测器的光接收器
公开(公告)号：US08787776B2
公开(公告)日：2014-07-22
申请号：US13152320
申请日：2011-06-03
申请人： Anthony Chan Carusone , Tony Shuo-Chun Kao , Hemesh Yasotharan
发明人： Anthony Chan Carusone , Tony Shuo-Chun Kao , Hemesh Yasotharan
IPC分类号： H04B10/06
CPC分类号： H04B10/6971
摘要： An optical receiver includes a photodetector for detecting incoming optical data signals and an amplifier for providing signal gain and current to voltage conversion. The detection signal generated by the photodetector may include a distortion component caused by an operating characteristic of the photodetector. A signal compensating circuit may reconstruct the received optical data signal by effectively canceling the distortion component. For this purpose, the signal compensating circuit may include a decision feedback equalizer implemented using at least one feedback filter matched to the operating characteristic of the photodetector causing the signal distortion so as to reproduce the distortion component for cancellation. Use of a control module may also configure the optical receiver in real time to account for other operating and environmental conditions of the optical receiver. Data rates in excess of 5 Gbps may be realized in monolithic CMOS photodetectors when the signal compensating circuit is properly matched.
摘要翻译：光接收器包括用于检测输入光数据信号的光电检测器和用于提供信号增益和电流到电压转换的放大器。由光检测器产生的检测信号可以包括由光电检测器的工作特性引起的失真分量。信号补偿电路可以通过有效地消除失真分量来重构所接收的光数据信号。为此，信号补偿电路可以包括使用与光电检测器的操作特性匹配的至少一个反馈滤波器来实现的判决反馈均衡器，其导致信号失真，以便再现用于消除的失真分量。控制模块的使用也可以实时配置光接收机以考虑光接收机的其它操作和环境条件。当信号补偿电路正确匹配时，单片CMOS光电探测器可实现超过5 Gbps的数据速率。

3. 发明申请

US20120141122A1 OPTICAL RECEIVER WITH MONOLITHICALLY INTEGRATED PHOTODETECTOR 失效
标题翻译：光学接收器与单片集成光电转换器
公开(公告)号：US20120141122A1
公开(公告)日：2012-06-07
申请号：US13152320
申请日：2011-06-03
申请人： Anthony Chan Carusone , Tony Shuo-Chun Kao , Hemesh Yasotharan
发明人： Anthony Chan Carusone , Tony Shuo-Chun Kao , Hemesh Yasotharan
IPC分类号： H04B10/08
CPC分类号： H04B10/6971
摘要： An optical receiver includes a photodetector for detecting incoming optical data signals and an amplifier for providing signal gain and current to voltage conversion. The detection signal generated by the photodetector may include a distortion component caused by an operating characteristic of the photodetector. A signal compensating circuit may reconstruct the received optical data signal by effectively canceling the distortion component. For this purpose, the signal compensating circuit may include a decision feedback equalizer implemented using at least one feedback filter matched to the operating characteristic of the photodetector causing the signal distortion so as to reproduce the distortion component for cancellation. Use of a control module may also configure the optical receiver in real time to account for other operating and environmental conditions of the optical receiver. Data rates in excess of 5 Gbps may be realized in monolithic CMOS photodetectors when the signal compensating circuit is properly matched.
摘要翻译：光接收器包括用于检测输入光数据信号的光电检测器和用于提供信号增益和电流到电压转换的放大器。由光检测器产生的检测信号可以包括由光电检测器的工作特性引起的失真分量。信号补偿电路可以通过有效地消除失真分量来重构所接收的光数据信号。为此，信号补偿电路可以包括使用与光电检测器的操作特性匹配的至少一个反馈滤波器来实现的判决反馈均衡器，其导致信号失真，以便再现用于消除的失真分量。控制模块的使用也可以实时配置光接收机以考虑光接收机的其它操作和环境条件。当信号补偿电路正确匹配时，单片CMOS光电探测器可实现超过5 Gbps的数据速率。

4. 发明授权

US10153917B1 Frequency/phase-shift-keying for back-channel serdes communication 有权
公开(公告)号：US10153917B1
公开(公告)日：2018-12-11
申请号：US15656938
申请日：2017-07-21
申请人： Davide Tonietto , Dustin Tarl Dunwell , Anthony Chan Carusone
发明人： Davide Tonietto , Dustin Tarl Dunwell , Anthony Chan Carusone
IPC分类号： H04L12/40 , H04L25/03 , H04L7/00
摘要： Methods, integrated circuits and computer-readable media for communicating back-channel data over a data link by modulating the phase or frequency of a clock signal of a data signal transmitted over the data link. Slow modulation of the clock signal allows it to be detected and extracted by a receiver without affecting the integrity or bit rate of the data signal. Some embodiments allow the functionality to be implemented without the use of extra hardware in the transmitter or receiver or either.

5. 发明授权

US10103743B1 Analog-to-digital converter and control method thereof 有权
公开(公告)号：US10103743B1
公开(公告)日：2018-10-16
申请号：US15808095
申请日：2017-11-09
申请人： Luke Wang , Anthony Chan Carusone , Marc-Andre Lacroix
发明人： Luke Wang , Anthony Chan Carusone , Marc-Andre Lacroix
IPC分类号： H03M3/00 , H03M1/16 , H03M1/12 , H03M1/08 , H03H17/02
摘要： The present disclosure relates to an analog-to-digital converter (ADC) and a method for controlling an ADC. The ADC includes a plurality of quantization levels for analog-to-digital conversion. The ADC is adapted for utilizing a subset of the plurality of quantization levels for analog-to-digital signal conversion. The subset is formed by selecting at least one level to be deactivated using a greedy search method and deactivating the at least one level. The method includes using a subset of the plurality of quantization levels for analog-to-digital signal conversion, the subset being formed by selecting at least one level to be deactivated using a greedy search method and deactivating the at least one level.

6. 发明申请

US20180212634A1 TERMINATION FOR SINGLE-ENDED RECEIVER 有权
公开(公告)号：US20180212634A1
公开(公告)日：2018-07-26
申请号：US15413508
申请日：2017-01-24
申请人： Euhan Chong , Shayan Shahramian , Behzad Dehlaghi , Anthony Chan Carusone
发明人： Euhan Chong , Shayan Shahramian , Behzad Dehlaghi , Anthony Chan Carusone
IPC分类号： H04B1/16
CPC分类号： H04B1/16
摘要： Described herein is a termination circuit for a receiver receiving a single-ended signal. The termination circuit includes the first stage having a low-pass transfer function having a first pole/zero pair, and a second stage coupled to the first stage, where the second stage has a high-pass transfer function having a second pole/zero pair that cancels out the first pole/zero pair.

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