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    • 3. 发明授权
    • Method and apparatus for performing extraction on an integrated circuit design
    • 用于在集成电路设计上执行提取的方法和装置
    • US06941531B1
    • 2005-09-06
    • US10335095
    • 2002-12-31
    • Steven TeigArindam Chatterjee
    • Steven TeigArindam Chatterjee
    • G06F17/50
    • G06F17/5036G06F2217/08
    • The present invention introduces novel methods of performing integrated circuit layout extraction. In the system of the present invention, a complex extraction problem is first broken down into a set of smaller extraction sub problems. Some of the smaller extraction sub problems may be handled by simple parametric models. For example, extracting the resistance from a straight section of interconnect wire may be performed by multiplying a known resistance per unit length by the length of the straight section of interconnect wire. For more complex extraction sub problems, machine learning is used to build models. In one embodiment, Support Vector Machines are constructed to extract the desired electrical characteristics.
    • 本发明介绍了执行集成电路布局提取的新颖方法。 在本发明的系统中,复杂提取问题首先被分解成一组较小的提取子问题。 一些较小的提取子问题可以通过简单的参数模型来处理。 例如,可以从互连线的直线部分提取电阻可以通过将每单位长度的已知电阻乘以互连线的直线段的长度来执行。 对于更复杂的提取子问题,机器学习用于构建模型。 在一个实施例中,构造支持向量机来提取所需的电气特性。
    • 4. 发明授权
    • Method and apparatus for performing extraction using machine learning
    • 使用机器学习进行提取的方法和装置
    • US06857112B1
    • 2005-02-15
    • US10062264
    • 2002-01-31
    • Steven TeigArindam Chatterjee
    • Steven TeigArindam Chatterjee
    • G06F17/50
    • G06F17/5036
    • A system for using machine-learning to create a model for performing integrated circuit layout extraction is disclosed. The system of the present invention has two main phases: model creation and model application. The model creation phase comprises creating one or more extraction models using machine-learning techniques. First, a complex extraction problem is decomposed into smaller simpler extraction problems. Then, each smaller extraction problem is then analyzed to identify a set of physical parameters that fully define the smaller extraction problem. Next, models are created using machine learning techniques for all of the smaller simpler extraction problems. The machine learning is performed by first creating training data sets composed of the identified parameters from typical examples of the smaller extraction problem and the answers to those example extraction problems as solved using a highly accurate physics-based field solver. The training sets are then used to train the models. In one embodiment, neural networks are used to model the extraction problems. Bayesian inference is employed by one embodiment in order to train the neural network models. Bayesian inference may be implemented with normal Monte Carlo techniques or Hybrid Monte Carlo techniques. After the creation of a set of models for each of the smaller simpler extraction problems, the machine-learning based models may be used for extraction.
    • 公开了一种使用机器学习创建用于执行集成电路布局提取的模型的系统。 本发明的系统有两个主要阶段:模型创建和模型应用。 模型创建阶段包括使用机器学习技术创建一个或多个提取模型。 首先,复杂的提取问题被分解成更简单的提取问题。 然后,分析每个较小的提取问题,以确定一组完全限定较小提取问题的物理参数。 接下来,使用机器学习技术创建所有更简单的提取问题的模型。 机器学习是通过首先创建由所识别的参数组成的训练数据集,从较小提取问题的典型示例和使用高度准确的基于物理的场求解器解决的那些示例提取问题的答案来进行。 训练集然后用于训练模型。 在一个实施例中,神经网络用于对提取问题进行建模。 为了训练神经网络模型,一个实施例采用贝叶斯推理。 贝叶斯推理可以用正常的蒙特卡罗技术或混合蒙特卡罗技术实现。 在为每个更简单的提取问题创建一组模型之后,可以使用基于机器学习的模型来提取。
    • 5. 发明授权
    • Method and arrangement for extracting capacitance in integrated circuits having non Manhattan wiring
    • 在具有非曼哈顿布线的集成电路中提取电容的方法和装置
    • US06854101B2
    • 2005-02-08
    • US10434670
    • 2003-05-09
    • Steven TeigArindam Chatterjee
    • Steven TeigArindam Chatterjee
    • G06F17/50
    • G06F17/5036
    • The present invention introduces a method of quickly extracting the capacitance for interconnect wires in an integrated circuit routed with a non Manhattan architecture. To extract the capacitance a section containing non Manhattan wiring, the present invention proposes an approximation system that approximates the section of non Manhattan wiring with a Manhattan wiring section that has a capacitance per unit length that is generally proportional to the length of the approximated section. The capacitance effect from the approximated Manhattan wiring section may then be adjusted with a correction factor. Specifically, the present invention proposes that the capacitance be calculated for an interconnect wiring section by multiplying the length of the interconnect wiring section by an approximated capacitance per unit length value of a similar Manhattan wiring segment and adding a correction factor that corrects for the difference between the approximated Manhattan wiring section and the original non Manhattan wiring section.
    • 本发明引入了一种在非曼哈顿架构路由的集成电路中快速提取互连线的电容的方法。 为了提取包含非曼哈顿布线的部分的电容,本发明提出了一种近似系统,其使用具有与近似部分的长度成比例的每单位长度的电容的曼哈顿布线部分近似非曼哈顿布线的部分。 然后可以用校正因子调整来自近似的曼哈顿布线部分的电容效应。 具体而言,本发明提出,通过将互连线路部分的长度乘以类似的曼哈顿布线段的单位长度值的近似电容,并且增加校正因子来校正互补布线部分之间的差异 近似的曼哈顿布线部分和原来的非曼哈顿布线部分。
    • 7. 发明申请
    • AUTOMATED SOFTWARE RESTRICTION POLICY RULE GENERATION
    • 自动软件限制政策规则生成
    • US20100154026A1
    • 2010-06-17
    • US12335549
    • 2008-12-16
    • Arindam ChatterjeeVarugis KurienBental TagorSanjeev Dwivedi
    • Arindam ChatterjeeVarugis KurienBental TagorSanjeev Dwivedi
    • H04L9/00G06F17/00
    • G06F21/126G06F9/445G06F2221/2101
    • Software restriction policy rules can be automatically generated by parsing through a specified metadata source and generating the rules in accordance with indicated preferences. Metadata sources can include storage locations, such as folders, in which case rules for each executable file in the folder can be generated. Metadata sources can also include trusted publisher stores, installation logs, difference files, and other like data sources. Indicated preferences can select from among rules based on the publisher, for files that are signed, or rules based on hashes or path information for unsigned files. In generating rules to prevent the execution of specified files, if an optimized set of rules is desired, a check can be made to determine if an exception to an existing rule can be generated instead of a new rule. The automated parsing of the indicated metadata source can provide for both completeness and correctness.
    • 软件限制策略规则可以通过解析指定的元数据源并根据指定的偏好生成规则来自动生成。 元数据源可以包括存储位置,例如文件夹,在这种情况下,可以生成文件夹中每个可执行文件的规则。 元数据源还可以包括可信的发布商存储,安装日志,差异文件和其他类似的数据源。 指示的首选项可以基于发布者的规则,对于已签名的文件,或基于散列的规则或未签名文件的路径信息进行选择。 在生成规则以防止执行指定文件时,如果需要优化的一组规则,则可以进行检查以确定是否可以生成现有规则的异常而不是新规则。 指定的元数据源的自动解析可以提供完整性和正确性。
    • 8. 发明申请
    • SECURITY SYSTEM WITH COMPLIANCE CHECKING AND REMEDIATION
    • 具有合规检查和补救的安全系统
    • US20090007264A1
    • 2009-01-01
    • US11768596
    • 2007-06-26
    • Arindam ChatterjeeAnders SamuelssonNils DussartCharles G. JeffriesAmit R. Kulkarni
    • Arindam ChatterjeeAnders SamuelssonNils DussartCharles G. JeffriesAmit R. Kulkarni
    • G06F11/00
    • G06F21/577
    • A security system is provided for use with computer systems. In various embodiments, the security system can analyze the state of security of one or more computer systems to determine whether the computer systems comply with expressed security policies and to remediate the computer systems so that they conform with the expressed security policies. In various embodiments, the security system can receive compliance documents, determine whether one or more computer systems comply with portions of security policies specified in the compliance documents, and take actions specified in the compliance documents to cause the computer systems to comply with the specified security policies. The security system may provide a common, unified programming interface that applications or tools can employ to verify or enforce security policies.
    • 提供了一种用于计算机系统的安全系统。 在各种实施例中,安全系统可以分析一个或多个计算机系统的安全状态,以确定计算机系统是否符合所表达的安全策略并修复计算机系统,使得它们符合所表达的安全策略。 在各种实施例中,安全系统可以接收合规文件,确定一个或多个计算机系统是否符合合规文件中指定的安全策略的一部分,并采取合规文件中指定的措施,使计算机系统符合指定的安全性 政策。 安全系统可以提供一个通用的,统一的编程接口,应用程序或工具可以用来验证或执行安全策略。
    • 10. 发明授权
    • Method and apparatus for performing extraction using a model trained with bayesian inference
    • 使用经贝叶斯推理训练的模型进行提取的方法和装置
    • US06735748B1
    • 2004-05-11
    • US10062185
    • 2002-01-31
    • Steven TeigArindam Chatterjee
    • Steven TeigArindam Chatterjee
    • G06F945
    • G06N7/005G06F17/5036
    • A machine-learning model may be created to perform integrated circuit layout extraction. Using such a machine-learning system has two main phases: model creation and model application. The model creation phase comprises creating one or more extraction models using machine-learning techniques. The machine learning is performed by first creating training data sets composed of the identified parameters from typical examples of the smaller extraction problem and the answers to those example extraction problems as solved using a highly accurate physics-based field solver. Next, the system performs machine learning using Bayesian inference in order to train the neural network models. The Bayesian inference may be implemented with normal Monte Carlo techniques, Hybrid Monte Carlo techniques, or other Bayesian learning techniques. After the creation of a set of models for each of the smaller simpler extraction problems, the machine-learning based models may be used for extraction.
    • 可以创建机器学习模型来执行集成电路布局提取。 使用这样的机器学习系统有两个主要阶段:模型创建和模型应用。 模型创建阶段包括使用机器学习技术创建一个或多个提取模型。 机器学习是通过首先创建由所识别的参数组成的训练数据集,从较小提取问题的典型示例和使用高度准确的基于物理的场求解器解决的那些示例提取问题的答案来进行。 接下来,系统使用贝叶斯推理进行机器学习,以训练神经网络模型。 贝叶斯推理可以用正常的蒙特卡罗技术,混合蒙特卡罗技术或其他贝叶斯学习技术来实现。 在为每个更简单的提取问题创建一组模型之后,可以使用基于机器学习的模型来提取。