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1. 发明授权

US09391878B2 Reliable packet delivery with overlay network (RPDON) 有权
标题翻译：覆盖网络可靠的分组传输（RPDON）
公开(公告)号：US09391878B2
公开(公告)日：2016-07-12
申请号：US13358130
申请日：2012-01-25
申请人： Kalyan Bade , Atul B. Mahamuni , Carol Barrett , Jean-Philippe Vasseur
发明人： Kalyan Bade , Atul B. Mahamuni , Carol Barrett , Jean-Philippe Vasseur
IPC分类号： H04L1/00 , H04L12/725 , H04L12/18 , H04L1/18 , H04L12/26 , H04L12/24
CPC分类号： H04L45/30 , H04L1/0086 , H04L1/1838 , H04L1/1877 , H04L1/1896 , H04L12/1868 , H04L41/0893 , H04L43/10 , H04L45/3065
摘要： In one embodiment, a device in a computer network establishes a reliable map that defines a set of packet criteria for which reliability is desired over an unreliable link to a peer device. In response to receiving a first packet from the peer device over the unreliable link, the device acknowledges the first packet to the peer device when the first packet matches the packet criteria of the reliable map. Also, in response to receiving a second packet destined via the peer device over the unreliable link, the device buffers the second packet when the second packet matches the packet criteria of the reliable map and retransmits the buffered second packet over the unreliable link to the peer device until acknowledged by the peer device.
摘要翻译：在一个实施例中，计算机网络中的设备建立可靠的映射，其定义了通过对对等设备的不可靠链路来期望可靠性的一组分组标准。响应于通过不可靠链路从对等设备接收到第一分组，当第一分组匹配可靠地图的分组标准时，设备向对等设备确认第一分组。此外，响应于通过不可靠链路接收经由对等设备发送的第二分组，当第二分组与可靠映射的分组标准匹配时，设备缓冲第二分组，并且经由不可靠链路将对缓冲的第二分组重传到对等体设备，直到对等设备确认。

2. 发明授权

US07489221B2 Fully differential, high Q, on-chip, impedance matching section 有权
标题翻译：全差分，高Q，片上，阻抗匹配部分
公开(公告)号：US07489221B2
公开(公告)日：2009-02-10
申请号：US11504073
申请日：2006-08-15
申请人： Carol Barrett , Tom McKay , Subhas Bothra
发明人： Carol Barrett , Tom McKay , Subhas Bothra
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F2017/0046 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An inductor circuit is disclosed. The inductor circuit includes a first in-silicon inductor and a second in-silicon inductor each having multiple turns. A portion of the multiple turns of the second in-silicon inductor is formed between turns of the first in-silicon inductor. The first and second in-silicon inductors are configured such that a differential current flowing through the first in-silicon inductor and the second in-silicon inductor flows in a same direction in corresponding turns of inductors.
摘要翻译：公开了一种电感器电路。电感器电路包括第一硅芯片电感器和第二硅芯片电感器，每个具有多个匝数。第二硅电感器的多圈的一部分形成在第一硅内感应器的匝之间。第一和第二硅内电感器被配置为使得流过第一硅芯片电感器和第二硅芯片电感器的差分电流在相应的电感圈中以相同的方向流动。

3. 发明申请

US20110163831A1 Fully Differential, High Q, On-Chip, Impedance Matching Section 有权
标题翻译：全差分，高Q，片上，阻抗匹配部分
公开(公告)号：US20110163831A1
公开(公告)日：2011-07-07
申请号：US13047699
申请日：2011-03-14
申请人： Carol Barrett , Tom McKay , Subhas Bothra
发明人： Carol Barrett , Tom McKay , Subhas Bothra
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F2017/0046 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An inductor circuit is disclosed. The inductor circuit includes a first in-silicon inductor and a second in-silicon inductor each having multiple turns. A portion of the multiple turns of the second in-silicon inductor is formed between turns of the first in-silicon inductor. The first and second in-silicon inductors are configured such that a differential current flowing through the first in-silicon inductor and the second in-silicon inductor flows in a same direction in corresponding turns of inductors.
摘要翻译：公开了一种电感器电路。电感器电路包括第一硅芯片电感器和第二硅芯片电感器，每个具有多个匝数。第二硅电感器的多圈的一部分形成在第一硅内感应器的匝之间。第一和第二硅内电感器被配置为使得流过第一硅芯片电感器和第二硅芯片电感器的差分电流在相应的电感圈中以相同的方向流动。

4. 发明授权

US07899409B2 Apparatus for controlling impedance 有权
标题翻译：用于控制阻抗的装置
公开(公告)号：US07899409B2
公开(公告)日：2011-03-01
申请号：US11341382
申请日：2006-01-30
申请人： Carol Barrett Huang , Edwin X. Li
发明人： Carol Barrett Huang , Edwin X. Li
IPC分类号： H04B1/44
CPC分类号： H04B1/18 , H04B1/0458 , H04B1/38
摘要： A transceiver is described that includes a power amplifier (PA), a low noise amplifier (LNA), and an impedance matching circuit having a first and second differential output node. The first and second differential output nodes are coupled to outputs of the PA and to inputs of the LNA. The impedance matching circuit provides a load impedance to the outputs of the PA. The transceiver further includes a first impedance device having an output impedance coupled between the first and second differential output nodes. In this way, the combination of the output impedance and the load impedance matches with an impedance at the inputs of the LNA.
摘要翻译：描述了包括功率放大器（PA），低噪声放大器（LNA）和具有第一和第二差分输出节点的阻抗匹配电路的收发器。第一和第二差分输出节点耦合到PA的输出和LNA的输入。阻抗匹配电路为PA的输出提供负载阻抗。收发器还包括具有耦合在第一和第二差分输出节点之间的输出阻抗的第一阻抗装置。以这种方式，输出阻抗和负载阻抗的组合与LNA的输入处的阻抗匹配。

5. 发明申请

US20060273874A1 Fully differential, high Q, on-chip, impedance matching section 有权
公开(公告)号：US20060273874A1
公开(公告)日：2006-12-07
申请号：US11504073
申请日：2006-08-15
申请人： Carol Barrett , Tom McKay , Subhas Bothra
发明人： Carol Barrett , Tom McKay , Subhas Bothra
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F2017/0046 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An inductor circuit is disclosed. The inductor circuit includes a first in-silicon inductor and a second in-silicon inductor each having multiple turns. A portion of the multiple turns of the second in-silicon inductor is formed between turns of the first in-silicon inductor. The first and second in-silicon inductors are configured such that a differential current flowing through the first in-silicon inductor and the second in-silicon inductor flows in a same direction in corresponding turns of inductors.

6. 发明授权

US07095307B1 Fully differential, high Q, on-chip, impedance matching section 失效
公开(公告)号：US07095307B1
公开(公告)日：2006-08-22
申请号：US10623084
申请日：2003-07-17
申请人： Carol Barrett , Tom McKay , Subhas Bothra
发明人： Carol Barrett , Tom McKay , Subhas Bothra
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F2017/0046 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An inductor circuit is disclosed. The inductor circuit includes a first in-silicon inductor and a second in-silicon inductor each having multiple turns. A portion of the multiple turns of the second in-silicon inductor is formed between turns of the first in-silicon inductor. The first and second in-silicon inductors are configured such that a differential current flowing through the first in-silicon inductor and the second in-silicon inductor flows in a same direction in corresponding turns of inductors.

7. 发明申请

US20050029741A1 6-5-4 Casino table poker game 有权
标题翻译： 6-5-4赌桌表扑克游戏
公开(公告)号：US20050029741A1
公开(公告)日：2005-02-10
申请号：US10637379
申请日：2003-08-07
申请人： Roger Snow , Carol Barrett
发明人： Roger Snow , Carol Barrett
IPC分类号： A63F3/00 , A63F3/08 , A63F1/00
CPC分类号： A63F3/00157
摘要： A casino table poker game comprises a player makes an Ante wager to play in the poker game, and a first number of cards being dealt to the player. A second number of cards is dealt to a dealer. The second number of cards dealt to the dealer is greater then the first number of cards dealt to players. The dealer displays at least a first card from the second number of cards dealt to the dealer. The at least first card analyzed by an automatic game rule of play to determine whether the card must be discarded. If the rule operates to require the at least first card be discarded according to the automatic game rule, the dealer must play the dealer hand with fewer then the second number of cards dealt to the dealer. After a final number of cards has been decided in the dealer's hand, the poker game is played to conclusion according to the game rules.
摘要翻译：赌场桌扑克游戏包括玩家使得Ante赌注在扑克游戏中玩，并且第一数量的牌被发送给玩家。第二张牌被交给经销商。发给经销商的第二张卡数大于发给玩家的第一张牌。经销商至少显示从发给经销商的第二张牌中的第一张牌。所述至少一张卡通过自动游戏规则分析，以确定是否必须丢弃该卡。如果规则操作以根据自动游戏规则丢弃至少第一张卡，则经销商必须以少于处理经销商的第二张牌来玩经销商手。在经销商手中确定了最终数量的牌后，扑克游戏根据游戏规则得到结论。

8. 发明授权

US08949959B2 Reduced authentication times for shared-media network migration 有权
标题翻译：降低了共享媒体网络迁移的验证时间
公开(公告)号：US08949959B2
公开(公告)日：2015-02-03
申请号：US13400991
申请日：2012-02-21
申请人： Atul B. Mahamuni , Carol Barrett , Jean-Philippe Vasseur
发明人： Atul B. Mahamuni , Carol Barrett , Jean-Philippe Vasseur
IPC分类号： H04L29/00
CPC分类号： H04L63/065 , H04L45/00 , H04W40/24
摘要： In one embodiment, a management device in a computer network determines when nodes of the computer network join any one of a plurality of field area routers (FARs), which requires a shared-media mesh security key for that joined FAR. The management device also maintains a database that indicates to which FAR each node in the computer network is currently joined, and to which FARs, if any, each node had previously joined, where the nodes are configured to maintain the mesh security key for one or more previously joined FARs in order to return to those previously joined FARs with the maintained mesh security key. Accordingly, in response to an updated mesh security key for a particular FAR of the plurality of FARs, the management node initiates distribution of the updated mesh security key to nodes having previously joined that particular FAR that are not currently joined to that particular FAR.
摘要翻译：在一个实施例中，计算机网络中的管理设备确定计算机网络的何时节点连接多个场区域路由器（FAR）中的任何一个，其需要用于该加入的FAR的共享 - 媒体网状安全密钥。管理设备还维护一个数据库，指示计算机网络中每个节点当前加入哪个FAR，以及每个节点先前已加入的哪个FAR（如果有的话），其中节点被配置为维护一个或多个节点的网状安全密钥以前加入的FAR，以便返回到以前加入的FAR与维护的网状安全密钥。因此，响应于针对多个FAR的特定FAR的更新的网状安全密钥，管理节点发起更新的网状安全密钥到先前已加入到当前未连接到该特定FAR的特定FAR的节点的分发。

9. 发明申请

US20130219478A1 REDUCED AUTHENTICATION TIMES FOR SHARED-MEDIA NETWORK MIGRATION 有权
标题翻译：减少媒体网络移动的认证时间
公开(公告)号：US20130219478A1
公开(公告)日：2013-08-22
申请号：US13400991
申请日：2012-02-21
申请人： Atul B. Mahamuni , Carol Barrett , Jean-Philippe Vasseur
发明人： Atul B. Mahamuni , Carol Barrett , Jean-Philippe Vasseur
IPC分类号： G06F21/20
CPC分类号： H04L63/065 , H04L45/00 , H04W40/24
摘要： In one embodiment, a management device in a computer network determines when nodes of the computer network join any one of a plurality of field area routers (FARs), which requires a shared-media mesh security key for that joined FAR. The management device also maintains a database that indicates to which FAR each node in the computer network is currently joined, and to which FARs, if any, each node had previously joined, where the nodes are configured to maintain the mesh security key for one or more previously joined FARs in order to return to those previously joined FARs with the maintained mesh security key. Accordingly, in response to an updated mesh security key for a particular FAR of the plurality of FARs, the management node initiates distribution of the updated mesh security key to nodes having previously joined that particular FAR that are not currently joined to that particular FAR.
摘要翻译：在一个实施例中，计算机网络中的管理设备确定计算机网络的何时节点连接多个场区域路由器（FAR）中的任何一个，其需要该加入的FAR的共享媒体网状安全密钥。管理设备还维护一个数据库，指示计算机网络中每个节点当前加入哪个FAR，以及每个节点先前已加入的哪个FAR（如果有的话），其中节点被配置为维护一个或多个节点的网状安全密钥以前加入的FAR，以便返回到以前加入的FAR与维护的网状安全密钥。因此，响应于针对多个FAR的特定FAR的更新的网状安全密钥，管理节点发起更新的网状安全密钥到先前已加入到当前未连接到该特定FAR的特定FAR的节点的分发。

10. 发明授权

US07911310B2 Fully differential, high Q, on-chip, impedance matching section 失效
标题翻译：全差分，高Q，片上，阻抗匹配部分
公开(公告)号：US07911310B2
公开(公告)日：2011-03-22
申请号：US12360068
申请日：2009-01-26
申请人： Carol Barrett , Tom McKay , Subhas Bothra
发明人： Carol Barrett , Tom McKay , Subhas Bothra
IPC分类号： H01F5/00
CPC分类号： H01L23/5227 , H01F2017/0046 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An inductor circuit is disclosed. The inductor circuit includes a first in-silicon inductor and a second in-silicon inductor each having multiple turns. A portion of the multiple turns of the second in-silicon inductor is formed between turns of the first in-silicon inductor. The first and second in-silicon inductors are configured such that a differential current flowing through the first in-silicon inductor and the second in-silicon inductor flows in a same direction in corresponding turns of inductors.
摘要翻译：公开了一种电感器电路。电感器电路包括第一硅芯片电感器和第二硅芯片电感器，每个具有多个匝数。第二硅电感器的多圈的一部分形成在第一硅内感应器的匝之间。第一和第二硅内电感器被配置为使得流过第一硅芯片电感器和第二硅芯片电感器的差分电流在相应的电感圈中以相同的方向流动。

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