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    • 1. 发明申请
    • DISPLAY PANEL
    • 显示面板
    • US20120032195A1
    • 2012-02-09
    • US12967077
    • 2010-12-14
    • Wei-Long LiChien-Chih JenKuang-Kuei Wang
    • Wei-Long LiChien-Chih JenKuang-Kuei Wang
    • H01L33/08
    • H01L27/124H01L29/41733
    • A display panel includes a substrate and a plurality of pixel units. Each pixel unit includes a first thin film transistor and a second thin film transistor. The first thin film transistor includes a first gate electrode electrically connected to a fist gate line, a first source electrode electrically connected to a data line, and a first drain electrode electrically connected to a first pixel electrode. The second thin film transistor includes a second gate electrode electrically connected to a second gate line, a second source electrode electrically connected to the data line, and a second drain electrode electrically connected to a second pixel electrode. The first drain electrode extends along a first direction to overlap the first gate electrode, and the second drain electrode extends along the first direction to overlap the second gate electrode.
    • 显示面板包括基板和多个像素单元。 每个像素单元包括第一薄膜晶体管和第二薄膜晶体管。 第一薄膜晶体管包括电连接到第一栅极线的第一栅电极,电连接到数据线的第一源电极和与第一像素电极电连接的第一漏电极。 第二薄膜晶体管包括电连接到第二栅极线的第二栅电极,与数据线电连接的第二源电极和与第二像素电极电连接的第二漏电极。 第一漏电极沿着第一方向延伸以与第一栅电极重叠,并且第二漏极沿着第一方向延伸以与第二栅电极重叠。
    • 3. 发明授权
    • Active device array substrate
    • 有源器件阵列衬底
    • US07405426B2
    • 2008-07-29
    • US11246658
    • 2005-10-06
    • Ming-Zen WuChien-Chih Jen
    • Ming-Zen WuChien-Chih Jen
    • H01L29/04
    • G02F1/136286G02F2001/13629G02F2201/40
    • An active device array substrate is provided. The active device array substrate comprises a substrate, multiple first lines, second lines, active devices, pixel electrodes and common lines. The first lines and second lines are disposed on the substrate and they form multiple pixel regions on the substrate. The active devices are respectively disposed in the pixel regions and each of the active devices is electrically connected to a first line and a second line, respectively. The pixel electrodes are respectively disposed in the pixel regions and each of the pixel electrodes is electrically connected to an active device, respectively. The common lines and first lines are roughly parallel and they are staggeringly disposed on the substrate. Each of the common lines has multiple branches which extend outside from their edges of two sides, and each of these branches is partly overlapped with the second lines.
    • 提供有源器件阵列衬底。 有源器件阵列衬底包括衬底,多个第一线,第二线,有源器件,像素电极和公共线。 第一行和第二行设置在基板上,并且在基板上形成多个像素区域。 有源器件分别设置在像素区域中,并且每个有源器件分别电连接到第一线和第二线。 像素电极分别设置在像素区域中,并且每个像素电极分别电连接到有源器件。 公共线和第一条线大致平行,并且它们错开地设置在基板上。 每个公共线具有从其两侧的边缘向外延伸的多个分支,并且这些分支中的每一个部分地与第二线重叠。
    • 4. 发明申请
    • Thin film transistor array
    • 薄膜晶体管阵列
    • US20070296882A1
    • 2007-12-27
    • US11473946
    • 2006-06-23
    • Jau-Ching HuangChien-Chih JenHuei-Chung YuMeng-Feng HungWen-Hsiung LiuHung-Jen Chu
    • Jau-Ching HuangChien-Chih JenHuei-Chung YuMeng-Feng HungWen-Hsiung LiuHung-Jen Chu
    • G02F1/136
    • G02F1/136286G02F1/136213G02F2001/13606
    • A thin film transistor array comprising a substrate, thin film transistors, pixel electrodes, common lines, and auxiliary electrodes disposed on the substrate is provided. The substrate has a plurality of pixel regions, and each of the thin film transistors, pixel electrodes, and auxiliary electrodes are disposed in each pixel region. In each pixel region, the pixel electrode is covered over the common line and is electrically connected to the thin film transistor. The auxiliary electrode is located between the pixel electrode and the common line, and the area of the overlapping region between the auxiliary electrode and the common line is L×H, while the sum of the side lengths of the overlapping region is more than 2L×2H, wherein L and H are both positive real numbers. The individual feed-through voltages in each pixel regions in the thin film transistor array are the same.
    • 提供一种薄膜晶体管阵列,其包括设置在基板上的基板,薄膜晶体管,像素电极,公共线以及辅助电极。 基板具有多个像素区域,并且薄膜晶体管,像素电极和辅助电极中的每一个设置在每个像素区域中。 在每个像素区域中,像素电极被覆盖在公共线上并与薄膜晶体管电连接。 辅助电极位于像素电极和公共线之间,辅助电极和公共线之间的重叠区域的面积为LxH,而重叠区域的边长之和大于2Lx2H,其中L 和H都是正实数。 薄膜晶体管阵列中每个像素区域中的各个馈通电压是相同的。
    • 6. 发明申请
    • Active device array substrate
    • 有源器件阵列衬底
    • US20070080348A1
    • 2007-04-12
    • US11246658
    • 2005-10-06
    • Ming-Zen WuChien-Chih Jen
    • Ming-Zen WuChien-Chih Jen
    • H01L29/04
    • G02F1/136286G02F2001/13629G02F2201/40
    • An active device array substrate is provided. The active device array substrate comprises a substrate, multiple first lines, second lines, active devices, pixel electrodes and common lines. The first lines and second lines are disposed on the substrate and they form multiple pixel regions on the substrate. The active devices are respectively disposed in the pixel regions and each of the active devices is electrically connected to a first line and a second line, respectively. The pixel electrodes are respectively disposed in the pixel regions and each of the pixel electrodes is electrically connected to an active device, respectively. The common lines and first lines are roughly parallel and they are staggeringly disposed on the substrate. Each of the common lines has multiple branches which extend outside from their edges of two sides, and each of these branches is partly overlapped with the second lines.
    • 提供有源器件阵列衬底。 有源器件阵列衬底包括衬底,多个第一线,第二线,有源器件,像素电极和公共线。 第一行和第二行设置在基板上,并且在基板上形成多个像素区域。 有源器件分别设置在像素区域中,并且每个有源器件分别电连接到第一线和第二线。 像素电极分别设置在像素区域中,并且每个像素电极分别电连接到有源器件。 公共线和第一条线大致平行,并且它们错开地设置在基板上。 每个公共线具有从其两侧的边缘向外延伸的多个分支,并且这些分支中的每一个部分地与第二线重叠。
    • 8. 发明授权
    • Pixel structure, thin film transistor array substrate and liquid crystal display panel
    • 像素结构,薄膜晶体管阵列基板和液晶显示面板
    • US07411213B2
    • 2008-08-12
    • US11397492
    • 2006-04-03
    • Chien-Chih JenMing-Zen Wu
    • Chien-Chih JenMing-Zen Wu
    • H01L29/04H01L29/10H01L31/00
    • H01L27/12G02F1/136227H01L27/124H01L27/1248
    • A pixel structure, suitable being driven by a scan line and a data line on a substrate, is provided. The pixel structure includes a thin film transistor (TFT) and a pixel electrode. Wherein, the TFT includes a gate, a first and a second dielectric layer, a semiconductor layer, a source, and a drain. Especially, the semiconductor layer has a body part and at least one extending part connected to thereof. The extending part is protruded from the edge of the body part disposed between the source and the drain. In addition, at least one contact hole is disposed in the second dielectric layer for exposing the extending part, and the first dielectric layer, the semiconductor layer, and the second dielectric layer at the extending part are removed through the contact hole. So, leakage current can be effectively reduced, thereby raising the Ion/Ioff ratio of the pixel structure.
    • 提供了适合于由基板上的扫描线和数据线驱动的像素结构。 像素结构包括薄膜晶体管(TFT)和像素电极。 其中,TFT包括栅极,第一和第二电介质层,半导体层,源极和漏极。 特别地,半导体层具有主体部分和与其连接的至少一个延伸部分。 延伸部分从设置在源极和漏极之间的主体部分的边缘突出。 此外,在第二电介质层中设置至少一个接触孔,用于暴露延伸部分,并且通过接触孔去除延伸部分处的第一介电层,半导体层和第二电介质层。 因此,可以有效降低泄漏电流,从而提高像素结构的Ion / Ioff比。
    • 9. 发明申请
    • Pixel structure, thin film transistor array substrate and liquid crystal display panel
    • 像素结构,薄膜晶体管阵列基板和液晶显示面板
    • US20070228466A1
    • 2007-10-04
    • US11397492
    • 2006-04-03
    • Chien-Chih JenMing-Zen Wu
    • Chien-Chih JenMing-Zen Wu
    • H01L27/12
    • H01L27/12G02F1/136227H01L27/124H01L27/1248
    • A pixel structure, suitable being driven by a scan line and a data line on a substrate, is provided. The pixel structure includes a thin film transistor (TFT) and a pixel electrode. Wherein, the TFT includes a gate, a first and a second dielectric layer, a semiconductor layer, a source, and a drain. Especially, the semiconductor layer has a body part and at least one extending part connected to thereof. The extending part is protruded from the edge of the body part disposed between the source and the drain. In addition, at least one contact hole is disposed in the second dielectric layer for exposing the extending part, and the first dielectric layer, the semiconductor layer, and the second dielectric layer at the extending part are removed through the contact hole. So, leakage current can be effectively reduced, thereby raising the Ion/Ioff ratio of the pixel structure.
    • 提供了一种适合于由基板上的扫描线和数据线驱动的像素结构。 像素结构包括薄膜晶体管(TFT)和像素电极。 其中,TFT包括栅极,第一和第二电介质层,半导体层,源极和漏极。 特别地,半导体层具有主体部分和与其连接的至少一个延伸部分。 延伸部分从设置在源极和漏极之间的主体部分的边缘突出。 此外,在第二电介质层中设置至少一个接触孔,用于暴露延伸部分,并且通过接触孔去除延伸部分处的第一介电层,半导体层和第二电介质层。 因此,可以有效降低泄漏电流,从而提高像素结构的Ion / Ioff比。
    • 10. 发明申请
    • Thin film transistor array substrate
    • 薄膜晶体管阵列基板
    • US20070063280A1
    • 2007-03-22
    • US11246611
    • 2005-10-06
    • Fu-Yuan ShiauChien-Chih JenMeng-Chi Liou
    • Fu-Yuan ShiauChien-Chih JenMeng-Chi Liou
    • H01L27/12
    • H01L27/124
    • A thin film transistor array substrate having a display area and a non-display area is provided. Pixel units, scan lines and data lines are disposed within the display area, and the scan line and data line are electrically connected to the corresponding pixel units. The non-display region has first chip bonding area and at least one first connecting line disposed within the non-display region. Scan line terminals and first bonding pads are disposed within the first chip bonding area. The scan line terminal is electrically connected to the corresponding scan line. The first connecting line is arranged between two of the adjacent chip bonding areas for making the first bonding pads within the adjacent chip bonding areas electrically connect to each other. The first connecting line comprises conductive layers which are electrically connected to one another.
    • 提供具有显示区域和非显示区域的薄膜晶体管阵列基板。 像素单元,扫描线和数据线被布置在显示区域内,并且扫描线和数据线电连接到相应的像素单元。 非显示区域具有第一芯片接合区域和设置在非显示区域内的至少一个第一连接线。 扫描线端子和第一接合焊盘设置在第一芯片接合区域内。 扫描线端子电连接到相应的扫描线。 第一连接线布置在两个相邻的芯片接合区域之间,用于使相邻芯片粘合区域内的第一焊盘彼此电连接。 第一连接线包括彼此电连接的导电层。