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1. 发明申请

US20110063033A1 OUTPUT STAGE OF A CLASS-A AMPLIFIER 有权
标题翻译：一类放大器的输出级
公开(公告)号：US20110063033A1
公开(公告)日：2011-03-17
申请号：US12878486
申请日：2010-09-09
申请人： Christophe Forel , Roland Mazet
发明人： Christophe Forel , Roland Mazet
IPC分类号： H03F3/16
CPC分类号： H03F3/3027
摘要： An output stage of an integrated class-A amplifier in a technology adapted to a first voltage and intended to be powered by a second voltage greater than the first one, including: one or several transistors of a first channel type between a first terminal of application of the second voltage and an output terminal of the stage; transistors of a second channel type between this output terminal and a second terminal of application of the second voltage, wherein: a first transistor of the second channel type has its gate directly connected to an input terminal of the stage; at least a second and a third transistors of the second channel type are in series between the output terminal and said first transistor, the gate of the second transistor being connected to the midpoint of a resistive dividing bridge between said output terminal and the gate of the third transistor, and the gate of the third transistor being biased to a fixed voltage.
摘要翻译：一种集成A类放大器的输出级，其技术适用于第一电压，并且意图由大于第一电压的第二电压供电，包括：在应用的第一终端之间的第一通道类型的一个或多个晶体管的第二电压和级的输出端子; 在该输出端和施加第二电压的第二端之间具有第二通道类型的晶体管，其中：第二通道类型的第一晶体管的栅极直接连接到该级的输入端; 所述第二通道类型的至少第二和第三晶体管串联在所述输出端子和所述第一晶体管之间，所述第二晶体管的栅极连接到所述输出端子与所述第一晶体管的栅极之间的电阻分压桥的中点第三晶体管，并且第三晶体管的栅极被偏置到固定电压。

2. 发明申请

US20050280451A1 Low-consumption inhibit circuit with hysteresis 有权
标题翻译：具有迟滞功能的低功耗抑制电路
公开(公告)号：US20050280451A1
公开(公告)日：2005-12-22
申请号：US11143916
申请日：2005-06-01
申请人： Christophe Forel , Robert Cittadini
发明人： Christophe Forel , Robert Cittadini
IPC分类号： G06F1/28 , H03K17/22 , H03K17/24 , H03K19/00 , H03L7/00
CPC分类号： H03K17/24 , H03K17/223
摘要： An inhibit circuit which produces an inhibit signal when a variation in a power supply potential is detected includes a comparator having a negative input connected to a generator producing a reference potential and a positive input connected to an output of a first image circuit producing a first potential that is an image of the power supply potential. The first image circuit includes a diode and a circuit for the production of a reference current parallel-connected between a common point to which the power supply potential is applied and an output of the first image circuit connected to the positive input of the comparator. The circuit has particular utility in portable integrated circuits with very low consumption when idle such as in mobile telephony.
摘要翻译：当检测到电源电位的变化时产生禁止信号的禁止电路包括具有连接到产生参考电位的发生器的负输入的比较器和连接到产生第一电位的第一图像电路的输出的正输入这是电源潜力的形象。第一图像电路包括二极管和用于产生并联在施加电源电位的公共点与连接到比较器的正输入端的第一图像电路的输出之间的参考电流的电路。该电路在便携式集成电路中具有特别的用途，其在空闲时具有非常低的消耗，例如在移动电话中。

3. 发明授权

US08648642B2 Low voltage analog switch 有权
标题翻译：低电压模拟开关
公开(公告)号：US08648642B2
公开(公告)日：2014-02-11
申请号：US13587071
申请日：2012-08-16
申请人： Hugo Gicquel , Beatrice Lafiandra , Christophe Forel
发明人： Hugo Gicquel , Beatrice Lafiandra , Christophe Forel
IPC分类号： H03K17/16 , H03K17/687
CPC分类号： H03K17/687
摘要： A switch for an analog signal may include a main MOS transistor whose source forms an input terminal of the switch and whose drain forms an output terminal of the switch, a capacitor having a first terminal permanently connected to the source of the main transistor, a circuit for charging the capacitor, and a first auxiliary transistor configured to connect the second terminal of the capacitor to the gate of the main transistor in response to a control signal. The charge circuit may include a resistor permanently connecting the second terminal of the capacitor to a power supply line. The capacitor and the resistor may form a high-pass filter having a cutoff frequency lower than the frequency of the analog signal.
摘要翻译：用于模拟信号的开关可以包括主MOS晶体管，其源极形成开关的输入端，其漏极形成开关的输出端;电容器，具有永久连接到主晶体管源极的第一端子，电路用于对电容器充电，以及第一辅助晶体管，其被配置为响应于控制信号将电容器的第二端子连接到主晶体管的栅极。充电电路可以包括将电容器的第二端子永久连接到电源线的电阻器。电容器和电阻器可以形成具有低于模拟信号频率的截止频率的高通滤波器。

4. 发明授权

US06765437B2 Audio amplifying circuit 有权
标题翻译：音频放大电路
公开(公告)号：US06765437B2
公开(公告)日：2004-07-20
申请号：US10264942
申请日：2002-10-04
申请人： Frédéric Goutti , Christophe Forel
发明人： Frédéric Goutti , Christophe Forel
IPC分类号： H03F114
CPC分类号： H03F1/305
摘要： An amplifying circuit receiving an input voltage and a reference voltage equal to a fraction of the circuit supply voltage, the reference voltage provided by a time constant circuit, including a circuit for, upon power-on, inhibiting the amplifying circuit for as long as the difference between the value of the provided reference voltage and the voltage at the output of the time constant circuit is greater than a determined threshold.
摘要翻译：接收输入电压和等于电路电源电压的一部分的参考电压的放大电路，由时间常数电路提供的参考电压，包括用于在上电时抑制放大电路的电路，只要所提供的参考电压的值与时间常数电路的输出端的电压之差大于确定的阈值。

5. 发明授权

US06410398B1 Device for the adjustment of circuits after packaging, corresponding fabrication process and induction device 有权
标题翻译：包装后电路调整装置，相应的制造工艺及感应装置
公开(公告)号：US06410398B1
公开(公告)日：2002-06-25
申请号：US09604989
申请日：2000-06-28
申请人： Christophe Forel , Sebastien Laville , Serge Pontarollo
发明人： Christophe Forel , Sebastien Laville , Serge Pontarollo
IPC分类号： H01L2120
CPC分类号： H01L29/66166 , H01L29/8605
摘要： A process for forming an electrical resistance in an integrated MOS transistor includes applying a first voltage to the source and gate of the MOS transistor, and applying a second voltage to the drain of the MOS transistor. A prebiasing voltage is applied to the substrate of the MOS transistor to make the base/emitter junction of a parasitic bipolar transistor of the MOS transistor conduct. The first and second voltages are capable of initiating a breakdown of the MOS transistor by an avalanche of the drain/substrate junction, an irreversible breakdown of the drain/substrate junction, and a short circuit between the drain and the source.
摘要翻译：在集成MOS晶体管中形成电阻的工艺包括：向MOS晶体管的源极和栅极施加第一电压，并向MOS晶体管的漏极施加第二电压。将预偏压电压施加到MOS晶体管的衬底，以使MOS晶体管的寄生双极晶体管的基极/发射极结导通。第一和第二电压能够通过漏极/衬底结的雪崩，漏极/衬底结的不可逆击穿以及漏极和源极之间的短路来启动MOS晶体管的击穿。

6. 发明授权

US06377115B1 Integrated potentiometer and corresponding fabrication process 有权
标题翻译：集成电位器及相应的制造工艺
公开(公告)号：US06377115B1
公开(公告)日：2002-04-23
申请号：US09678711
申请日：2000-10-04
申请人： Christophe Forel , Sebastien Laville , Christian Dufaza , Daniel Auvergne
发明人： Christophe Forel , Sebastien Laville , Christian Dufaza , Daniel Auvergne
IPC分类号： H03K17687
CPC分类号： H01L28/20 , H01L27/0711 , H01L27/0802 , H01L29/8605
摘要： A process and an integrated circuit are intended for obtaining an adjustable electrical resistance, in which a first voltage is applied to an integrated MOS transistor on its source, its gate and its substrate, and a second voltage is applied on its drain, the first and second voltages being able to initiate a breakdown of the MOS transistor by: avalanche of the drain/substrate junction; biasing of the parasitic bipolar transistor of the MOS transistor; irreversible breakdown of the drain/substrate junction; and shorting between the drain and the source.
摘要翻译：工艺和集成电路旨在获得可调节的电阻，其中第一电压被施加到其源极及其栅极及其衬底上的集成MOS晶体管，并且第二电压施加在其漏极上，第一和第二电压能够通过以下方式引发MOS晶体管的击穿：漏极/衬底结的雪崩; MOS晶体管的寄生双极晶体管的偏置;漏极/衬底结的不可逆击穿; 并在漏极和源极之间短路。

7. 发明授权

US08624674B2 Output stage of a class-A amplifier 有权
标题翻译： A类放大器的输出级
公开(公告)号：US08624674B2
公开(公告)日：2014-01-07
申请号：US12878486
申请日：2010-09-09
申请人： Christophe Forel , Roland Mazet
发明人： Christophe Forel , Roland Mazet
IPC分类号： H03F3/16
CPC分类号： H03F3/3027
摘要： An output stage of an integrated class-A amplifier in a technology adapted to a first voltage and intended to be powered by a second voltage greater than the first one, including: one or several transistors of a first channel type between a first terminal of application of the second voltage and an output terminal of the stage; transistors of a second channel type between this output terminal and a second terminal of application of the second voltage, wherein: a first transistor of the second channel type has its gate directly connected to an input terminal of the stage; at least a second and a third transistors of the second channel type are in series between the output terminal and said first transistor, the gate of the second transistor being connected to the midpoint of a resistive dividing bridge between said output terminal and the gate of the third transistor, and the gate of the third transistor being biased to a fixed voltage.
摘要翻译：一种集成A类放大器的输出级，其技术适用于第一电压，并且意图由大于第一电压的第二电压供电，包括：在应用的第一终端之间的第一通道类型的一个或多个晶体管的第二电压和级的输出端子; 在该输出端和施加第二电压的第二端之间具有第二通道类型的晶体管，其中：第二通道类型的第一晶体管的栅极直接连接到该级的输入端; 所述第二通道类型的至少第二和第三晶体管串联在所述输出端子和所述第一晶体管之间，所述第二晶体管的栅极连接到所述输出端子与所述第一晶体管的栅极之间的电阻分压桥的中点第三晶体管，并且第三晶体管的栅极被偏置到固定电压。

8. 发明授权

US07053704B2 Audio amplifier circuit with suppression of unwanted noise when starting from an off or standby state 有权
标题翻译：音频放大器电路在从关闭或待机状态开始时抑制不必要的噪声
公开(公告)号：US07053704B2
公开(公告)日：2006-05-30
申请号：US10816198
申请日：2004-04-01
申请人： Christophe Forel , Robert Cittadini
发明人： Christophe Forel , Robert Cittadini
IPC分类号： H03F3/45
CPC分类号： H03F3/183 , H03F1/305 , H03F1/307 , H03F3/187 , H03F3/72
摘要： A power amplifier circuit including first and second cascade-assembled operational amplifiers having respective first inputs receiving a reference voltage across a decoupling capacitor, respective outputs of which are connected across a load and are looped back on respective second inputs, the second input of the first amplifier receiving, from a coupling capacitor, an input voltage to be amplified, the amplifier circuit including means for separately charging the coupling and decoupling capacitors, upon circuit power-on, from an off or standby state, and means for inhibiting the amplifiers at least during the separate charging.
摘要翻译：一种功率放大器电路，包括第一和第二级联组合的运算放大器，其具有相应的第一输入端接收去耦电容器两端的参考电压，所述去耦电容器的相应输出端连接在负载上并被环回到相应的第二输入端，第一输入端放大器从耦合电容器接收待放大的输入电压，包括用于在断电或待机状态下电路通电时对耦合和去耦电容器进行单独充电的装置，以及用于至少抑制放大器的装置在单独充电期间。

9. 发明授权

US08493150B2 Class-AB output stage 有权
标题翻译： AB类输出级
公开(公告)号：US08493150B2
公开(公告)日：2013-07-23
申请号：US13275117
申请日：2011-10-17
申请人： Roland Mazet , Christophe Forel
发明人： Roland Mazet , Christophe Forel
IPC分类号： H03F3/45
CPC分类号： H03F3/3022
摘要： An output stage of a class-AB amplifier, including: a first transistor of a first channel type between a first terminal of application of a first voltage and an output terminal of the stage, having its gate connected to a first input terminal of the stage; a first transistor of a second channel type between this output terminal and a second terminal of application of the first voltage, having its gate connected to a second input terminal of the stage; and second and third transistors of the second channel type between the output terminal and the first transistor of the second channel type, the gate of the second transistor being connected to the midpoint of a resistive dividing bridge between said output terminal and the gate of the third transistor of the second channel type, and the gate of the third transistor being biased to a fixed voltage.
摘要翻译： AB类放大器的输出级，包括：施加第一电压的第一端和级的输出端之间的第一通道类型的第一晶体管，其栅极连接到级的第一输入端 ; 在该输出端子和施加第一电压的第二端子之间具有第二通道类型的第一晶体管，其栅极连接到该级的第二输入端子; 以及第二通道类型的第二和第三晶体管，在第二通道类型的输出端和第一晶体管之间，第二晶体管的栅极连接到所述输出端和第三沟道的栅极之间的电阻分压桥的中点晶体管，第三晶体管的栅极被偏压到固定电压。

10. 发明申请

US20130043938A1 LOW VOLTAGE ANALOG SWITCH 有权
标题翻译：低电压模拟开关
公开(公告)号：US20130043938A1
公开(公告)日：2013-02-21
申请号：US13587071
申请日：2012-08-16
申请人： Hugo GICQUEL , Beatrice LAFIANDRA , Christophe FOREL
发明人： Hugo GICQUEL , Beatrice LAFIANDRA , Christophe FOREL
IPC分类号： H03H11/04 , H03H3/00
CPC分类号： H03K17/687
摘要： A switch for an analog signal may include a main MOS transistor whose source forms an input terminal of the switch and whose drain forms an output terminal of the switch, a capacitor having a first terminal permanently connected to the source of the main transistor, a circuit for charging the capacitor, and a first auxiliary transistor configured to connect the second terminal of the capacitor to the gate of the main transistor in response to a control signal. The charge circuit may include a resistor permanently connecting the second terminal of the capacitor to a power supply line. The capacitor and the resistor may form a high-pass filter having a cutoff frequency lower than the frequency of the analog signal.
摘要翻译：用于模拟信号的开关可以包括主MOS晶体管，其源极形成开关的输入端，其漏极形成开关的输出端;电容器，具有永久连接到主晶体管源极的第一端子，电路用于对电容器充电，以及第一辅助晶体管，其被配置为响应于控制信号将电容器的第二端子连接到主晶体管的栅极。充电电路可以包括将电容器的第二端子永久性连接到电源线的电阻器。电容器和电阻器可以形成具有低于模拟信号频率的截止频率的高通滤波器。

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