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1. 发明申请

US20080114974A1 Reconfigurable image processor and the application architecture thereof 有权
标题翻译：可重构图像处理器及其应用架构
公开(公告)号：US20080114974A1
公开(公告)日：2008-05-15
申请号：US11806623
申请日：2007-06-01
申请人： Shao Yi Chien , Chih Chao Chen , Chun Fu Shen , Wan Kuei Lin
发明人： Shao Yi Chien , Chih Chao Chen , Chun Fu Shen , Wan Kuei Lin
IPC分类号： G06F7/38
CPC分类号： G06T1/20 , G06F9/3897 , H04N5/335 , H04N9/045
摘要： A reconfigurable image processor for image processing includes an arithmetic module, a first memory unit, a bus control module and a connecting module. By setting different configurations or configuring connections among arithmetic units via the connecting module, the operations of arithmetic units are reconfigured to include different functions. The present invention provides an application architecture including a sensor module, a display module, a second memory unit and a reconfigurable image processor.
摘要翻译：用于图像处理的可重构图像处理器包括算术模块，第一存储器单元，总线控制模块和连接模块。通过设置不同的配置或通过连接模块配置运算单元之间的连接，运算单元的操作重新配置为包括不同的功能。本发明提供一种包括传感器模块，显示模块，第二存储器单元和可重构图像处理器的应用架构。

2. 发明申请

US20060161698A1 Architecture for accessing an external memory 审中-公开
标题翻译：用于访问外部存储器的体系结构
公开(公告)号：US20060161698A1
公开(公告)日：2006-07-20
申请号：US11126357
申请日：2005-05-11
申请人： Chun-Fu Shen , Ju-Lung Fann
发明人： Chun-Fu Shen , Ju-Lung Fann
IPC分类号： G06F5/00 , G06F13/40
CPC分类号： G06F13/1678 , G06F13/4018
摘要： Provided is an external memory accessing architecture for use with IC comprising a first bus connected to an external memory and having n-bit data width; a first buffer unit of k serially connected first buffers each having n-bit data width, a first one of the first buffers connected to the external memory via the first bus; a second buffer unit comprising a second buffer having k*n-bit data width, the second buffer connected to the first buffers; a second bus connected to the second buffer for transferring k*n-bit data; an output unit connected to the second buffer unit and comprising a multiplexer; and a controller connected to the output unit, the second bus, and the external memory respectively such that the controller is able to read data from the external memory or transfer data thereto via the second bus and at least one control signal in higher transfer rate.
摘要翻译：提供了一种用于IC的外部存储器访问架构，其包括连接到外部存储器并具有n位数据宽度的第一总线; k个串行连接的第一缓冲器的第一缓冲单元，每个具有n位数据宽度，第一缓冲器中的第一缓冲器经由第一总线连接到外部存储器; 第二缓冲单元，包括具有k * n位数据宽度的第二缓冲器，所述第二缓冲器连接到所述第一缓冲器; 连接到第二缓冲器的用于传送k * n位数据的第二总线; 连接到第二缓冲单元并包括多路复用器的输出单元; 以及分别连接到输出单元，第二总线和外部存储器的控制器，使得控制器能够从外部存储器读取数据或经由第二总线传送数据，并且以更高的传输速率传送至少一个控制信号。

3. 发明申请

US20130044911A1 PARTICLE FILTER 有权
标题翻译：颗粒过滤器
公开(公告)号：US20130044911A1
公开(公告)日：2013-02-21
申请号：US13296654
申请日：2011-11-15
申请人： Chun-Fu SHEN , Der-Chun CHERNG
发明人： Chun-Fu SHEN , Der-Chun CHERNG
IPC分类号： G06K9/00
CPC分类号： G06T7/251 , G06T2200/28 , G06T2207/10024 , G06T2207/20021 , G06T2207/30212 , G06T2207/30232
摘要： A particle filter is suitable for performing particle filtering on a frame to track a particular object in the frame. The particle filter includes a frame cache, an observation model generator, and a particle filter controller. The frame cache is connected to a system memory through a system bus, in which the system memory stores all image blocks of the frame; and the frame cache obtains the at least one image block of the frame from the system memory and stores the obtained image block. The observation model generator reads at least one pixel from the frame cache, and generates an observation model corresponding to the object and the read image block according to the read pixel. The particle filter controller obtains the observation model from the observation model generator, and determines and outputs an object tracking result of the object according to the observation model.
摘要翻译：粒子滤波器适用于对帧执行粒子滤波以跟踪帧中的特定对象。粒子滤波器包括帧缓存，观察模型生成器和粒子滤波器控制器。帧缓存通过系统总线连接到系统存储器，其中系统存储器存储帧的所有图像块; 并且帧高速缓存从系统存储器获取帧的至少一个图像块并存储所获得的图像块。观察模型生成器从帧高速缓存读取至少一个像素，并且根据读取的像素生成与对象和读取图像块对应的观察模型。粒子滤波器控制器从观测模型发生器获取观测模型，根据观测模型确定并输出对象的物体跟踪结果。

4. 发明申请

US20090245571A1 Digital video target moving object segmentation method and system 有权
标题翻译：数字视频目标移动物体分割方法及系统
公开(公告)号：US20090245571A1
公开(公告)日：2009-10-01
申请号：US12286795
申请日：2008-10-02
申请人： Shao-Yi Chien , Wei-Kai Chan , Chun-Fu Shen
发明人： Shao-Yi Chien , Wei-Kai Chan , Chun-Fu Shen
IPC分类号： G06K9/46
CPC分类号： G06K9/38 , G06K9/00771
摘要： A digital video target moving object segmentation method and system is designed for processing a digital video stream for segmentation of every target moving object that appears in the video content. The proposed method and system is characterized by the operations of a multiple background imagery extraction process and a background imagery updating process for extracting characteristic background imagery whose content includes the motional background objects in addition to the static background scenes; and wherein the multiple background imagery extraction process is based on a background difference threshold comparison method, while the background imagery updating process is based on a background-matching and weight-counting method. This feature allows an object mask to be defined based on the characteristic background imagery, which can mask both the motional background objects as well as the static background scenes.
摘要翻译：数字视频目标移动物体分割方法和系统被设计用于处理视频内容中出现的每个目标移动物体的数字视频流。所提出的方法和系统的特征在于多重背景图像提取过程和背景图像更新过程的操作，用于提取除了静态背景场景之外的内容包括运动背景对象的特征背景图像; 并且其中所述多重背景图像提取处理基于背景差异阈值比较方法，而所述背景图像更新处理基于背景匹配和加权计数方法。该特征允许基于特征背景图像来定义对象掩模，其可以掩盖运动背景对象以及静态背景场景。

5. 发明授权

US08600109B2 Image object tracking using a particle filter 有权
标题翻译：使用粒子滤镜的图像对象跟踪
公开(公告)号：US08600109B2
公开(公告)日：2013-12-03
申请号：US13296654
申请日：2011-11-15
申请人： Chun-Fu Shen , Der-Chun Cherng , Sheng-Yan Yang , Yan-Chen Lu
发明人： Chun-Fu Shen , Der-Chun Cherng , Sheng-Yan Yang , Yan-Chen Lu
IPC分类号： G06K9/00
CPC分类号： G06T7/251 , G06T2200/28 , G06T2207/10024 , G06T2207/20021 , G06T2207/30212 , G06T2207/30232
摘要： A particle filter is suitable for performing particle filtering on a frame to track a particular object in the frame. The particle filter includes a frame cache, an observation model generator, and a particle filter controller. The frame cache is connected to a system memory through a system bus, in which the system memory stores all image blocks of the frame; and the frame cache obtains the at least one image block of the frame from the system memory and stores the obtained image block. The observation model generator reads at least one pixel from the frame cache, and generates an observation model corresponding to the object and the read image block according to the read pixel. The particle filter controller obtains the observation model from the observation model generator, and determines and outputs an object tracking result of the object according to the observation model.
摘要翻译：粒子滤波器适用于对帧执行粒子滤波以跟踪帧中的特定对象。粒子滤波器包括帧缓存，观察模型生成器和粒子滤波器控制器。帧缓存通过系统总线连接到系统存储器，其中系统存储器存储帧的所有图像块; 并且帧高速缓存从系统存储器获取帧的至少一个图像块并存储所获得的图像块。观察模型生成器从帧高速缓存读取至少一个像素，并且根据读取的像素生成与对象和读取图像块对应的观察模型。粒子滤波器控制器从观测模型发生器获取观测模型，根据观测模型确定并输出对象的物体跟踪结果。

6. 发明授权

US08045613B2 Module and architecture for generating real-time, multiple-resolution video streams and the architecture thereof 有权
标题翻译：用于生成实时，多分辨率视频流及其架构的模块和架构
公开(公告)号：US08045613B2
公开(公告)日：2011-10-25
申请号：US11976556
申请日：2007-10-25
申请人： Ju Lung Fann , Chun Fu Shen , Shih Yu Hsu
发明人： Ju Lung Fann , Chun Fu Shen , Shih Yu Hsu
IPC分类号： H04N7/12
CPC分类号： H04N19/59 , H04N19/423 , H04N19/436 , H04N19/61
摘要： A module for generating real-time, multiple-resolution video streams and the architecture thereof are disclosed. A module for generating multiple-resolution video streams as well as the architecture thereof for use with a video encoder includes a system bus, an external memory and a main processor. The main processor and the external memory are coupled to the system bus. The main processor includes a microprocessor, a main arithmetic unit and a secondary arithmetic unit. By applying the present invention, a less time-consuming arithmetic module can synchronously perform together with a more time-consuming arithmetic module, thereby reducing idle time and increasing hardware efficiency and parallelism.
摘要翻译：公开了一种用于生成实时多分辨率视频流的模块及其结构。用于产生多分辨率视频流的模块及其与视频编码器一起使用的架构包括系统总线，外部存储器和主处理器。主处理器和外部存储器耦合到系统总线。主处理器包括微处理器，主运算单元和辅助运算单元。通过应用本发明，更耗时的算术模块可以与更耗时的算术模块同时执行，从而减少空闲时间并提高硬件效率和并行性。

7. 发明授权

US08027551B2 Reconfigurable image processor and the application architecture thereof 有权
标题翻译：可重构图像处理器及其应用架构
公开(公告)号：US08027551B2
公开(公告)日：2011-09-27
申请号：US11806623
申请日：2007-06-01
申请人： Shao Yi Chien , Chih Chao Chen , Chun Fu Shen , Wan Kuei Lin
发明人： Shao Yi Chien , Chih Chao Chen , Chun Fu Shen , Wan Kuei Lin
IPC分类号： G06K9/54 , G06F7/38
CPC分类号： G06T1/20 , G06F9/3897 , H04N5/335 , H04N9/045
摘要： A reconfigurable image processor for image processing includes an arithmetic module, a first memory unit, a bus control module and a connecting module. By setting different configurations or configuring connections among arithmetic units via the connecting module, the operations of arithmetic units are reconfigured to include different functions. The present invention provides an application architecture including a sensor module, a display module, a second memory unit and a reconfigurable image processor.
摘要翻译：用于图像处理的可重构图像处理器包括算术模块，第一存储器单元，总线控制模块和连接模块。通过设置不同的配置或通过连接模块配置运算单元之间的连接，运算单元的操作重新配置为包括不同的功能。本发明提供一种包括传感器模块，显示模块，第二存储器单元和可重构图像处理器的应用架构。

8. 发明申请

US20080282304A1 Module and architecture for generating real-time, multiple-resolution video streams and the architecture thereof 有权
标题翻译：用于生成实时，多分辨率视频流及其架构的模块和架构
公开(公告)号：US20080282304A1
公开(公告)日：2008-11-13
申请号：US11976556
申请日：2007-10-25
申请人： Ju Lung Fann , Chun Fu Shen , Shih Yu Hsu
发明人： Ju Lung Fann , Chun Fu Shen , Shih Yu Hsu
IPC分类号： H04N7/173
CPC分类号： H04N19/59 , H04N19/423 , H04N19/436 , H04N19/61
摘要： A module for generating real-time, multiple-resolution video streams and the architecture thereof are disclosed. A module for generating multiple-resolution video streams as well as the architecture thereof for use with a video encoder includes a system bus, an external memory and a main processor. The main processor and the external memory are coupled to the system bus. The main processor includes a microprocessor, a main arithmetic unit and a secondary arithmetic unit. By applying the present invention, a less time-consuming arithmetic module can synchronously perform together with a more time-consuming arithmetic module, thereby reducing idle time and increasing hardware efficiency and parallelism.
摘要翻译：公开了一种用于生成实时多分辨率视频流的模块及其结构。用于产生多分辨率视频流的模块及其与视频编码器一起使用的架构包括系统总线，外部存储器和主处理器。主处理器和外部存储器耦合到系统总线。主处理器包括微处理器，主运算单元和辅助运算单元。通过应用本发明，更耗时的算术模块可以与更耗时的算术模块同时执行，从而减少空闲时间并提高硬件效率和并行性。

9. 发明授权

US06668020B2 Method for motion estimation in video coding 有权
公开(公告)号：US06668020B2
公开(公告)日：2003-12-23
申请号：US09794119
申请日：2001-02-28
申请人： Shyh-Yih Ma , Chun-Fu Shen
发明人： Shyh-Yih Ma , Chun-Fu Shen
IPC分类号： H04N718
CPC分类号： H04N19/533 , G06T7/238 , H04N5/145
摘要： A method for motion estimation for use in video coding. In a predetermined search region, three starting rows are chosen, wherein a given prediction point is on the middle row, the N-th row. The method includes the following steps. (a) All points of the (N−2)-th, N-th, and (N+2)-th rows are chosen as checking points. (b) Block match errors for the checking points are calculated and a checking point which corresponds to a minimum block match error is defined as a candidate checking point. (c) A determination is made whether the candidate checking point is on the N-th row; if so, the method proceeds to step (g); otherwise, it proceeds to step (d). (d) It is determined that whether the candidate checking point is on the (N+2)-th row; if so, the method proceeds to step (e); otherwise, it proceeds to step (f). (e) N is incremented by two, all points of the (N+2)-th row are chosen as checking points, and step (b) is repeated. (f) N is decremented by two, all points of the (N−2)-th row are chosen as checking points, and step (b) is repeated. (g) All points of the (N−1)-th and (N+1)-th rows are chosen as checking points, block match errors for the checking points are calculated, and a checking point corresponding to the minimum block match error is defined as the candidate checking point, wherein the candidate checking point is used for determining the motion vector for video coding.

10. 发明授权

US08238605B2 Digital video target moving object segmentation method and system 有权
标题翻译：数字视频目标移动物体分割方法及系统
公开(公告)号：US08238605B2
公开(公告)日：2012-08-07
申请号：US12286795
申请日：2008-10-02
申请人： Shao-Yi Chien , Wei-Kai Chan , Chun-Fu Shen
发明人： Shao-Yi Chien , Wei-Kai Chan , Chun-Fu Shen
IPC分类号： G06K9/00 , G06K9/34
CPC分类号： G06K9/38 , G06K9/00771
摘要： A digital video target moving object segmentation method and system is designed for processing a digital video stream for segmentation of every target moving object that appears in the video content. The proposed method and system is characterized by the operations of a multiple background imagery extraction process and a background imagery updating process for extracting characteristic background imagery whose content includes the motional background objects in addition to the static background scenes; and wherein the multiple background imagery extraction process is based on a background difference threshold comparison method, while the background imagery updating process is based on a background-matching and weight-counting method. This feature allows an object mask to be defined based on the characteristic background imagery, which can mask both the motional background objects as well as the static background scenes.
摘要翻译：数字视频目标移动物体分割方法和系统被设计用于处理视频内容中出现的每个目标移动物体的数字视频流进行分割。所提出的方法和系统的特征在于多重背景图像提取过程和背景图像更新过程的操作，用于提取除了静态背景场景之外的内容包括运动背景对象的特征背景图像; 并且其中所述多重背景图像提取处理基于背景差异阈值比较方法，而所述背景图像更新处理基于背景匹配和加权计数方法。该特征允许基于特征背景图像来定义对象掩模，其可以掩盖运动背景对象以及静态背景场景。

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