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    • 1. 发明授权
    • Method and apparatus for providing a serial interface between an asynchronous transfer mode (ATM) layer and a physical (PHY) layer
    • 用于在异步传输模式(ATM)层和物理(PHY)层之间提供串行接口的方法和装置
    • US06452927B1
    • 2002-09-17
    • US08581242
    • 1995-12-29
    • Craig S. Rich
    • Craig S. Rich
    • H04L1224
    • H04L12/5601H04L49/3081H04L2012/5604
    • An extender circuit provides a serial communication interface between an ATM layer and a PHY layer. The extender circuit includes a first circuit serially coupled to a second circuit. The first circuit communicates in parallel with the ATM layer, and the second circuit communicates in parallel with the PHY layer. The extender circuit additionally includes a serial link which serially transmits signals between the first and second circuits. The serial link includes a first serial link for transmitting a first serial signal from the first circuit to the second circuit, and a second serial link transmitting a second serial signal from the second circuit to the first circuit. The first circuit and the second circuit include similar architecture. The first circuit includes a parallel interface circuit for communicating in parallel with the ATM layer and a serial interface circuit coupled to the parallel interface circuit for serially communicating with the second circuit. The parallel interface circuit includes control circuitry, such as a programmable logic device, and memory circuitry, such as a first-in-first-out (FIFO) memory device. The serial interface circuit includes serializing/deserializing circuitry which includes serializing circuitry for serializing a plurality of parallel signals received from the parallel interface circuit and outputting a plurality of serial output signals. The serializing/deserializing circuitry further includes deserializing circuitry for deserializing a plurality of serial input signals to form a plurality of deserialized signals and providing the deserialized signals to the parallel interface circuit.
    • 扩展电路在ATM层和PHY层之间提供串行通信接口。 扩展器电路包括串联耦合到第二电路的第一电路。 第一电路与ATM层并行通信,第二电路与PHY层并行通信。 扩展器电路还包括在第一和第二电路之间串行发送信号的串行链路。 串行链路包括用于从第一电路向第二电路发送第一串行信号的第一串行链路,以及将第二串行信号从第二电路传输到第一电路的第二串行链路。 第一电路和第二电路包括类似的结构。 第一电路包括用于与ATM层并行通信的并行接口电路和耦合到并行接口电路的串行接口电路,用于与第二电路串联通信。 并行接口电路包括诸如可编程逻辑器件的控制电路和诸如先进先出(FIFO)存储器设备的存储器电路。 串行接口电路包括串行/反序列化电路,其包括串行化电路,用于串行从并行接口电路接收的多个并行信号并输出​​多个串行输出信号。 串行化/反序列化电路还包括反序列化电路,用于反序列化多个串行输入信号以形成多个反序列化信号并将并行接口电路提供反序列化信号。
    • 2. 发明授权
    • Method and apparatus for regenerating a control signal at an
asynchronous transfer mode (ATM) layer or a physical (PHY) layer
    • 用于在异步传输模式(ATM)层或物理(PHY)层再生控制信号的方法和装置
    • US5784370A
    • 1998-07-21
    • US581267
    • 1995-12-29
    • Craig S. Rich
    • Craig S. Rich
    • H04L12/56H04L29/08H04Q11/04H04L29/10
    • H04Q11/0478H04L69/323H04L2012/5652H04L2012/5681
    • An extender circuit provides a serial communication interface between an ATM layer and a PHY layer. The extender circuit includes a first circuit serially coupled to a second circuit. The first circuit is coupled to the ATM layer and communicates in parallel with the ATM layer. The first circuit is operable to receive a control signal from the ATM layer. The second circuit is coupled to the PHY layer and communicates in parallel with the PHY layer. The first circuit does not transmit the control signal to the second circuit. The second circuit regenerates the control signal at the PHY layer. The first circuit and the second circuit function in like manners. The first circuit receives a control signal generated by the ATM layer. The control signal may comprise a start of cell signal. The first circuit transmits a first sequence of signals to the second circuit. The second circuit detects the occurrence of the first sequence of signals and reproduces the control signal at the PHY layer when the first sequence of signals is not detected. The first sequence of signals may comprise an idle character. In another embodiment, the first circuit transmits a second sequence of signals to the second circuit. The second circuit reproduces the control signal at the PHY layer when the second circuit detects the first sequence of signals followed by the second sequence of signals.
    • 扩展电路在ATM层和PHY层之间提供串行通信接口。 扩展器电路包括串联耦合到第二电路的第一电路。 第一电路耦合到ATM层并与ATM层并行通信。 第一电路可操作以从ATM层接收控制信号。 第二电路耦合到PHY层并与PHY层并行通信。 第一电路不将控制信号发送到第二电路。 第二电路在PHY层再生控制信号。 第一个电路和第二个电路以同样的方式起作用。 第一电路接收由ATM层产生的控制信号。 控制信号可以包括单元信号的开始。 第一电路将第一序列信号发送到第二电路。 当没有检测到第一信号序列时,第二电路检测第一信号序列的发生并再现PHY层处的控制信号。 信号的第一序列可以包括空闲字符。 在另一个实施例中,第一电路向第二电路发送第二信号序列。 当第二电路检测到第一信号序列后跟第二信号序列时,第二电路在PHY层再现控制信号。