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1. 发明授权

US08122303B2 Data structure for flash memory and data reading/writing method thereof 有权
公开(公告)号：US08122303B2
公开(公告)日：2012-02-21
申请号：US12122768
申请日：2008-05-19
申请人： Jian-Qiang Ni , Dong-Yu He , Chun-Ting Liao
发明人： Jian-Qiang Ni , Dong-Yu He , Chun-Ting Liao
IPC分类号： G11C29/00
CPC分类号： G06F12/0246 , G06F11/1068
摘要： A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.

2. 发明授权

US08648968B2 Saturation adjusting apparatus and method thereof 有权
标题翻译：饱和度调节装置及其方法
公开(公告)号：US08648968B2
公开(公告)日：2014-02-11
申请号：US13194265
申请日：2011-07-29
申请人： Li-Cong Hou , Dong-Yu He , Hong-Hai Dai
发明人： Li-Cong Hou , Dong-Yu He , Hong-Hai Dai
IPC分类号： H04N5/46
CPC分类号： H04N9/77 , H04N9/68
摘要： A saturation adjusting apparatus for processing a pixel, which has three color components each having a value falling within a range defined by upper and lower extreme values, of a RGB color model includes an extreme value controller and a component adjuster. The extreme value controller determines maximum and minimum extreme value thresholds for ensuring that the values of the color components of the pixel after undergoing linear color correction processing based on a correction indicator fall within the range defined by the upper and lower extreme values. The component adjuster includes a decision-making unit for choosing the correction indicator from a group of values which includes the maximum extreme value threshold, the minimum extreme value threshold, and a saturation setting. The component adjuster further includes a color corrector for performing linear color correction processing on the three color components of the pixel using the correction indicator.
摘要翻译：用于处理RGB颜色模型中具有落在由上下极限值定义的范围内的值的三个颜色分量的像素的饱和度调整装置包括极值控制器和部件调节器。极值控制器确定最大和最小极值阈值，以确保基于校正指示符进行线性颜色校正处理之后的像素的颜色分量的值落入由上限和下限值定义的范围内。组件调整器包括一个决策单元，用于从包括最大极限值阈值，最小极限值阈值和饱和度设置的一组值中选择校正指示符。元件调节器还包括一个颜色校正器，用于使用校正指示器对像素的三个颜色分量进行线性颜色校正处理。

3. 发明授权

US08055983B2 Data writing method for flash memory and error correction encoding/decoding method thereof 有权
标题翻译：闪存的数据写入方法及其纠错编码/解码方法
公开(公告)号：US08055983B2
公开(公告)日：2011-11-08
申请号：US12126344
申请日：2008-05-23
申请人： Jian Qiang Ni , Dong Yu He , Chun Ting Liao
发明人： Jian Qiang Ni , Dong Yu He , Chun Ting Liao
IPC分类号： H03M13/00
CPC分类号： G06F11/1068
摘要： A data writing method for flash memory and an error correction encoding/decoding method thereof are disclosed. In an embodiment of the data writing method, a 6-bit ECC scheme using a Reed-Solomon code derived from a Galois Field GF (29) is used to encode a data for generating a redundant which requires smaller storing space. In an embodiment of the error correction encoding/decoding method, an erase checking value corresponding to the status where all the bytes of data area and parameter storing area are “0xff” is provided to improve the security of stored data.
摘要翻译：公开了一种闪速存储器的数据写入方法及其纠错编码/解码方法。在数据写入方法的一个实施例中，使用从伽罗瓦域GF（29）导出的Reed-Solomon码的6比特ECC方案用于编码用于生成需要较小存储空间的冗余的数据。在纠错编码/解码方法的实施例中，提供与数据区和参数存储区的全部字节为“0xff”的状态对应的擦除检查值，以提高存储数据的安全性。

4. 发明申请

US20080294935A1 DATA STRUCTURE FOR FLASH MEMORY AND DATA READING/WRITING METHOD THEREOF 有权
标题翻译：闪存存储器的数据结构和数据读取/写入方法
公开(公告)号：US20080294935A1
公开(公告)日：2008-11-27
申请号：US12122768
申请日：2008-05-19
申请人： Jian-Qiang NI , Dong-Yu He , Chun-Ting Liao
发明人： Jian-Qiang NI , Dong-Yu He , Chun-Ting Liao
IPC分类号： G06F11/08 , G06F12/00
CPC分类号： G06F12/0246 , G06F11/1068
摘要： A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.
摘要翻译：公开了一种闪速存储器的数据结构及其数据读/写方法。分别将512字节数据和从用6位纠错码方案编码的数据导出的冗余码分别存储在闪速存储器的块中的具有顺序地址的第一扇区和第二扇区中。该块的逻辑块地址信息被分成存储在第一扇区和第二扇区中的两部分。

5. 发明授权

US08327230B2 Data structure for flash memory and data reading/writing method thereof 有权
标题翻译： Flash存储器的数据结构及其数据读/写方法
公开(公告)号：US08327230B2
公开(公告)日：2012-12-04
申请号：US13344671
申请日：2012-01-06
申请人： Jian-Qiang Ni , Dong-Yu He , Chun-Ting Liao
发明人： Jian-Qiang Ni , Dong-Yu He , Chun-Ting Liao
IPC分类号： G11C29/00
CPC分类号： G06F12/0246 , G06F11/1068
摘要： A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.
摘要翻译：公开了一种闪速存储器的数据结构及其数据读/写方法。分别将512字节数据和从用6位纠错码方案编码的数据导出的冗余码分别存储在闪速存储器的块中的具有顺序地址的第一扇区和第二扇区中。该块的逻辑块地址信息被分成存储在第一扇区和第二扇区中的两部分。

6. 发明申请

US20120110419A1 Data Structure for Flash Memory and Data Reading/Writing Method Thereof 有权
标题翻译： Flash存储器的数据结构和数据读取/写入方法
公开(公告)号：US20120110419A1
公开(公告)日：2012-05-03
申请号：US13344671
申请日：2012-01-06
申请人： Jian-Qiang Ni , Dong-Yu He , Chun-Ting Liao
发明人： Jian-Qiang Ni , Dong-Yu He , Chun-Ting Liao
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： G06F12/0246 , G06F11/1068
摘要： A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block of the flash memory respectively. A logic block address information of this block is divided into two parts that are stored in the first sector and the second sector respectively.
摘要翻译：公开了一种闪速存储器的数据结构及其数据读/写方法。分别将512字节数据和从用6位纠错码方案编码的数据导出的冗余码分别存储在闪速存储器的块中的具有顺序地址的第一扇区和第二扇区中。该块的逻辑块地址信息被分成存储在第一扇区和第二扇区中的两部分。

7. 发明申请

US20080294965A1 Data Writing Method For Flash Memory and Error Correction Encoding/Decoding Method Thereof 有权
标题翻译： Flash存储器的数据写入方法及其纠错编码/解码方法
公开(公告)号：US20080294965A1
公开(公告)日：2008-11-27
申请号：US12126344
申请日：2008-05-23
申请人： Jian-Qiang Ni , Dong-Yu He , Chun-Ting Liao
发明人： Jian-Qiang Ni , Dong-Yu He , Chun-Ting Liao
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： G06F11/1068
摘要： A data writing method for flash memory and an error correction encoding/decoding method thereof are disclosed. In an embodiment of the data writing method, a 6-bit ECC scheme using a Reed-Solomon code derived from a Galois Field GF (29) is used to encode a data for generating a redundant which requires smaller storing space. In an embodiment of the error correction encoding/decoding method, an erase checking value corresponding to the status where all the bytes of data area and parameter storing area are “0xff” is provided to improve the security of stored data.
摘要翻译：公开了一种闪速存储器的数据写入方法及其纠错编码/解码方法。在数据写入方法的一个实施例中，使用从伽罗瓦域GF（29）导出的Reed-Solomon码的6比特ECC方案用于编码用于生成需要较小存储空间的冗余的数据。在纠错编码/解码方法的实施例中，提供与数据区和参数存储区的全部字节为“0xff”的状态对应的擦除检查值，以提高存储数据的安全性。

8. 发明申请

US20080147966A1 FLASH MEMORY DEVICE, UPDATE METHOD AND PROGRAM SEARCH METHOD THEREOF 审中-公开
标题翻译：闪存存储器件，更新方法和程序搜索方法
公开(公告)号：US20080147966A1
公开(公告)日：2008-06-19
申请号：US11958682
申请日：2007-12-18
申请人： Chun-Ting Liao , Dong-Yu He , Guang-Huan Zhao
发明人： Chun-Ting Liao , Dong-Yu He , Guang-Huan Zhao
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/0866
摘要： The present invention discloses a flash memory device, an update method and program search method thereof. The flash memory device includes a read-only memory unit, a flash memory unit and a control unit. The read-only memory unit is used to store a first program code. The flash memory unit is used to store a second program code and digital data. The control unit coupled to the flash memory unit and the read-only memory unit is used to control the operation of the flash memory unit based on the first program code and the second program code. Hence, the upgrade time for the flash memory device can be shortened and the manufacture cost can be reduced.
摘要翻译：本发明公开了一种闪速存储器件，其更新方法和程序搜索方法。闪速存储器件包括只读存储器单元，闪存单元和控制单元。只读存储器单元用于存储第一程序代码。闪存单元用于存储第二程序代码和数字数据。耦合到闪存单元和只读存储器单元的控制单元用于基于第一程序代码和第二程序代码来控制闪存单元的操作。因此，可以缩短闪存器件的升级时间，并且可以降低制造成本。

9. 发明申请

US20120026404A1 SATURATION ADJUSTING APPARATUS AND METHOD THEREOF 有权
标题翻译：饱和度调节装置及其方法
公开(公告)号：US20120026404A1
公开(公告)日：2012-02-02
申请号：US13194265
申请日：2011-07-29
申请人： Li-Cong HOU , Dong-Yu HE , Hong-Hai DAI
发明人： Li-Cong HOU , Dong-Yu HE , Hong-Hai DAI
IPC分类号： H04N9/68
CPC分类号： H04N9/77 , H04N9/68
摘要： A saturation adjusting apparatus for processing a pixel, which has three color components each having a value falling within a range defined by upper and lower extreme values, of a RGB color model includes an extreme value controller and a component adjuster. The extreme value controller determines maximum and minimum extreme value thresholds for ensuring that the values of the color components of the pixel after undergoing linear color correction processing based on a correction indicator fall within the range defined by the upper and lower extreme values. The component adjuster includes a decision-making unit for choosing the correction indicator from a group of values which includes the maximum extreme value threshold, the minimum extreme value threshold, and a saturation setting. The component adjuster further includes a color corrector for performing linear color correction processing on the three color components of the pixel using the correction indicator.
摘要翻译：用于处理RGB颜色模型中具有落在由上下极限值定义的范围内的值的三个颜色分量的像素的饱和度调整装置包括极值控制器和部件调节器。极值控制器确定最大和最小极值阈值，以确保基于校正指示符进行线性颜色校正处理之后的像素的颜色分量的值落入由上限和下限值定义的范围内。组件调整器包括一个决策单元，用于从包括最大极限值阈值，最小极限值阈值和饱和度设置的一组值中选择校正指示符。元件调节器还包括一个颜色校正器，用于使用校正指示器对像素的三个颜色分量进行线性颜色校正处理。

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