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1. 发明授权

US07462269B2 Method for low temperature annealing of metallization micro-structures in the production of a microelectronic device 失效
标题翻译：金属化微结构在微电子器件生产中的低温退火方法
公开(公告)号：US07462269B2
公开(公告)日：2008-12-09
申请号：US09885451
申请日：2001-06-20
申请人： Thomas L. Ritzdorf , E. Henry Stevens , LinLin Chen , Lyndon W. Graham , Curt Dundas
发明人： Thomas L. Ritzdorf , E. Henry Stevens , LinLin Chen , Lyndon W. Graham , Curt Dundas
IPC分类号： C25D5/18 , C25D7/12
CPC分类号： H01L21/67173 , C25D5/022 , C25D5/50 , C25D7/123 , C25D17/001 , H01L21/2885 , H01L21/6723 , H01L21/76838 , H01L21/76877 , H01L21/76883
摘要： A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.
摘要翻译：阐述了在金属化的微电子工件（例如半导体晶片）的表面处填充凹陷微结构的方法。根据该方法，金属层通过诸如电镀工艺的工艺沉积到微结构中，该工艺产生足够小的金属颗粒，以便基本上填充凹陷的微结构。沉积的金属随后在低于约100摄氏度的温度下进行退火处理，并且甚至可以在环境室温下进行，以允许提供最佳电性能的晶粒生长。还提出了用于执行独特退火工艺的各种新型装置。

2. 发明授权

US06994776B2 Method and apparatus for low temperature annealing of metallization micro-structure in the production of a microelectronic device 有权
公开(公告)号：US06994776B2
公开(公告)日：2006-02-07
申请号：US09882613
申请日：2001-06-15
申请人： Thomas L. Ritzdorf , E. Henry Stevens , LinLin Chen , Lyndon W. Graham , Curt Dundas
发明人： Thomas L. Ritzdorf , E. Henry Stevens , LinLin Chen , Lyndon W. Graham , Curt Dundas
IPC分类号： C25D17/00 , C25B15/00 , C25B9/00
CPC分类号： H01L21/76877
摘要： A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.

3. 发明授权

US5385634A Sealed self aligned contact process 失效
标题翻译：密封自对准接触过程
公开(公告)号：US5385634A
公开(公告)日：1995-01-31
申请号：US43569
申请日：1993-04-07
申请人： Douglas Butler , E. Henry Stevens , Richard A. Bailey , Thomas C. Taylor
发明人： Douglas Butler , E. Henry Stevens , Richard A. Bailey , Thomas C. Taylor
IPC分类号： H01L21/28 , H01L21/285 , H01L21/3213 , H01L21/336 , H01L21/60 , H01L21/768 , H01L23/485 , H01L29/78 , H01L21/00
CPC分类号： H01L21/76897 , H01L21/28512 , H01L21/76804 , H01L23/485 , H01L2924/0002 , Y10S438/97
摘要： In fabricating a contact window to source/drain electrode next to a gate electrode of an integrated circuit: (1) establishing a structure with a window over the source/drain region next to the gate electrode; (2) establishing a region of titanium silicide over the source/drain electrode and establishing a titanium nitride layer over the window and gate electrode; (3) establishing a layer of silicon nitride over the titanium nitride layer; (4) patterning the silicon nitride layer; (5) using the patterned silicon nitride layer as a mask to pattern the titanium nitride layer; (6) adding another silicon nitride layer to seal the gate electrode where it is not protected by titanium nitride; (7) opening a window over the electrode by an anisotropic etch; (8) widening the window with an isotropic etch, using the silicon nitride and titanium nitride as a protective barrier; and (9) adding contact material in said windows.
摘要翻译：在制造与集成电路的栅电极相邻的源极/漏电极的接触窗口时：（1）在栅电极旁边的源极/漏极区域上建立具有窗口的结构; （2）在源/漏电极上建立硅化钛区域，并在窗口和栅电极上建立氮化钛层; （3）在氮化钛层上建立氮化硅层; （4）构图氮化硅层; （5）使用图案化氮化硅层作为掩模来图案化氮化钛层; （6）添加另一个氮化硅层以密封其不受氮化钛保护的栅电极; （7）通过各向异性蚀刻在电极上打开窗口; （8）使用氮化硅和氮化钛作为保护屏障，用各向同性蚀刻来加宽窗口; 和（9）在所述窗口中添加接触材料。

4. 发明授权

US06887789B2 Process and manufacturing tool architecture for use in the manufacture of one or more protected metallization structures on a workpiece 失效
公开(公告)号：US06887789B2
公开(公告)日：2005-05-03
申请号：US10086655
申请日：2002-02-28
申请人： E. Henry Stevens
发明人： E. Henry Stevens
IPC分类号： C25D5/02 , C25D7/12 , H01L21/288 , H01L21/3205 , H01L21/3213 , H01L21/768 , H01L21/44
CPC分类号： H01L21/76852 , C25D5/022 , C25D7/123 , H01L21/2885 , H01L21/32051 , H01L21/32134 , H01L21/76801 , H01L21/76825 , H01L21/76834 , H01L21/76838 , H01L21/76855 , H01L21/76856 , H01L21/76873 , H01L21/76885 , H01L21/76888
摘要： A process for providing one or more protected copper elements on a surface of a workpiece is set forth. In accordance with the process, a barrier layer is applied to the workpiece. If the barrier layer is not suitable as a seed layer for subsequent electroplating processes, a separate seed layer is applied over the surface of the barrier layer. One or more copper elements are then electroplated on selected portions of the seed layer or, if suitable, the barrier layer. If used, the seed layer is then substantially removed. At least a portion of a surface of the barrier layer is rendered unplatable while leaving the copper elements suitable for electroplating. A protective layer is then electroplated onto surfaces of the one or more copper elements.

5. 发明授权

US06508920B1 Apparatus for low-temperature annealing of metallization microstructures in the production of a microelectronic device 失效
标题翻译：用于微电子器件生产中金属化微结构的低温退火的装置
公开(公告)号：US06508920B1
公开(公告)日：2003-01-21
申请号：US09387577
申请日：1999-08-31
申请人： Thomas L. Ritzdorf , E. Henry Stevens , LinLin Chen , Lyndon W. Graham , Curt Dundas
发明人： Thomas L. Ritzdorf , E. Henry Stevens , LinLin Chen , Lyndon W. Graham , Curt Dundas
IPC分类号： C25D1700
CPC分类号： H01L21/67173 , C25D5/022 , C25D5/50 , C25D7/123 , C25D17/001 , H01L21/2885 , H01L21/6723 , H01L21/76838 , H01L21/76877 , H01L21/76883
摘要： A method for filling recessed microstructures at a surface of a microelectronic workpiece, such as a semiconductor wafer, with metallization is set forth. In accordance with the method, a metal layer is deposited into the microstructures with a process, such as an electroplating process, that generates metal grains that are sufficiently small so as to substantially fill the recessed microstructures. The deposited metal is subsequently subjected to an annealing process at a temperature below about 100 degrees Celsius, and may even take place at ambient room temperature to allow grain growth which provides optimal electrical properties. Various novel apparatus for executing unique annealing processes are also set forth.
摘要翻译：阐述了在金属化的微电子工件（例如半导体晶片）的表面处填充凹陷微结构的方法。根据该方法，金属层通过诸如电镀工艺的工艺沉积到微结构中，该工艺产生足够小的金属颗粒，以便基本上填充凹陷的微结构。沉积的金属随后在低于约100摄氏度的温度下进行退火处理，并且甚至可以在环境室温下进行，以允许提供最佳电性能的晶粒生长。还提出了用于执行独特退火工艺的各种新型装置。

6. 发明授权

US06451114B1 Apparatus for application of chemical process to a workpiece 失效
标题翻译：化学工艺应用于工件的设备
公开(公告)号：US06451114B1
公开(公告)日：2002-09-17
申请号：US09553676
申请日：2000-04-21
申请人： E. Henry Stevens
发明人： E. Henry Stevens
IPC分类号： B05C502
CPC分类号： H01L21/6708 , H01L21/67051
摘要： An apparatus for application of a chemical process to a workpiece in which movement and precise location of the workpiece within the apparatus is accomplished by means of a single linear actuator and two locator components. A sequence of liquid solutions may be applied to a surface of the workpiece during processing, and a sequence of controlled atmospheres may be provided within a reaction chamber of the apparatus to thereby facilitate implementation of chemical processes that utilize both liquid-phase and gas-phase reactions in concert.
摘要翻译：一种用于向工件施加化学过程的装置，其中通过单个线性致动器和两个定位器部件来实现工件在装置内的移动和精确位置。在处理过程中可以将一系列液体溶液施加到工件的表面，并且可以在设备的反应室内提供一系列受控的气氛，从而有助于实现利用液相和气相的化学过程反应一致。

7. 发明授权

US06376374B1 Process and manufacturing tool architecture for use in the manufacturing of one or more protected metallization structures on a workpiece 失效
标题翻译：用于在工件上制造一个或多个被保护的金属化结构的工艺和制造工具架构
公开(公告)号：US06376374B1
公开(公告)日：2002-04-23
申请号：US09076565
申请日：1998-05-12
申请人： E. Henry Stevens
发明人： E. Henry Stevens
IPC分类号： H01L2244
CPC分类号： H01L21/76852 , C25D5/022 , C25D7/123 , H01L21/2885 , H01L21/32051 , H01L21/32134 , H01L21/76801 , H01L21/76825 , H01L21/76834 , H01L21/76838 , H01L21/76855 , H01L21/76856 , H01L21/76873 , H01L21/76885 , H01L21/76888
摘要： A process for providing one or more protected copper elements on a surface of a workpiece is set forth. In accordance with the process, a barrier layer is applied to the workpiece. If the barrier layer is not suitable as a seed layer for subsequent electroplating processes, a separate seed layer is applied over the surface of the barrier layer. One or more copper elements are then electroplated on selected portions of the seed layer or, if suitable, the barrier layer. If used, the seed layer is then substantially removed. At least a portion of a surface of the barrier layer is rendered unplatable while leaving the copper elements suitable for electroplating. A protective layer is then electroplated onto surfaces of the one or more copper elements.
摘要翻译：阐述了在工件表面上提供一个或多个被保护的铜元素的工艺。根据该工艺，将阻挡层施加到工件上。如果阻挡层不适用于随后的电镀工艺的种子层，则在阻挡层的表面上施加单独的种子层。然后将一种或多种铜元素电镀在种子层的选定部分上，或者如果合适的话，电镀在阻挡层上。如果使用，则基本上除去种子层。阻挡层的表面的至少一部分被赋予不可电镀，同时留下适合于电镀的铜元素。然后将保护层电镀到一个或多个铜元件的表面上。

8. 发明授权

US06331490B1 Process for etching thin-film layers of a workpiece used to form microelectric circuits or components 失效
标题翻译：用于蚀刻用于形成微电路或部件的工件的薄膜层的工艺
公开(公告)号：US06331490B1
公开(公告)日：2001-12-18
申请号：US09160522
申请日：1998-09-24
申请人： E. Henry Stevens , Richard Pfeiffer
发明人： E. Henry Stevens , Richard Pfeiffer
IPC分类号： C09K1304
CPC分类号： H01L21/76852 , B08B3/04 , C23F1/18 , H01L21/32134 , H01L21/67017 , H01L21/6708 , H01L21/76802 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/76834 , H01L21/76838 , H01L21/76855 , H01L21/76856 , H01L21/76865 , H01L21/76873 , H01L21/76885 , H01L21/76888 , H01L2221/1078
摘要： A process for removing at least one thin-film layer from a surface of a workpiece pursuant to manufacturing a microelectronic interconnect or component is set forth. Generally stated, the process comprises the oxidation of at least a portion of the at least one thin-film layer and the etching of the oxidized thin-film layer using an etchant that selectively etches primarily the oxidized thin-film layer.
摘要翻译：阐述了根据制造微电子互连或部件从工件表面去除至少一个薄膜层的工艺。通常，该方法包括使用选择性蚀刻主要是氧化的薄膜层的蚀刻剂来氧化至少一个薄膜层的至少一部分和氧化的薄膜层的蚀刻。

9. 发明授权

US6143126A Process and manufacturing tool architecture for use in the manufacture of one or more metallization levels on an integrated circuit 失效
标题翻译：用于在集成电路上制造一个或多个金属化水平的工艺和制造工具架构
公开(公告)号：US6143126A
公开(公告)日：2000-11-07
申请号：US076695
申请日：1998-05-12
申请人： E. Henry Stevens
发明人： E. Henry Stevens
IPC分类号： C12N15/31 , H01L21/3213 , H01L21/768 , C23C16/00 , C23F1/02
CPC分类号： H01L21/76838 , H01L21/32134 , H01L21/76801 , Y10S414/135
摘要： A manufacturing tool configuration for applying one or more levels of interconnect metallization to a generally planar dielectric surface of a workpiece with a minimal number of workpiece transfer operations between the tool sets is disclosed. The tool configuration comprises a film deposition tool set, a pattern processing tool set, a wet processing tool set, and a dielectric processing tool set.
摘要翻译：公开了一种用于将一个或多个级别的互连金属化应用于工件的大致平面的电介质表面的制造工具配置，其中在工具组之间具有最少数量的工件传送操作。工具配置包括成膜工具组，图案处理工具组，湿加工工具组和介质处理工具组。

10. 发明授权

US5741721A Method of forming capacitors and interconnect lines 失效
标题翻译：形成电容器和互连线的方法
公开(公告)号：US5741721A
公开(公告)日：1998-04-21
申请号：US630061
申请日：1996-04-12
申请人： E. Henry Stevens
发明人： E. Henry Stevens
IPC分类号： H01L21/02 , H01L21/768 , H01L21/70
CPC分类号： H01L28/40 , H01L21/768
摘要： A multi-region material structure and process for forming capacitors and interconnect lines for use with integrated circuits provides (1) capacitor first or bottom electrodes comprising a transition-metal nitride; (2) a capacitor dielectric comprising a transition-metal oxide; (3) capacitor second or top electrodes comprising a transition-metal nitride, a metal or multiple conductive layers; (4) one or more levels of interconnect lines; (5) electrical insulation between adjacent regions as required by the application; and (6) bonding between two regions when such bonding is required to achieve strong region-to-region adhesion or to achieve a region-to-region interface that has a low density of electrical defects. The process for forming the material structures involves formation of the capacitor dielectric on the first electrode surfaces by conversion of a conductive transition-metal nitride to an insulating transition-metal oxide and formation of low-defect-density interfaces between capacitor second electrodes and the capacitor dielectric.
摘要翻译：用于形成用于集成电路的电容器和互连线的多区域材料结构和工艺提供了（1）包括过渡金属氮化物的电容器第一或第二电极; （2）包含过渡金属氧化物的电容器电介质; （3）包括过渡金属氮化物，金属或多个导电层的电容器第二或顶部电极; （4）一层或多层互连线; （5）应用要求的相邻区域之间的电绝缘; 和（6）在需要这种接合以实现强区域粘附或两个区域之间的接合，以实现具有低密度电缺陷的区域 - 区域界面。形成材料结构的方法包括通过将导电过渡金属氮化物转变为绝缘过渡金属氧化物并在电容器第二电极和电容器之间形成低缺陷密度界面，在第一电极表面上形成电容器电介质电介质。

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