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1. 发明申请

US20120080733A1 PHOTODETECTOR ISOLATION IN IMAGE SENSORS 有权
标题翻译：图像传感器中的光电隔离
公开(公告)号：US20120080733A1
公开(公告)日：2012-04-05
申请号：US12966224
申请日：2010-12-13
申请人： Hung Q. Doan , Eric G. Stevens , Robert M. Guidash
发明人： Hung Q. Doan , Eric G. Stevens , Robert M. Guidash
IPC分类号： H01L27/146
CPC分类号： H01L27/1463 , H01L27/14643
摘要： Shallow trench isolation regions are disposed in an n-type silicon semiconductor layer laterally adjacent to a collection region of a photodetector and laterally adjacent to a charge-to-voltage conversion region. The shallow trench isolation regions each include a trench disposed in the silicon semiconductor layer and a first dielectric structure disposed along an interior bottom and sidewalls of each trench. A second dielectric structure is disposed over the pinning layer. The dielectric structures include a silicon nitride layer disposed over an oxide layer. An n-type isolation layer is disposed along only a portion of the exterior bottom of the trench and the exterior sidewall of the trench immediately adjacent to the photodetector. The n-type isolation layer is not disposed along the remaining portion of the bottom or the opposing exterior sidewall of the trench.
摘要翻译：浅沟槽隔离区设置在与光电检测器的收集区域相邻并且横向邻近电荷 - 电压转换区域的n型硅半导体层中。浅沟槽隔离区域各自包括设置在硅半导体层中的沟槽和沿着每个沟槽的内部底部和侧壁设置的第一介电结构。第二电介质结构设置在钉扎层之上。电介质结构包括设置在氧化物层上的氮化硅层。 n型隔离层仅沿着沟槽的外部底部的一部分和紧邻光电检测器的沟槽的外侧壁设置。 n型隔离层不沿着沟槽的底部或相对的外侧壁的剩余部分设置。

2. 发明申请

US20100188545A1 PMOS PIXEL STRUCTURE WITH LOW CROSS TALK FOR ACTIVE PIXEL IMAGE SENSORS 审中-公开
标题翻译：用于主动像素图像传感器的具有低交叉点的PMOS像素结构
公开(公告)号：US20100188545A1
公开(公告)日：2010-07-29
申请号：US12752279
申请日：2010-04-01
申请人： Eric G. Stevens , Hirofumi Komori
发明人： Eric G. Stevens , Hirofumi Komori
IPC分类号： H04N5/335 , H01L27/146 , H01L31/18 , H01L27/10
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14643 , H01L27/14656
摘要： An image sensor with an image area having a plurality of pixels each having a photodetector of a first conductivity type, the image sensor includes a substrate of the first conductivity type; a first layer of the second conductivity type between the substrate and the photodetectors, spanning the image area and biased at predetermined potential with respect to the substrate for driving excess carriers into the substrate to reduce cross talk; one or more adjacent active electronic components disposed in the first layer within each pixel; and electronic circuitry disposed in the substrate outside of the image area.
摘要翻译：一种图像传感器，具有具有多个像素的图像区域，每个像素具有第一导电类型的光电检测器，所述图像传感器包括第一导电类型的基板; 在衬底和光电检测器之间的第二导电类型的第一层跨越图像区域并相对于衬底偏置在预定电位，用于将过量的载流子驱动到衬底中以减少串扰; 设置在每个像素内的第一层中的一个或多个相邻的有源电子部件; 以及设置在图像区域外的基板中的电子电路。

3. 发明申请

US20100140668A1 SHALLOW TRENCH ISOLATION REGIONS IN IMAGE SENSORS 审中-公开
标题翻译：图像传感器中的浅层分离区域
公开(公告)号：US20100140668A1
公开(公告)日：2010-06-10
申请号：US12616193
申请日：2009-11-11
申请人： Eric G. Stevens
发明人： Eric G. Stevens
IPC分类号： H01L29/762 , H01L31/00
CPC分类号： H01L27/1463 , H01L27/14689
摘要： An image sensor includes an imaging area that includes a plurality of pixels, with each pixel including a photosensitive charge storage region formed in a substrate. A passivation implantation region contiguously surrounds the side wall and bottom surfaces of each trench in the one or more trench isolation regions. A portion of each passivation implantation region is laterally adjacent to a respective charge storage region and resides only in an isolation gap disposed between the respective charge storage region and a respective trench isolation region and does not substantially reside under the charge storage region. Each passivation implantation region is formed by implanting one or more dopants at a low energy into the side wall and bottom surfaces of each trench after annealing the image sensor and prior to filling the trenches with an insulating material.
摘要翻译：图像传感器包括包括多个像素的成像区域，每个像素包括形成在基板中的光敏电荷存储区域。钝化注入区域连续地围绕一个或多个沟槽隔离区域中的每个沟槽的侧壁和底表面。每个钝化注入区域的一部分横向相邻于相应的电荷存储区域，并且仅驻留在设置在相应的电荷存储区域和相应沟槽隔离区域之间的隔离间隙中，并且基本上不存在于电荷存储区域下方。每个钝化注入区域通过在退火图像传感器之后和在用绝缘材料填充沟槽之前将低能量的一种或多种掺杂剂注入每个沟槽的侧壁和底表面中来形成。

4. 发明授权

US07728277B2 PMOS pixel structure with low cross talk for active pixel image sensors 有权
标题翻译：有源像素图像传感器的低串扰的PMOS像素结构
公开(公告)号：US07728277B2
公开(公告)日：2010-06-01
申请号：US11455985
申请日：2006-06-20
申请人： Eric G. Stevens , Hirofumi Komori
发明人： Eric G. Stevens , Hirofumi Komori
IPC分类号： H01L31/00
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14643 , H01L27/14656
摘要： An image sensor with an image area having a plurality of pixels with each pixel having a photodetector and a substrate of a first conductivity type and a first layer of a second conductivity type formed between the substrate and the photodetectors. The first layer spans the image area and is biased at predetermined potential with respect to the substrate for driving excess carriers into the substrate to reduce cross talk. One or more adjacent active electronic components can be disposed in the first layer within each pixel and electronic circuitry can be disposed in the substrate outside of the image area.
摘要翻译：具有图像区域的图像区域具有多个像素，每个像素具有光电检测器和形成在基板和光电检测器之间的第一导电类型的基板和第二导电类型的第一层。第一层跨越图像区域并相对于衬底偏置在预定电位，用于将过量载流子驱动到衬底中以减少串扰。一个或多个相邻的有源电子部件可以设置在每个像素内的第一层中，并且电子电路可以设置在图像区域外的基板中。

5. 发明授权

US07391001B2 Thin lightshield process for solid-state image sensors 有权
标题翻译：固态图像传感器的薄型遮光罩工艺
公开(公告)号：US07391001B2
公开(公告)日：2008-06-24
申请号：US11068358
申请日：2005-02-28
申请人： David N. Nichols , Eric G. Stevens , Stephen L. Kosman
发明人： David N. Nichols , Eric G. Stevens , Stephen L. Kosman
IPC分类号： H01L21/00
CPC分类号： H01L27/14623 , H01L27/14636 , H01L27/14685
摘要： An image sensor includes a substrate having photosensitive areas; an insulator spanning the substrate; and a first and second layer of a multi-layer metallization structure, wherein the first layer forms light shield regions over selected portions of the photosensitive area as well forming circuit interconnections and barrier regions to prevent spiking into the substrate or gates at contacts in the non-imaging area; and the second layer spanning the interconnections and barrier regions of the first layer only over the non-imaging areas and the second layer overlays edges of the first layer.
摘要翻译：图像传感器包括具有感光区域的基板; 跨越衬底的绝缘体; 以及多层金属化结构的第一和第二层，其中所述第一层在所述感光区域的选定部分上形成光屏蔽区域，并形成电路互连和阻挡区域，以防止尖端进入衬底或在非接触的接触处的栅极成像面积并且第二层仅在非成像区域上跨越第一层的互连和阻挡区域，并且第二层覆盖第一层的边缘。

6. 发明授权

US06794219B1 Method for creating a lateral overflow drain, anti-blooming structure in a charge coupled device 有权
标题翻译：用于在电荷耦合器件中产生横向溢出漏极，抗起霜结构的方法
公开(公告)号：US06794219B1
公开(公告)日：2004-09-21
申请号：US10628184
申请日：2003-07-28
申请人： Eric G. Stevens , Hung Q. Doan
发明人： Eric G. Stevens , Hung Q. Doan
IPC分类号： H01L2100
CPC分类号： H01L21/2652 , H01L21/76221 , H01L27/14674 , H01L27/14887
摘要： A method for creating a lateral overflow drain, anti-blooming structure in a charge-coupled device, the method includes the steps of providing a substrate of a first conductivity type; providing a layer of silicon dioxide on the substrate; providing a layer of silicon nitride on the silicon dioxide layer; providing a first masking layer on the silicon nitride layer and having an opening in the first masking layer of a dimension which substantially equals a dimension of a subsequently implanted channel stop of the first conductivity type; etching away the exposed silicon nitride within the opening in the first masking layer; implanting ions of the first conductivity type through the first masking layer and into the substrate for creating the channel stop and removing the first masking layer; growing the silicon dioxide layer so that the channel stop is spanned by a thickest field silicon dioxide layer in the etched away portion; patterning a second masking layer having an opening adjacent the channel stop with a dimension substantially equal to a dimension of a subsequently implanted lateral overflow drain of a second conductivity type; etching away the exposed silicon nitride within the opening in the second masking layer; implanting the second conductivity type for forming the lateral overflow drain and removing any remaining masking layer; and growing the silicon dioxide layer so that a thicker silicon dioxide forms spanning the lateral overflow drain and the thickest silicon dioxide layer forms spanning the channel stop.
摘要翻译：一种用于在电荷耦合器件中产生横向溢出漏极，抗起霜结构的方法，所述方法包括以下步骤：提供第一导电类型的衬底; 在衬底上提供二氧化硅层; 在二氧化硅层上提供一层氮化硅; 在所述氮化硅层上提供第一掩模层，并且在所述第一掩模层中具有基本上等于所述第一导电类型的随后注入的通道阻挡件的尺寸的尺寸的开口; 蚀刻掉第一掩模层内的开口内的暴露的氮化硅; 通过所述第一掩蔽层注入所述第一导电类型的离子并进入所述衬底中，以产生所述通道停止并去除所述第一掩蔽层; 生长二氧化硅层，使得通道停止被蚀刻掉的部分中最厚的场二氧化硅层跨越; 图案化具有与所述通道停止件相邻的开口的第二掩蔽层，其尺寸基本上等于第二导电类型的随后注入的横向溢流漏极的尺寸; 蚀刻掉在第二掩模层中的开口内的暴露的氮化硅; 植入用于形成横向溢流漏斗的第二导电类型并去除任何剩余的掩模层; 并且生长二氧化硅层，使得跨越横向溢流漏斗形成更厚的二氧化硅，并且跨越通道停止的最厚的二氧化硅层形成。

7. 发明授权

US06649442B2 Fast line dump structure for solid state image sensor 有权
公开(公告)号：US06649442B2
公开(公告)日：2003-11-18
申请号：US10293672
申请日：2002-11-13
申请人： Eric G. Stevens
发明人： Eric G. Stevens
IPC分类号： H01L2100
CPC分类号： H01L29/76816 , H01L27/14806 , H01L27/14887
摘要： The present invention is a structure for a fast-dump gate (FDG) and a fast-dump drain (FDD) for a charge coupled device. It is envisioned that the charge coupled device be a horizontal readout register of a solid-state image sensor. This structure uses a third layer of polysilicon (or other suitable gate material) to form the fast-dump gate which is in addition to the other two layers of gate material used to form the gates in the horizontal readout register. This allows the channel region under the fast-dump gate (FDG) to form without the use of highly-doped channel stop regions thereby eliminating any potential wells or barriers that may result in transfer inefficiency often time found with other structures.

8. 发明授权

US06583061B2 Method for creating an anti-blooming structure in a charge coupled device 失效
标题翻译：在电荷耦合器件中产生抗起霜结构的方法
公开(公告)号：US06583061B2
公开(公告)日：2003-06-24
申请号：US09944548
申请日：2001-08-31
申请人： Eric G. Stevens
发明人： Eric G. Stevens
IPC分类号： H01L21311
CPC分类号： H01L27/14887
摘要： A method of creating a lateral overflow drain, anti-blooming structure in a charge coupled device, the method includes steps for self-aligning a peripheral edge of the lateral overflow drain to an edge of the thick field oxide, whereby the overflow drain is substantially covered by the field oxide.
摘要翻译：一种在电荷耦合器件中产生横向溢出漏极，抗起霜结构的方法，所述方法包括用于将横向溢出漏极的外围边缘自对准到厚场氧化物的边缘的步骤，由此溢出漏极基本上被氧化物覆盖。

9. 发明授权

US5904493A Active pixel sensor integrated with a pinned photodiode 失效
公开(公告)号：US5904493A
公开(公告)日：1999-05-18
申请号：US771560
申请日：1996-12-20
申请人： Paul P. Lee , Robert M. Guidash , Teh-Hsuang Lee , Eric G. Stevens
发明人： Paul P. Lee , Robert M. Guidash , Teh-Hsuang Lee , Eric G. Stevens
IPC分类号： H01L27/146 , H01L27/148 , H01L31/101 , H01L31/105
CPC分类号： H01L27/14689 , H01L27/14609 , H01L27/14643 , H01L27/14645 , H01L27/14831
摘要： The optimization of two technologies (CMOS and CCD) wherein a pinned photodiode is integrated into the image sensing element of an active pixel sensor. Pinned photodiodes are fabricated with CCD process steps into the active pixel architecture. Charge integrated within the active pixel pinned photodiode is transferred into the charge sensing node by a transfer gate. The floating diffusion is coupled CMOS circuitry that can provide the addressing capabilities of individual pixels. Alternatively, a buried channel photocapacitor can be used in place of the pinned photodiode.

10. 发明授权

US5702971A Self-aligned LOD antiblooming structure for solid-state imagers 失效
标题翻译：固态成像器的自对准LOD防护结构
公开(公告)号：US5702971A
公开(公告)日：1997-12-30
申请号：US414545
申请日：1995-03-31
申请人： Eric G. Stevens
发明人： Eric G. Stevens
IPC分类号： H01L27/148 , H01L31/18 , H01L21/265 , H01L21/70 , H01L27/00
CPC分类号： H01L27/14887
摘要： A self aligned, lateral-overflow drain antiblooming structure that is insensitive to drain bias voltages and therefore has improved insensitivity to process variations. The length of the antiblooming barrier regions are easily adjusted and determined by photolithography. The self aligned, lateral-overflow drain (LOD) antiblooming structure results in a design that saves space, and hence, improves overall sensor performance. In this structure, an antiblooming potential barrier is provided that is smaller (in volts) than the barriers that separate the pixels from one another so that excess charge will flow preferentially into the LOD as opposed to the adjacent pixels.
摘要翻译：自对准的横向溢流漏极防护结构对漏极偏置电压不敏感，因此对工艺变化的不敏感性提高。通过光刻可以容易地调节和确定防起泡屏障区域的长度。自对准的横向溢流排水（LOD）防爆结构导致节省空间的设计，从而提高整体传感器性能。在这种结构中，提供了比将像素彼此分开的屏障更小（伏特）的抗电势势垒，使得与相邻像素相反，过量电荷优先流入LOD。

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