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1. 发明申请

US20220302317A1 MEMORY DEVICES INCLUDING VOID SPACES BETWEEN TRANSISTOR FEATURES, AND RELATED SEMICONDUCTOR DEVICES AND ELECTRONIC SYSTEMS 有权
公开(公告)号：US20220302317A1
公开(公告)日：2022-09-22
申请号：US17301793
申请日：2021-04-14
申请人： Kamal M. Karda , Ramanathan Gandhi , Hong Li , Haitao Liu , Durai Vishak Nirmal Ramaswamy , Sanh D. Tang , Scott E. Sills
发明人： Kamal M. Karda , Ramanathan Gandhi , Hong Li , Haitao Liu , Durai Vishak Nirmal Ramaswamy , Sanh D. Tang , Scott E. Sills
IPC分类号： H01L29/786 , H01L29/423 , H01L29/10
摘要： A device comprises a vertical transistor. The vertical transistor comprises a semiconductive pillar, at least one gate electrode, a gate dielectric material, and void spaces. The semiconductive pillar comprises a source region, a drain region, and a channel region extending vertically between the source region and the drain region, the channel region comprising a semiconductive material having a band gap greater than 1.65 electronvolts. The at least one gate electrode laterally neighbors the semiconductive pillar. The gate dielectric material is laterally between the semiconductive pillar and the at least one gate electrode. The void spaces are vertically adjacent the gate dielectric material and laterally intervening between the at least one gate electrode and each of the source region and the drain region of the semiconductive pillar. Related electronic systems and methods are also disclosed.

2. 发明申请

US20210066301A1 MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND A COMMON PLATE 有权
公开(公告)号：US20210066301A1
公开(公告)日：2021-03-04
申请号：US17003037
申请日：2020-08-26
申请人： Kamal M. Karda , Karthik Sarpatwari , Haitao Liu , Durai Vishak Nirmal Ramaswamy
发明人： Kamal M. Karda , Karthik Sarpatwari , Haitao Liu , Durai Vishak Nirmal Ramaswamy
IPC分类号： H01L27/108 , G11C11/401
摘要： Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a substrate, a conductive plate located over the substrate to couple a ground connection, a data line located between the substrate and the conductive plate, a memory cell, and a conductive line. The memory cell includes a first transistor and a second transistor. The first transistor includes a first region electrically coupled between the data line and the conductive plate, and a charge storage structure electrically separated from the first region. The second transistor includes a second region electrically coupled to the charge storage structure and the data line. The conductive line is electrically separated from the first and second regions and spans across part of the first region of the first transistor and part of the second region of the second transistor and forming a gate of the first and second transistors.

3. 发明授权

US08717819B2 NAND flash memory programming 有权
标题翻译： NAND闪存编程
公开(公告)号：US08717819B2
公开(公告)日：2014-05-06
申请号：US13549743
申请日：2012-07-16
申请人： Seiichi Aritome , Haitao Liu , Di Li
发明人： Seiichi Aritome , Haitao Liu , Di Li
IPC分类号： G11C11/34
CPC分类号： G11C16/12
摘要： A programming method and memory structure for preventing punch-through in a short channel source-side select gate structure includes adjusting voltages on the selected and unselected bitlines, and the program, pass, and select gate voltages.
摘要翻译：用于防止短沟道源侧选择栅极结构中的穿通的编程方法和存储器结构包括调整所选择和未选择的位线上的电压以及编程，通过和选择栅极电压。

4. 发明申请

US20130026471A1 Circuit Structures, Memory Circuitry, And Methods 有权
标题翻译：电路结构，存储器电路和方法
公开(公告)号：US20130026471A1
公开(公告)日：2013-01-31
申请号：US13191293
申请日：2011-07-26
申请人： John K. Zahurak , Sanh D. Tang , Lars P. Heineck , Martin C. Roberts , Wolfgang Mueller , Haitao Liu
发明人： John K. Zahurak , Sanh D. Tang , Lars P. Heineck , Martin C. Roberts , Wolfgang Mueller , Haitao Liu
IPC分类号： H01L29/786 , H01L27/108 , H01L21/20 , H01L27/08
CPC分类号： H01L27/1203 , H01L21/84 , H01L23/528 , H01L27/092 , H01L27/10802 , H01L27/10823 , H01L27/10876 , H01L27/10894 , H01L27/10897 , H01L27/2454 , H01L29/36 , H01L29/66969 , H01L29/78 , H01L29/7827 , H01L29/7841 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/14 , H01L45/145 , H01L45/146 , H01L45/16 , H01L2924/0002 , H01L2924/00
摘要： A circuit structure includes a substrate having an array region and a peripheral region. The substrate in the array and peripheral regions includes insulator material over first semiconductor material, conductive material over the insulator material, and second semiconductor material over the conductive material. The array region includes vertical circuit devices which include the second semiconductor material. The peripheral region includes horizontal circuit devices which include the second semiconductor material. The horizontal circuit devices in the peripheral region individually have a floating body which includes the second semiconductor material. The conductive material in the peripheral region is under and electrically coupled to the second semiconductor material of the floating bodies. Conductive straps in the array region are under the vertical circuit devices. The conductive straps include the conductive material and individually are electrically coupled to a plurality of the vertical circuit devices in the array region. Other implementations are disclosed.
摘要翻译：电路结构包括具有阵列区域和周边区域的基板。阵列和外围区域中的衬底包括在第一半导体材料上的绝缘体材料，绝缘体材料上方的导电材料和导电材料上的第二半导体材料。阵列区域包括包括第二半导体材料的垂直电路器件。外围区域包括包括第二半导体材料的水平电路器件。外围区域中的水平电路器件分别具有包括第二半导体材料的浮体。外围区域中的导电材料在浮体的第二半导体材料的下面并电耦合。阵列区域中的导电带在垂直电路装置下方。导电带包括导电材料，并且单独地电耦合到阵列区域中的多个垂直电路器件。公开了其他实现。

5. 发明申请

US20120275227A1 PHOTOSENSITIVE COMPOSITION AND COMPOUND FOR USE IN THE PHOTOSENESITIVE COMPOSITION 有权
标题翻译：光敏组合物和用于光敏组合物的化合物
公开(公告)号：US20120275227A1
公开(公告)日：2012-11-01
申请号：US13549743
申请日：2012-07-16
申请人： Seiichi ARITOME , Haitao Liu , Di Li
发明人： Seiichi ARITOME , Haitao Liu , Di Li
IPC分类号： G11C16/04
CPC分类号： G11C16/12
摘要： A programming method and memory structure for preventing punch-through in a short channel source-side select gate structure includes adjusting voltages on the selected and unselected bitlines, and the program, pass, and select gate voltages.
摘要翻译：用于防止短沟道源侧选择栅极结构中的穿通的编程方法和存储器结构包括调整所选择和未选择的位线上的电压以及编程，通过和选择栅极电压。

6. 发明申请

US20110134697A1 DYNAMIC PASS VOLTAGE FOR SENSE OPERATION IN A MEMORY DEVICE 有权
标题翻译：用于在存储器件中进行感测操作的动态输入电压
公开(公告)号：US20110134697A1
公开(公告)日：2011-06-09
申请号：US12630332
申请日：2009-12-03
申请人： Yijie Zhao , Akira Goda , Jian Li , Haitao Liu
发明人： Yijie Zhao , Akira Goda , Jian Li , Haitao Liu
IPC分类号： G11C16/26 , G11C16/04 , G11C16/34
CPC分类号： G11C11/5642 , G11C16/26 , G11C16/3418
摘要： Methods for sensing and memory devices are disclosed. One such method for sensing uses a dynamic pass voltage on at least one adjacent memory cell that is adjacent to a selected memory cell for programming. If the adjacent memory cell is not programmed, the pass voltage is reduced on the adjacent memory cell. The adjacent memory cell can be on the drain side, the source side, or both drain and source sides of the selected memory cell.
摘要翻译：公开了用于感测和存储器件的方法。用于感测的一种这样的方法在与选定的存储器单元相邻的至少一个相邻存储器单元上使用动态通过电压用于编程。如果相邻存储单元未编程，则相邻存储单元上的通过电压降低。相邻的存储单元可以在所选存储单元的漏极侧，源极侧或漏极和源极侧。

7. 发明申请

US20100228866A1 METHOD FOR SYNCHRONIZING DATA, SYSTEM, AND APPARATUS THEREOF 审中-公开
标题翻译：用于同步数据，系统和装置的方法
公开(公告)号：US20100228866A1
公开(公告)日：2010-09-09
申请号：US12783271
申请日：2010-05-19
申请人： Kepeng Li , Rui Wang , Haitao Liu , Xiaoqian Chai
发明人： Kepeng Li , Rui Wang , Haitao Liu , Xiaoqian Chai
IPC分类号： G06F15/16
CPC分类号： H04L67/1095 , G06F16/275
摘要： A method for synchronizing data is disclosed: a synchronization initiator sends a synchronization session request to a synchronization recipient to create a synchronization session connection with the synchronization recipient; and a synchronization process is started in the synchronization session, and the synchronization initiator synchronizes data with the synchronization recipient through the synchronization process. A synchronization process is started in the synchronization session, and the synchronization initiator synchronizes data with the synchronization recipient through the synchronization process, thus synchronizing the data between both parties flexibly.
摘要翻译：公开了一种用于同步数据的方法：同步启动器向同步接收者发送同步会话请求以与同步接收者建立同步会话连接; 并且在同步会话中开始同步处理，并且同步发起者通过同步处理与同步接收者同步数据。在同步会话中启动同步过程，并且同步启动器通过同步过程与同步接收者同步数据，从而灵活地在双方之间同步数据。

8. 发明申请

US20100205266A1 APPEARANCE PACKAGE MANAGEMENT METHOD, SYSTEM AND DEVICE 有权
标题翻译：外观包装管理方法，系统和设备
公开(公告)号：US20100205266A1
公开(公告)日：2010-08-12
申请号：US12762764
申请日：2010-04-19
申请人： Rui Wang , Haitao Liu , Hui Zhao , Yue Song
发明人： Rui Wang , Haitao Liu , Hui Zhao , Yue Song
IPC分类号： G06F15/16
CPC分类号： H04L67/125 , H04L67/34 , H04M1/72525 , H04W4/50
摘要： An appearance package management method is provided, which includes the following steps. An appearance package is received, and a unique appearance package identifier (ID) of the appearance package is obtained. A corresponding relation between the appearance package and the appearance package ID is stored. An operation message of an appearance package is received, and an appearance package corresponding to an appearance package ID obtained from the operation message is operated according to the appearance package ID obtained from the operation message and the stored corresponding relation between the appearance package and the appearance package ID. An appearance package management system and an appearance package management device are also provided. Through the method, the unique ID for the appearance package is established between the server and the terminal, so that the terminal can identify the object of the operation instruction delivered by the server and manage the corresponding appearance package.
摘要翻译：提供外观包管理方法，其包括以下步骤。接收外观包，并且获得外观包的唯一外观包标识符（ID）。存储外观包和外观包ID之间的对应关系。接收外观包的操作消息，并且根据从操作消息获得的外观包ID和外观包与外观之间存储的对应关系来操作与从操作消息获得的外观包ID相对应的外观包包ID。还提供外观包管理系统和外观包管理装置。通过该方法，在服务器和终端之间建立外观包的唯一ID，使得终端可以识别服务器提供的操作指令的对象，并管理相应的外观包。

9. 发明申请

US20100199291A1 METHOD, SYSTEM AND APPARATUS FOR TRANSMITTING REMOTE PROCEDURE CALL COMMANDS 有权
标题翻译：用于发送远程程序呼叫命令的方法，系统和设备
公开(公告)号：US20100199291A1
公开(公告)日：2010-08-05
申请号：US12758497
申请日：2010-04-12
申请人： Rui Wang , Haitao Liu
发明人： Rui Wang , Haitao Liu
IPC分类号： G06F13/00
CPC分类号： H04L41/0233 , G06F9/547 , H04L41/0206 , H04L67/125 , H04L67/34 , H04L67/40
摘要： A method, system and apparatus for transmitting remote procedure call (RPC) commands are disclosed so that all terminals can be managed by using a protocol or specification in a converged network. The method includes: setting RPC commands in device management (DM) specification information; and transmitting the DM specification information. The system includes: a first device, adapted to: set RPC commands in the DM specification information, and send the DM specification information to a second device; and the second device, adapted to receive the DM specification information from the first device. The apparatus includes a terminal device and a DM server.
摘要翻译：公开了用于发送远程过程调用（RPC）命令的方法，系统和装置，以便可以通过在融合网络中使用协议或规范来管理所有终端。该方法包括：在设备管理（DM）规范信息中设置RPC命令; 并发送DM规范信息。该系统包括：第一设备，适于：在DM规范信息中设置RPC命令，并将DM规范信息发送到第二设备; 以及第二设备，适于从第一设备接收DM规范信息。该装置包括终端设备和DM服务器。

10. 发明申请

US20100074021A1 NAND FLASH MEMORY PROGRAMMING 有权
标题翻译： NAND闪存编程
公开(公告)号：US20100074021A1
公开(公告)日：2010-03-25
申请号：US12627448
申请日：2009-11-30
申请人： Seiichi Aritome , Haitao Liu , Di Li
发明人： Seiichi Aritome , Haitao Liu , Di Li
IPC分类号： G11C16/12 , G11C16/04
CPC分类号： G11C16/12
摘要： A programming method and memory structure for preventing punch-through in a short channel source-side select gate structure includes adjusting voltages on the selected and unselected bitlines, and the program, pass, and select gate voltages.
摘要翻译：用于防止短沟道源侧选择栅极结构中的穿通的编程方法和存储器结构包括调整所选择和未选择的位线上的电压以及编程，通过和选择栅极电压。

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