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    • 3. 发明授权
    • Authentication system, consolidation apparatus and program
    • 验证系统,整合设备和程序
    • US07913091B2
    • 2011-03-22
    • US11754642
    • 2007-05-29
    • Minoru NishizawaHidehisa TakamizawaYoshihiro FujiiKoji Okada
    • Minoru NishizawaHidehisa TakamizawaYoshihiro FujiiKoji Okada
    • G06F21/00H04L9/32H04L29/06G06F7/04G06K9/00
    • H04L9/3231H04L63/0861
    • Upon receiving server side entity information and a principal confirmation profile request data from a server side entity device, a consolidation apparatus transmits an entity information transmission request to each of a plurality of client side entity devices and receives client side entity information from each of the client side entity devices. Then, it determines the principal confirmation profile ID in each piece of client side entity information and the principal confirmation profile ID in the server side entity information according to the principal confirmation profile ID request information having the highest priority in the principal confirmation profile request data and prepares a routing table information associating the processing capability IDs and the entity IDs corresponding to the determined principal confirmation profile ID, which routing table information is then stored in a memory.
    • 在从服务器侧实体设备接收到服务器侧实体信息和主确认简档请求数据时,合并装置向多个客户端实体设备中的每一个发送实体信息发送请求,并从客户端中的每一个接收客户端实体信息 侧实体设备。 然后,根据主确认简档请求数据中具有最高优先级的主确认简档ID请求信息,确定服务器侧实体信息中的每个客户端实体信息和主确认简档ID中的主确认简档ID,以及 准备将处理能力ID和与所确定的主确认简档ID相对应的实体ID相关联的路由表信息,然后将哪个路由表信息存储在存储器中。
    • 5. 发明申请
    • SYSTEM AND DEVICE FOR AUTHENTICATION
    • 用于认证的系统和设备
    • US20080172729A1
    • 2008-07-17
    • US11840724
    • 2007-08-17
    • Hidehisa TAKAMIZAWAAsahiko YAMADATomoaki MORIJIRIKoji OKADATatsuro IKEDAMinoru NISHIZAWAYoshihiro FUJII
    • Hidehisa TAKAMIZAWAAsahiko YAMADATomoaki MORIJIRIKoji OKADATatsuro IKEDAMinoru NISHIZAWAYoshihiro FUJII
    • H04L9/32
    • H04L63/0861
    • An authentication device receives each authentication context including an output information block, an input information block, and an authenticator block. The output information block includes a process result and process result identification information. The input information block includes a process result and process result identification information. The authentication device verifies each authenticator block. The authentication device searches for the output information block having the same value of process result identification information as the value of process result identification information in the input information block from other authentication contexts based on process result identification information in the input information block included in each authentication context. The authentication device verifies whether or not the process result in the input information block is equal to the process result in the searched output information block, and authenticates that all the authentication contexts have validity when all the verification results are valid.
    • 认证装置接收包括输出信息块,输入信息块和认证器块的每个认证上下文。 输出信息块包括处理结果和处理结果识别信息。 输入信息块包括处理结果和处理结果标识信息。 认证设备验证每个认证器块。 认证装置根据包含在每个认证中的输入信息块中的处理结果识别信息,从其他认证上下文中搜索具有与处理结果识别信息相同的处理结果识别信息值的输出信息块 上下文 验证装置验证输入信息块中的处理结果是否等于搜索到的输出信息块中的处理结果,并且当所有验证结果有效时,认证所有认证上下文都具有有效性。
    • 6. 发明授权
    • Simulation apparatus, simulation method and recording medium for recording simulation program
    • 仿真设备,仿真方法和记录介质,用于记录仿真程序
    • US08744831B2
    • 2014-06-03
    • US13156449
    • 2011-06-09
    • Shogo IshiiHidehisa Takamizawa
    • Shogo IshiiHidehisa Takamizawa
    • G06F17/50
    • G06F9/4881G06F9/45504G06F9/4812
    • According to one embodiment, a simulation apparatus includes a hardware model execution unit that executes a hardware model, a software model execution unit that executes a software model, a simulation time management unit that sets a first simulation time indicating a total elapsed time of a simulation time of the hardware model, ahead by the simulation time of which the HW model notified, and sets the second simulation time indicating a total elapsed time of a simulation time of the software model, ahead by the simulation time of which the SW model notified, and a scheduler that compares the first simulation time with the second simulation time, causes the SW model or the HW model to be executed based on the comparison result, and causes only the hardware model to be executed instead of execution of an idle loop when the SW model awaits an interrupt from the HW model.
    • 根据一个实施例,模拟装置包括执行硬件模型的硬件模型执行单元,执行软件模型的软件模型执行单元,设置指示模拟的总经过时间的第一模拟时间的模拟时间管理单元 硬件模型的时间,提前通过HW模型通知的模拟时间,并设置指示软件模型的模拟时间的总经过时间的第二模拟时间,提前SW模型通知的模拟时间, 以及将第一模拟时间与第二模拟时间进行比较的调度器,使得基于比较结果执行SW模型或HW模型,并且仅当执行硬件模型而不是执行空闲循环时 SW模型等待来自HW模型的中断。
    • 10. 发明申请
    • SIMULATION APPARATUS, SIMULATION METHOD AND RECORDING MEDIUM FOR RECORDING SIMULATION PROGRAM
    • 用于记录仿真程序的仿真设备,模拟方法和记录介质
    • US20110307236A1
    • 2011-12-15
    • US13156449
    • 2011-06-09
    • Shogo IshiiHidehisa Takamizawa
    • Shogo IshiiHidehisa Takamizawa
    • G06F9/44
    • G06F9/4881G06F9/45504G06F9/4812
    • According to one embodiment, a simulation apparatus includes a hardware model execution unit that executes a hardware model, a software model execution unit that executes a software model, a simulation time management unit that sets a first simulation time indicating a total elapsed time of a simulation time of the hardware model, ahead by the simulation time of which the HW model notified, and sets the second simulation time indicating a total elapsed time of a simulation time of the software model, ahead by the simulation time of which the SW model notified, and a scheduler that compares the first simulation time with the second simulation time, causes the SW model or the HW model to be executed based on the comparison result, and causes only the hardware model to be executed instead of execution of an idle loop when the SW model awaits an interrupt from the HW model.
    • 根据一个实施例,模拟装置包括执行硬件模型的硬件模型执行单元,执行软件模型的软件模型执行单元,设置指示模拟的总经过时间的第一模拟时间的模拟时间管理单元 硬件模型的时间,提前通过HW模型通知的模拟时间,并设置指示软件模型的模拟时间的总经过时间的第二模拟时间,提前SW模型通知的模拟时间, 以及将第一模拟时间与第二模拟时间进行比较的调度器,使得基于比较结果执行SW模型或HW模型,并且仅当执行硬件模型而不是执行空闲循环时 SW模型等待来自HW模型的中断。