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1. 发明授权

US08372314B2 Indium tin oxide target, method for manufacturing the same, transparent conductive film of indium tin oxide, and method for manufacturing transparent conductive film of indium tin oxide 有权
标题翻译：铟锡氧化物靶，其制造方法，氧化铟锡透明导电膜，以及氧化铟锡透明导电膜的制造方法
公开(公告)号：US08372314B2
公开(公告)日：2013-02-12
申请号：US12953969
申请日：2010-11-24
申请人： Bon kyung Koo , Han Ho Yoon , Ju Ok Park , Hyung Ryul Park , Hyun Su Kim , Sung Ryong Choi , Joong Ryeol Choi , Pung Keun Song , Joon-Hong Park
发明人： Bon kyung Koo , Han Ho Yoon , Ju Ok Park , Hyung Ryul Park , Hyun Su Kim , Sung Ryong Choi , Joong Ryeol Choi , Pung Keun Song , Joon-Hong Park
IPC分类号： H01B1/08
CPC分类号： C23C14/3414 , C04B35/457 , C04B2235/3224 , C04B2235/3286 , C04B2235/3293 , C04B2235/5436 , C04B2235/77 , C23C14/086
摘要： Disclosed are an indium Tin Oxide (ITO) target, a method for manufacturing the same, a transparent conductive film of ITO, and a method for manufacturing the transparent conductive film of ITO. The ITO target includes at least one oxide selected from the group consisting of Sm2O3 and Yb2O3, wherein an amount of the oxide is about 0.5 wt. % to about 10 wt. % based on the weight of the target.
摘要翻译：公开了一种氧化铟锡（ITO）靶，其制造方法，ITO的透明导电膜以及ITO的透明导电膜的制造方法。 ITO靶包括选自Sm 2 O 3和Yb 2 O 3中的至少一种氧化物，其中氧化物的量为约0.5重量％。％至约10wt。基于目标的重量％。

2. 发明授权

US07936024B2 Semiconductor devices having stacked structures 失效
标题翻译：具有堆叠结构的半导体器件
公开(公告)号：US07936024B2
公开(公告)日：2011-05-03
申请号：US12204420
申请日：2008-09-04
申请人： Hyun-Su Kim , Gil-Heyun Choi , Jong-Ho Yun , Sug-Woo Jung , Eun-Ji Jung
发明人： Hyun-Su Kim , Gil-Heyun Choi , Jong-Ho Yun , Sug-Woo Jung , Eun-Ji Jung
IPC分类号： H01L29/76
CPC分类号： H01L21/8221 , H01L21/28518 , H01L21/76829 , H01L21/76898 , H01L27/0688 , Y10S257/903
摘要： A method of forming a semiconductor device may include forming an interlayer insulating layer on a semiconductor substrate, and the interlayer insulating layer may have a contact hole therein exposing a portion of the semiconductor substrate. A single crystal semiconductor plug may be formed in the contact hole and on portions of the interlayer insulating layer adjacent the contact hole opposite the semiconductor substrate, and portions of the interlayer insulating layer opposite the semiconductor substrate may be free of the single crystal semiconductor plug. Portions of the single crystal semiconductor plug in the contact hole may be removed while maintaining portions of the single crystal semiconductor plug on portions of the interlayer insulating layer adjacent the contact hole as a single crystal semiconductor contact pattern. After removing portions of the single crystal semiconductor plug, a single crystal semiconductor layer may be formed on the interlayer insulating layer and on the single crystal semiconductor contact pattern. A second interlayer insulating layer may be formed on the single crystal semiconductor layer, and a common contact hole may be formed through the second interlayer insulating layer, through the single crystal semiconductor layer, and through the first interlayer insulating layer to expose a portion of semiconductor substrate. In addition, a conductive contact plug may be formed in the common contact hole in contact with the semiconductor substrate. Related devices are also discussed.
摘要翻译：形成半导体器件的方法可以包括在半导体衬底上形成层间绝缘层，并且层间绝缘层可以具有暴露半导体衬底的一部分的接触孔。可以在接触孔中和在与半导体衬底相对的接触孔附近的层间绝缘层的部分上形成单晶半导体插塞，并且与半导体衬底相对的部分层间绝缘层可以不含单晶半导体插头。可以去除接触孔中的单晶半导体插塞的部分，同时将单晶半导体插塞的部分保持在与接触孔相邻的层间绝缘层的部分上作为单晶半导体接触图案。在去除单晶半导体插头的部分之后，可以在层间绝缘层和单晶半导体接触图案上形成单晶半导体层。可以在单晶半导体层上形成第二层间绝缘层，并且可以通过单晶半导体层通过第二层间绝缘层形成公共接触孔，并且通过第一层间绝缘层暴露半导体的一部分基质。此外，可以在与半导体衬底接触的公共接触孔中形成导电接触插塞。还讨论了相关设备。

3. 发明申请

US20110068003A1 INDIUM TIN OXIDE TARGET, METHOD FOR MANUFACTURING THE SAME, TRANSPARENT CONDUCTIVE FILM OF INDIUM TIN OXIDE, AND METHOD FOR MANUFACTURING TRANSPARENT CONDUCTIVE FILM OF INDIUM TIN OXIDE 有权
标题翻译：氧化铟锡靶，其制造方法，氧化铟锡透明导电薄膜，以及制造氧化铟锡透明导电薄膜的方法
公开(公告)号：US20110068003A1
公开(公告)日：2011-03-24
申请号：US12953969
申请日：2010-11-24
申请人： Bon Kyung KOO , Han Ho Yoon , Ju Ok Park , Hyung Ryul Park , Hyun Su Kim , Sung Ryong Choi , Joong Ryeol Choi , Pung Keun Song , Joon-Hong Park
发明人： Bon Kyung KOO , Han Ho Yoon , Ju Ok Park , Hyung Ryul Park , Hyun Su Kim , Sung Ryong Choi , Joong Ryeol Choi , Pung Keun Song , Joon-Hong Park
IPC分类号： C23C14/14 , C04B35/50
CPC分类号： C23C14/3414 , C04B35/457 , C04B2235/3224 , C04B2235/3286 , C04B2235/3293 , C04B2235/5436 , C04B2235/77 , C23C14/086
摘要： Disclosed are an indium Tin Oxide (ITO) target, a method for manufacturing the same, a transparent conductive film of ITO, and a method for manufacturing the transparent conductive film of ITO. The ITO target includes at least one oxide selected from the group consisting of Sm2O3 and Yb2O3, wherein an amount of the oxide is about 0.5 wt. % to about 10 wt. % based on the weight of the target.
摘要翻译：公开了一种氧化铟锡（ITO）靶，其制造方法，ITO的透明导电膜以及ITO的透明导电膜的制造方法。 ITO靶包括选自Sm 2 O 3和Yb 2 O 3中的至少一种氧化物，其中氧化物的量为约0.5重量％。％至约10wt。基于目标的重量％。

4. 发明授权

US07662716B2 Method for forming silicide contacts 有权
标题翻译：形成硅化物接触的方法
公开(公告)号：US07662716B2
公开(公告)日：2010-02-16
申请号：US11355112
申请日：2006-02-14
申请人： Hyun-Su Kim , Kwang-Jin Moon , Sang-Woo Lee , Eun-Ok Lee , Ho-Ki Lee
发明人： Hyun-Su Kim , Kwang-Jin Moon , Sang-Woo Lee , Eun-Ok Lee , Ho-Ki Lee
IPC分类号： H01L21/28 , H01L21/44 , H01L21/4763
CPC分类号： H01L21/76855 , H01L21/28556 , H01L21/76843
摘要： Contacts having different characteristics may be created by forming a first silicide layer over a first device region of a substrate, and then forming a second silicide layer over a second device region while simultaneously further forming the first silicide layer. A first contact hole may be formed in a dielectric layer over a first device region of a substrate. A silicide layer may then be formed in the first contact hole. A second contact hole may be formed after the first contact hole and silicide layer is formed. A second silicidation may then be performed in the first and second contact holes.
摘要翻译：可以通过在衬底的第一器件区域上形成第一硅化物层，然后在第二器件区域上形成第二硅化物层，同时进一步形成第一硅化物层来产生具有不同特性的触点。可以在衬底的第一器件区域上的介电层中形成第一接触孔。然后可以在第一接触孔中形成硅化物层。可以在形成第一接触孔和硅化物层之后形成第二接触孔。然后可以在第一和第二接触孔中执行第二硅化。

5. 发明授权

US07638433B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07638433B2
公开(公告)日：2009-12-29
申请号：US11965420
申请日：2007-12-27
申请人： Jong-Ho Yun , Gil-Heyun Choi , Byung-Hee Kim , Hyun-Su Kim , Eun-Ok Lee
发明人： Jong-Ho Yun , Gil-Heyun Choi , Byung-Hee Kim , Hyun-Su Kim , Eun-Ok Lee
IPC分类号： H01L21/302 , H01L21/461 , H01L29/40
CPC分类号： H01L21/28097 , H01L29/4975 , H01L29/66545
摘要： A method of fabricating a semiconductor device includes forming a preliminary gate pattern on a semiconductor substrate. The preliminary gate pattern includes a gate oxide pattern, a conductive pattern, and a sacrificial insulating pattern. The method further includes forming spacers on opposite sidewalls of the preliminary gate pattern, forming an interlayer dielectric pattern to expose the sacrificial insulating pattern, removing the sacrificial insulating pattern to form an opening to expose the conductive pattern, transforming the conductive pattern into a metal silicide layer and forming a metal barrier pattern along an inner profile of the opening and a metal conductive pattern to fill the opening including the metal barrier pattern. The metal silicide layer and the metal conductive pattern constitute a gate electrode.
摘要翻译：制造半导体器件的方法包括在半导体衬底上形成初步栅极图案。初步栅极图案包括栅极氧化物图案，导电图案和牺牲绝缘图案。该方法还包括在初步栅极图案的相对侧壁上形成间隔物，形成层间电介质图案以暴露牺牲绝缘图案，去除牺牲绝缘图案以形成露出导电图案的开口，将导电图案转变为金属硅化物并且沿着开口的内部轮廓形成金属阻挡图案和金属导电图案以填充包括金属阻挡图案的开口。金属硅化物层和金属导电图案构成栅电极。

6. 发明授权

US07569483B2 Methods of forming metal silicide layers by annealing metal layers using inert heat transferring gases established in a convection apparatus 有权
标题翻译：通过在对流装置中建立的惰性热传递气体退火金属层来形成金属硅化物层的方法
公开(公告)号：US07569483B2
公开(公告)日：2009-08-04
申请号：US11199439
申请日：2005-08-08
申请人： Sug-Woo Jung , Gil-Heyun Choi , Jong-Ho Yun , Kwan-Jong Roh , Eun-Ji Jung , Hyun-Su Kim
发明人： Sug-Woo Jung , Gil-Heyun Choi , Jong-Ho Yun , Kwan-Jong Roh , Eun-Ji Jung , Hyun-Su Kim
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： Methods of forming metal silicide layers include a convection-based annealing step to convert a metal layer into a metal silicide layer. These methods may include forming a silicon layer on a substrate and forming a metal layer (e.g., nickel layer) in direct contact with the silicon layer. A step is then performed to convert at least a portion of the metal layer into a metal silicide layer. This conversion step is includes exposing the metal layer to an inert heat transferring gas (e.g., argon, nitrogen) in a convection or conduction apparatus.
摘要翻译：形成金属硅化物层的方法包括将金属层转化为金属硅化物层的基于对流的退火步骤。这些方法可以包括在衬底上形成硅层并形成与硅层直接接触的金属层（例如，镍层）。然后执行步骤以将至少一部分金属层转化为金属硅化物层。该转化步骤包括在对流或传导装置中将金属层暴露于惰性传热气体（例如氩气，氮气）。

7. 发明申请

US20090138198A1 APPARATUS AND METHOD FOR SHARING THE LANDMARK INFORMATION OF THE LOCATION SERVICE USING A JAVA RECORD MANAGEMENT SYSTEM IN A WIRELESS COMMUNICATION TERMINAL 审中-公开
标题翻译：使用无线通信终端中的JAVA记录管理系统共享位置服务的LANDMARK信息的装置和方法
公开(公告)号：US20090138198A1
公开(公告)日：2009-05-28
申请号：US12273676
申请日：2008-11-19
申请人： Jae-Min Lee , Sung-Chan Lee , Hyun-Su Kim , Young-Soo Yun , Soo-Hyeon Lee , Ji-Hyun Kim
发明人： Jae-Min Lee , Sung-Chan Lee , Hyun-Su Kim , Young-Soo Yun , Soo-Hyeon Lee , Ji-Hyun Kim
IPC分类号： G01C21/00 , H04W4/00 , G06F9/455 , G06F7/00 , G06F7/06 , G06F17/30
CPC分类号： G01C21/32 , G06F16/29
摘要： A method and an apparatus for sharing landmark information of a location service in a wireless communication terminal are provided. The method includes obtaining location information in a JAVA application and storing the landmark information based the location information using a backup database format in a file system region.
摘要翻译：提供一种用于在无线通信终端中共享位置服务的地标信息的方法和装置。该方法包括在JAVA应用中获取位置信息，并且使用备份数据库格式将位置信息存储在文件系统区域中。

8. 发明授权

US07531459B2 Methods of forming self-aligned silicide layers using multiple thermal processes 有权
标题翻译：使用多个热处理形成自对准硅化物层的方法
公开(公告)号：US07531459B2
公开(公告)日：2009-05-12
申请号：US11452042
申请日：2006-06-13
申请人： Sug-woo Jung , Gil-heyun Choi , Byung-hee Kim , Jong-ho Yun , Hyun-su Kim , Eun-ji Jung
发明人： Sug-woo Jung , Gil-heyun Choi , Byung-hee Kim , Jong-ho Yun , Hyun-su Kim , Eun-ji Jung
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/324 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： Methods of forming a metal salicide layer can include forming a metal layer on a substrate and forming a metal silicide layer on the metal layer using a first thermal process at a first temperature. Then a second process is performed, in-situ with the first thermal process, on the metal layer at a second temperature that is less than the first temperature.
摘要翻译：形成金属硅化物层的方法可以包括在基板上形成金属层，并在第一温度下使用第一热处理在金属层上形成金属硅化物层。然后在小于第一温度的第二温度下，在金属层上进行与第一热处理原位的第二工艺。

9. 发明申请

US20090004789A1 METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING STACKED TRANSISTORS 失效
标题翻译：形成具有堆叠晶体管的半导体器件的方法
公开(公告)号：US20090004789A1
公开(公告)日：2009-01-01
申请号：US12203968
申请日：2008-09-04
申请人： Hyun-Su Kim , Gil-Heyun Choi , Jong-Ho Yun , Sug-Woo Jung , Eun-Ji Jung
发明人： Hyun-Su Kim , Gil-Heyun Choi , Jong-Ho Yun , Sug-Woo Jung , Eun-Ji Jung
IPC分类号： H01L21/84 , H01L21/44
CPC分类号： H01L21/28518 , H01L21/76898 , H01L21/8221 , H01L27/0688 , H01L27/11 , H01L27/1108
摘要： There is provided a method of forming a semiconductor device having stacked transistors. When forming a contact hole for connecting the stacked transistors to each other, ohmic layers on the bottom and the sidewall of the common contact hole are separately formed. As a result, the respective ohmic layers are optimally formed to meet requirements or conditions. Accordingly, the contact resistance of the common contact may be minimized so that it is possible to enhance the speed of the semiconductor device.
摘要翻译：提供了一种形成具有堆叠晶体管的半导体器件的方法。当形成用于将堆叠的晶体管彼此连接的接触孔时，共同接触孔的底部和侧壁上的欧姆层分开形成。结果，各个欧姆层被最佳地形成以满足要求或条件。因此，公共接点的接触电阻可以最小化，从而可以提高半导体器件的速度。

10. 发明授权

US07410892B2 Methods of fabricating integrated circuit devices having self-aligned contact structures 有权
标题翻译：制造具有自对准接触结构的集成电路器件的方法
公开(公告)号：US07410892B2
公开(公告)日：2008-08-12
申请号：US11375914
申请日：2006-03-15
申请人： Hee-Sook Park , Gil-Heyun Choi , Sang-Bom Kang , Kwang-Jin Moon , Hyun-Su Kim , Seung-Gil Yang
发明人： Hee-Sook Park , Gil-Heyun Choi , Sang-Bom Kang , Kwang-Jin Moon , Hyun-Su Kim , Seung-Gil Yang
IPC分类号： H01L21/44 , H01L21/4763
CPC分类号： H01L27/10885 , H01L21/76831 , H01L21/76897 , H01L24/02 , H01L27/10855 , H01L27/10888 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/00
摘要： An integrated circuit device, e.g., a memory device, includes a substrate, a first insulation layer on the substrate, and a contact pad disposed in the first insulation layer in direct contact with the substrate. A second insulation layer is disposed on the first insulation layer. A conductive pattern, e.g., a damascene bit line, is disposed in the second insulation layer. A conductive plug extends through the second insulation layer to contact the contact pad and is self-aligned to the conductive pattern. An insulation film may separate the conductive pattern and the conductive plug. A glue layer may be disposed between the conductive pattern and the second insulation layer. The device may further include a third insulation layer on the second insulation layer and the conductive pattern, and the conductive plug may extend through the second and third insulation layers.
摘要翻译：集成电路器件，例如存储器件，包括衬底，衬底上的第一绝缘层，以及设置在与衬底直接接触的第一绝缘层中的接触焊盘。第二绝缘层设置在第一绝缘层上。导电图案，例如镶嵌位线，设置在第二绝缘层中。导电插塞延伸穿过第二绝缘层以接触接触焊盘并且与导电图案自对准。绝缘膜可以分离导电图案和导电插头。胶层可以设置在导电图案和第二绝缘层之间。该器件还可以包括在第二绝缘层和导电图案上的第三绝缘层，并且导电插塞可延伸穿过第二和第三绝缘层。

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