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1. 发明授权

US07564107B2 Power semiconductor device including a terminal structure 有权
标题翻译：功率半导体器件包括端子结构
公开(公告)号：US07564107B2
公开(公告)日：2009-07-21
申请号：US10936601
申请日：2004-09-09
申请人： Satoshi Yanagisawa , Satoshi Aida , Shigeo Kouzuki , Hironori Yoshioka , Ichiro Omura , Wataru Saito
发明人： Satoshi Yanagisawa , Satoshi Aida , Shigeo Kouzuki , Hironori Yoshioka , Ichiro Omura , Wataru Saito
IPC分类号： H01L29/76
CPC分类号： H01L29/7811 , H01L29/0661 , H01L29/402 , H01L29/41741 , H01L29/7802
摘要： A semiconductor device is disclosed, which comprises a terminal section formed to surround a device active region. The terminal section includes a trench formed in the semiconductor layer, and a filler filled in the trench. A field plate is extended to above the trench from an electrode of the semiconductor element formed in the device active region.
摘要翻译：公开了一种半导体器件，其包括形成为围绕器件有源区域的端子部分。端子部分包括形成在半导体层中的沟槽和填充在沟槽中的填充物。场板从形成在器件有源区域中的半导体元件的电极延伸到沟槽上方。

2. 发明授权

US07554155B2 Power semiconductor device and method of manufacturing the same 失效
标题翻译：功率半导体器件及其制造方法
公开(公告)号：US07554155B2
公开(公告)日：2009-06-30
申请号：US11250441
申请日：2005-10-17
申请人： Wataru Saito , Ichiro Omura
发明人： Wataru Saito , Ichiro Omura
IPC分类号： H01L29/00
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0638 , H01L29/0878 , H01L29/407 , H01L29/4238 , H01L29/66734 , H01L29/7811
摘要： A power semiconductor device has a first main electrode formed along a surface of a substrate, a first semiconductor layer of first conductive type electrically connected to the first main electrode, a cyclic structure section which is formed on the first semiconductor layer and has second semiconductor layers of first conductive type and third semiconductor layers of second conductive type alternately and cyclically formed along the surface of the substrate, a fourth semiconductor layer of second conductive type selectively formed on a part of the second and third semiconductor layers, a fifth semiconductor layer of first conductive type selectively formed on the fourth semiconductor layer, a second main electrode contacted the fourth and fifth semiconductor layers, a control electrode disposed adjacent via a first insulating film on the second, fourth and fifth semiconductor layers, and a depletion layer blocking section which is formed outside of the cyclic structure section and prevents a depletion layer from spreading outside, wherein the depletion layer blocking section includes a conductive layer formed via a second insulating film in a first trench formed outside of the outermost third semiconductor layer in the cyclic structure section.
摘要翻译：功率半导体器件具有沿着基板的表面形成的第一主电极，与第一主电极电连接的第一导电型的第一半导体层，形成在第一半导体层上的具有第二半导体层的第一导电类型和第二导电类型的第三半导体层沿着衬底的表面交替且循环地形成，第二导电类型的第四半导体层选择性地形成在第二和第三半导体层的一部分上，第一半导体层的第一半导体层导电型，选择性地形成在第四半导体层上，第二主电极与第四和第五半导体层接触;控制电极，其经由第二，第四和第五半导体层上的第一绝缘膜邻近设置;以及耗尽层阻挡部，形成在循环结构部分外部和前部耗尽层扩散到外部，其中耗尽层阻挡部分包括在循环结构部分中形成在最外侧第三半导体层外侧的第一沟槽中的第二绝缘膜形成的导电层。

3. 发明授权

US07531871B2 Power semiconductor switching element 有权
公开(公告)号：US07531871B2
公开(公告)日：2009-05-12
申请号：US11293301
申请日：2005-12-05
申请人： Ichiro Omura , Wataru Saito , Tsuneo Ogura , Hiromichi Ohashi , Yoshihiko Saito , Kenichi Tokano
发明人： Ichiro Omura , Wataru Saito , Tsuneo Ogura , Hiromichi Ohashi , Yoshihiko Saito , Kenichi Tokano
IPC分类号： H01L29/94
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0619 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/41741 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/66734 , H01L29/7397 , H01L29/7722 , H01L29/7811 , H01L29/7813 , H01L29/872 , H01L29/8725
摘要： A semiconductor element of this invention includes a drift layer of a first conductivity type formed on a semiconductor substrate of the first conductivity type, a well layer of a second conductivity type selectively formed in the surface of the drift layer, a source layer of the first conductivity type selectively formed in the surface of the well layer, a trench formed to reach at least the inside of the drift layer from the surface of the source layer through the well layer, a buried electrode formed in the trench through a first insulating film, and a control electrode formed on the drift layer, the well layer, and the source layer through a second insulating film.

4. 发明授权

US07294886B2 Power semiconductor device 有权
标题翻译：功率半导体器件
公开(公告)号：US07294886B2
公开(公告)日：2007-11-13
申请号：US11265294
申请日：2005-11-03
申请人： Wataru Saito , Ichiro Omura , Tsuneo Ogura
发明人： Wataru Saito , Ichiro Omura , Tsuneo Ogura
IPC分类号： H01L29/76 , H01L23/58
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0653 , H01L29/66712 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a power semiconductor device, including a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type which are alternately and laterally arranged on the first semiconductor layer and, a fourth semiconductor layer of the second conductivity type selectively formed in the surface regions of the second and third semiconductor layers, a fifth semiconductor layer of the first conductivity type selectively formed in the surface region of the fourth semiconductor layer, and a control electrode formed on the surfaces of the second, fourth and fifth semiconductor layers, in which a layer thickness ratio A is given by the expression: 0
摘要翻译：公开了一种功率半导体器件，包括第一导电类型的第一半导体层，第一导电类型的第二半导体层和第二导电类型的第三半导体层，其交替地和横向地布置在第一半导体层上，选择性地形成在第二和第三半导体层的表面区域中的第二导电类型的第四半导体层，选择性地形成在第四半导体层的表面区域中的第一导电类型的第五半导体层和形成在第二半导体层上的控制电极第二半导体层，第四半导体层和第五半导体层的表面，其中层厚度比A由以下表达式给出：<？in-line-formula description =“In-line Formulas”end =“lead”？> 0 其中t是第一半导体层的厚度，d是第二次 d半导体层。

5. 发明申请

US20060289915A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060289915A1
公开(公告)日：2006-12-28
申请号：US11455650
申请日：2006-06-20
申请人： Ichiro Omura , Wataru Saito
发明人： Ichiro Omura , Wataru Saito
IPC分类号： H01L29/94
CPC分类号： H01L29/7815 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device comprises a semiconductor portion including first semiconductor layers of a first conduction type and second semiconductor layers of a second conduction type alternately arranged on the surface of a semiconductor substrate to form a striped shape. A main region is formed to arrange a main cell in a well. A current sense cell is arranged in a sense well. A sense region is formed having the direction of the length in a direction that intersects the direction of alternate arrangement of the first semiconductor layers and the second semiconductor layers.
摘要翻译：半导体器件包括半导体部分，半导体部分包括第一导电类型的第一半导体层和交替布置在半导体衬底的表面上以形成条纹形状的第二导电类型的第二半导体层。形成主区域以将主电池布置在阱中。电流检测单元布置在一个感觉井中。感测区域形成为具有与第一半导体层和第二半导体层的交替排列方向相交的方向的长度方向。

6. 发明申请

US20060220156A1 Semiconductor device and method for manufacturing same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060220156A1
公开(公告)日：2006-10-05
申请号：US11358411
申请日：2006-02-22
申请人： Wataru Saito , Ichiro Omura
发明人： Wataru Saito , Ichiro Omura
IPC分类号： H01L29/76
CPC分类号： H01L29/66712 , H01L29/0615 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/41741 , H01L29/7811
摘要： The present semiconductor device comprises pillar layers formed on a first semiconductor layer, the pillar layers comprising a first semiconductor pillar layer of a first conductivity type and a second semiconductor pillar layer of a second conductivity type which are alternately formed in a first direction along a surface of the first semiconductor layer. A semiconductor base layer of the second conductivity type is selectively formed on the surface of the second semiconductor pillar layer. A guard ring layer of the second conductivity type is formed surrounding the outermost periphery of the semiconductor base layer. The semiconductor base layer has a smaller junction depth than the guard ring layer.
摘要翻译：本半导体器件包括形成在第一半导体层上的柱层，所述柱层包括第一导电类型的第一半导体柱层和第二导电类型的第二半导体柱层，沿第一半导体层的第一方向交替地形成的第一半导体层。在第二半导体柱层的表面上选择性地形成第二导电类型的半导体基底层。围绕半导体基底层的最外周形成第二导电类型的保护环层。半导体基层具有比保护环层更小的结深度。

7. 发明授权

US07102179B2 Power semiconductor device used for power control 失效
标题翻译：功率半导体器件用于功率控制
公开(公告)号：US07102179B2
公开(公告)日：2006-09-05
申请号：US10986103
申请日：2004-11-12
申请人： Wataru Saito , Ichiro Omura , Hiromichi Ohashi
发明人： Wataru Saito , Ichiro Omura , Hiromichi Ohashi
IPC分类号： H01L31/072
CPC分类号： H01L27/0605 , H01L29/0619 , H01L29/0657 , H01L29/1602 , H01L29/2003 , H01L29/205 , H01L29/402 , H01L29/7787 , H01L29/872
摘要： A power semiconductor device includes a first semiconductor layer, a second semiconductor layer of a first conductivity type, first and second main electrodes, a control electrode and a third semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer. The first and second main electrodes are formed on the second semiconductor layer separately from each other. The control electrode is formed on the second semiconductor layer between the first and second main electrodes. The third semiconductor layer is formed on the second semiconductor layer between the control electrode and the second main electrode.
摘要翻译：功率半导体器件包括第一半导体层，第一导电类型的第二半导体层，第一和第二主电极，控制电极和第三半导体层。第二半导体层形成在第一半导体层上。第一和第二主电极彼此分开地形成在第二半导体层上。控制电极形成在第一和第二主电极之间的第二半导体层上。在控制电极和第二主电极之间的第二半导体层上形成第三半导体层。

8. 发明授权

US07075125B2 Power semiconductor device 有权
标题翻译：功率半导体器件
公开(公告)号：US07075125B2
公开(公告)日：2006-07-11
申请号：US10806397
申请日：2004-03-23
申请人： Wataru Saito , Ichiro Omura
发明人： Wataru Saito , Ichiro Omura
IPC分类号： H01L31/0328
CPC分类号： H01L29/404 , H01L29/2003 , H01L29/41725 , H01L29/7787
摘要： A power semiconductor device includes a first semiconductor layer of non-doped AlXGa1−XN (0≦X≦1), and a second semiconductor layer of non-doped or n-type AlYGa1−YN (0≦Y≦1, X
摘要翻译：功率半导体器件包括非掺杂Al x Ga 1-X N（0 <= X 1 = 1）的第一半导体层和第设置在第一半导体层上的非掺杂或n型Al Y Ga 1-Y N（0 <= Y <= 1，X

9. 发明申请

US20060145298A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20060145298A1
公开(公告)日：2006-07-06
申请号：US11296312
申请日：2005-12-08
申请人： Ichiro Omura
发明人： Ichiro Omura
IPC分类号： H01L29/00
CPC分类号： H01L29/7395 , H01L23/49562 , H01L23/49575 , H01L24/48 , H01L24/49 , H01L29/7818 , H01L29/782 , H01L2224/0603 , H01L2224/48091 , H01L2224/48137 , H01L2224/48139 , H01L2224/48247 , H01L2224/4903 , H01L2224/49051 , H01L2224/49113 , H01L2224/4917 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： According to the present invention, there is provided a semiconductor device including a MOSFET, comprising: a second-conductivity-type semiconductor layer selectively formed in one surface portion of a first first-conductivity-type semiconductor layer; a second first-conductivity-type semiconductor layer selectively formed in a surface portion of said second-conductivity-type semiconductor layer; a first main electrode electrically connected to said second first-conductivity-type semiconductor layer and second-conductivity-type semiconductor layer; a second main electrode electrically connected to the other surface of said first first-conductivity-type semiconductor layer; and a control electrode formed on the surfaces of said second first-conductivity-type semiconductor layer, second-conductivity-type semiconductor layer, and first first-conductivity-type semiconductor layer via an insulating film, and a junction between said second main electrode and first first-conductivity-type semiconductor layer is a Schottky contact.
摘要翻译：根据本发明，提供一种包括MOSFET的半导体器件，包括：选择性地形成在第一第一导电型半导体层的一个表面部分中的第二导电型半导体层; 选择性地形成在所述第二导电型半导体层的表面部分中的第二第一导电型半导体层; 电连接到所述第二第一导电型半导体层和第二导电型半导体层的第一主电极; 电连接到所述第一第一导电型半导体层的另一个表面的第二主电极; 以及控制电极，其经由绝缘膜形成在所述第二第一导电型半导体层，第二导电型半导体层和第一第一导电型半导体层的表面上，以及所述第二主电极和第一第一导电型半导体层是肖特基接触。

10. 发明申请

US20060145290A1 Semiconductor device having vertical metal insulator semiconductor transistors having plural spatially overlapping regions of different conductivity type 审中-公开
公开(公告)号：US20060145290A1
公开(公告)日：2006-07-06
申请号：US11294411
申请日：2005-12-06
申请人： Hideki Okumura , Hitoshi Kobayashi , Masanobu Tsuchitani , Akihiko Osawa , Wataru Saito , Masakazu Yamaguchi , Ichiro Omura
发明人： Hideki Okumura , Hitoshi Kobayashi , Masanobu Tsuchitani , Akihiko Osawa , Wataru Saito , Masakazu Yamaguchi , Ichiro Omura
IPC分类号： H01L29/00 , H01L21/425 , H01L21/336
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/0696 , H01L29/0878 , H01L29/7802
摘要： A semiconductor device includes a diffusion area formed in a semiconductor layer of a first conductive type. The diffusion area comprises first and second impurity diffusion areas of the first and second conductive types, respectively. The diffusion area has a first and second areas which are defined by an impurity concentration of the first and second impurity diffusion areas. A junction between the first and second area is formed in a portion in which the first and second impurity diffusion areas overlap each other. A period of the impurity concentration, in a planar direction of the semiconductor layer, of the first or second area is smaller than the maximum width, in the planar direction of the semiconductor layer, of the first and second impurity diffusion areas constituting the first or second area.

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