专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08889073B2 Apparatus for recovering residual salt from the reduced uranium metal 有权
标题翻译：用于从还原铀金属中回收残余盐的装置
公开(公告)号：US08889073B2
公开(公告)日：2014-11-18
申请号：US13221569
申请日：2011-08-30
申请人： Ik-Soo Kim , Sun-Seok Hong , Jin-Mok Hur , Hansoo Lee
发明人： Ik-Soo Kim , Sun-Seok Hong , Jin-Mok Hur , Hansoo Lee
IPC分类号： G01N31/12 , G21C19/42 , G21C21/02
CPC分类号： G21C21/02 , G21C19/42
摘要： Disclosed herein is an apparatus for recovering residual salt from the reduced uranium metal. The apparatus comprising: an evaporating chamber accommodating mixed molten salt or a reduced uranium metal; a heating furnace surrounding the evaporating chamber to heat the mixed molten salt in the evaporating chamber; an insulator disposed over the evaporating chamber to block heat generated from the evaporating chamber, and including an evaporating pipe in a center thereof to move vapor generated from the evaporating chamber; a receiver disposed over the insulator to collect powder formed by condensing and solidifying vapor passing through the evaporating pipe; and a condenser disposed over the receiver to prevent the vapor passing through the evaporating pipe from leaking out of the apparatus.
摘要翻译：本文公开了一种从还原铀金属中回收残余盐的装置。该装置包括：容纳混合熔融盐或还原铀金属的蒸发室; 围绕蒸发室的加热炉，以加热蒸发室中的混合熔盐; 设置在所述蒸发室上方的绝缘体，以阻挡从所述蒸发室产生的热量，并且在其中心包括蒸发管，以移动从所述蒸发室产生的蒸气; 设置在绝缘体上的接收器，用于收集通过蒸发管冷凝和凝固蒸气形成的粉末; 以及设置在接收器上方的冷凝器，以防止通过蒸发管的蒸汽泄漏出设备。

2. 发明授权

US08625325B2 Memory cells including resistance variable material patterns of different compositions 有权
标题翻译：记忆单元包括不同组成的电阻变化材料图案
公开(公告)号：US08625325B2
公开(公告)日：2014-01-07
申请号：US12853329
申请日：2010-08-10
申请人： Hyeong-Geun An , Ik-Soo Kim , Hee-Ju Shin , Dong-Hyun Im , Sung-Lae Cho , Eun-Hee Cho
发明人： Hyeong-Geun An , Ik-Soo Kim , Hee-Ju Shin , Dong-Hyun Im , Sung-Lae Cho , Eun-Hee Cho
IPC分类号： G11C11/56
CPC分类号： G11C13/0069 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C2013/0092 , G11C2213/56 , G11C2213/72 , H01L27/101
摘要： A non-volatile memory device includes a plurality of word lines, a plurality of bit lines, and an array of variable resistance memory cells each electrically connected between a respective word line and a respective bit line. Each of the memory cells includes first and second resistance variable patterns electrically connected in series between first and second electrodes. A material composition of the first resistance variable pattern is different than a material composition of the second resistance variable pattern. Multi-bit data states of each memory cell are defined by a contiguous increase in size of a programmable high-resistance volume within the first and second resistance variable patterns.
摘要翻译：非易失性存储器件包括多个字线，多个位线，以及每个电连接在相应字线和相应位线之间的可变电阻存储单元阵列。每个存储单元包括在第一和第二电极之间串联电连接的第一和第二电阻可变图案。第一电阻可变图案的材料组成不同于第二电阻变化图案的材料组成。每个存储器单元的多位数据状态由第一和第二电阻变化模式内的可编程高电阻体积的连续增加来定义。

3. 发明授权

US08507353B2 Method of forming semiconductor device having self-aligned plug 有权
标题翻译：形成具有自对准插头的半导体器件的方法
公开(公告)号：US08507353B2
公开(公告)日：2013-08-13
申请号：US13188981
申请日：2011-07-22
申请人： Gyu-Hwan Oh , Sung-Lae Cho , Byoung-Jae Bae , Ik-Soo Kim , Dong-Hyun Im , Doo-Hwan Park , Kyoung-Ha Eom , Sung-Un Kwon , Chul-Ho Shin , Sang-Sup Jeong
发明人： Gyu-Hwan Oh , Sung-Lae Cho , Byoung-Jae Bae , Ik-Soo Kim , Dong-Hyun Im , Doo-Hwan Park , Kyoung-Ha Eom , Sung-Un Kwon , Chul-Ho Shin , Sang-Sup Jeong
IPC分类号： H01L21/20 , H01L21/8244
CPC分类号： H01L45/1683 , H01L27/2463 , H01L45/06
摘要： A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug.
摘要翻译：形成基板上的导电图案。形成具有露出导电图案的开口的绝缘层。底部电极形成在导电图案和开口的第一侧壁上。在底部电极和开口的第二侧壁上形成间隔物。间隔件和底部电极形成为低于绝缘层的顶表面。数据存储插头形成在底部电极和间隔件上。数据存储插头具有与底部电极的侧壁对准的第一侧壁和与间隔件的侧壁对准的第二侧壁。在数据存储插头上形成位线。

4. 发明申请

US20110284815A1 PHASE-CHANGE MEMORY DEVICES HAVING STRESS RELIEF BUFFERS 审中-公开
标题翻译：具有应力消除缓冲器的相变存储器件
公开(公告)号：US20110284815A1
公开(公告)日：2011-11-24
申请号：US13070648
申请日：2011-03-24
申请人： Ik-soo Kim , Soon-oh Park , Dong-ho Ahn , Sung-lae Cho , Dae-hong Ko , Hyun-chul Sohn , Ki-hoon Do , Mann-ho Cho
发明人： Ik-soo Kim , Soon-oh Park , Dong-ho Ahn , Sung-lae Cho , Dae-hong Ko , Hyun-chul Sohn , Ki-hoon Do , Mann-ho Cho
IPC分类号： H01L47/00
CPC分类号： H01L45/12 , H01L45/06 , H01L45/144
摘要： A memory device includes a substrate and a memory cell including a first electrode on the substrate, a phase-change material region on the first electrode and a second electrode on the phase-change material region opposite the first electrode. The memory device further includes a stress relief buffer adjacent a sidewall of the phase-change material region between the first and second electrodes. In some embodiments, the stress relief buffer includes a stress relief region contacting the sidewall of the phase-change material region. In further embodiments, the stress relief buffer includes a void adjacent the sidewall of the phase-change material region.
摘要翻译：存储器件包括衬底和存储单元，该存储单元包括衬底上的第一电极，第一电极上的相变材料区域和与第一电极相对的相变材料区域上的第二电极。存储器件还包括与第一和第二电极之间的相变材料区域的侧壁相邻的应力释放缓冲器。在一些实施例中，应力消除缓冲器包括接触相变材料区域的侧壁的应力消除区域。在另外的实施例中，应力消除缓冲器包括邻近相变材料区域的侧壁的空隙。

5. 发明申请

US20110032753A1 MEMORY CELLS INCLUDING RESISTANCE VARIABLE MATERIAL PATTERNS OF DIFFERENT COMPOSITIONS 有权
标题翻译：包含不同成分的电阻变化材料的记忆细胞
公开(公告)号：US20110032753A1
公开(公告)日：2011-02-10
申请号：US12853329
申请日：2010-08-10
申请人： Hyeong-Geun An , Ik-Soo Kim , Hee-Ju Shin , Dong-Hyun Im , Sung-Lae Cho , Eun-Hee Cho
发明人： Hyeong-Geun An , Ik-Soo Kim , Hee-Ju Shin , Dong-Hyun Im , Sung-Lae Cho , Eun-Hee Cho
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C2013/0092 , G11C2213/56 , G11C2213/72 , H01L27/101
摘要： A non-volatile memory device includes a plurality of word lines, a plurality of bit lines, and an array of variable resistance memory cells each electrically connected between a respective word line and a respective bit line. Each of the memory cells includes first and second resistance variable patterns electrically connected in series between first and second electrodes. A material composition of the first resistance variable pattern is different than a material composition of the second resistance variable pattern. Multi-bit data states of each memory cell are defined by a contiguous increase in size of a programmable high-resistance volume within the first and second resistance variable patterns.
摘要翻译：非易失性存储器件包括多个字线，多个位线，以及每个电连接在相应字线和相应位线之间的可变电阻存储单元阵列。每个存储单元包括在第一和第二电极之间串联电连接的第一和第二电阻可变图案。第一电阻可变图案的材料组成不同于第二电阻变化图案的材料组成。每个存储器单元的多位数据状态由第一和第二电阻变化模式内的可编程高电阻体积的连续增加来定义。

6. 发明申请

US20110032752A1 Multi-Level Memory Device Using Resistance Material 有权
标题翻译：使用电阻材料的多级存储器件
公开(公告)号：US20110032752A1
公开(公告)日：2011-02-10
申请号：US12819498
申请日：2010-06-21
申请人： Ik-Soo Kim , Do-Hyung KIM , Sung-Lae CHO , Hyeong-Geun AN , Dong-Hyun IM , Eun-Hee CHO
发明人： Ik-Soo Kim , Do-Hyung KIM , Sung-Lae CHO , Hyeong-Geun AN , Dong-Hyun IM , Eun-Hee CHO
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C11/5685 , G11C8/08 , G11C11/5678 , G11C13/0004 , G11C13/0007 , G11C13/0061 , G11C13/0069 , G11C2013/009 , G11C2013/0092 , G11C2213/72 , H01L27/101 , H01L27/1021
摘要： A multi-level memory device includes an insulating layer having an opening therein, and a multi-level cell (MLC) formed in the opening that has a resistance level varies based on the data stored therein. The MLC is configured to have a resistance level that varies as write pulses having the same pulse height and different pulse widths are applied to the MLC.
摘要翻译：多级存储器件包括其中具有开口的绝缘层，并且形成在开口中的具有电阻电平的多电平单元（MLC）基于存储在其中的数据而变化。 MLC被配置为具有随着具有相同脉冲高度和不同脉冲宽度的写入脉冲被施加到MLC而变化的电阻电平。

7. 发明申请

US20100129995A1 METHOD OF FORMING VARIABLE RESISTANCE MEMORY DEVICE 有权
标题翻译：形成可变电阻存储器件的方法
公开(公告)号：US20100129995A1
公开(公告)日：2010-05-27
申请号：US12625816
申请日：2009-11-25
申请人： Dong-Hyun Im , Hyeonggeun An , Sunglae Cho , Ik Soo Kim
发明人： Dong-Hyun Im , Hyeonggeun An , Sunglae Cho , Ik Soo Kim
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L27/2463 , H01L45/1233 , H01L45/144 , H01L45/1616 , H01L45/1683
摘要： A method of forming a variable resistance memory device includes forming an opening in an insulating layer, and forming a variable resistance layer by filling the opening with an antimony rich antimony-tellurium compound.
摘要翻译：一种形成可变电阻存储器件的方法包括在绝缘层中形成开口，并通过用富锑锑 - 碲化合物填充开口形成可变电阻层。

8. 发明申请

US20090233421A1 Methods of Fabricating Semiconductor Device Including Phase Change Layer 有权
标题翻译：制造包括相变层的半导体器件的方法
公开(公告)号：US20090233421A1
公开(公告)日：2009-09-17
申请号：US12405408
申请日：2009-03-17
申请人： Jin-Il Lee , Sung-Lae Cho , Ik-Soo Kim , Hye-Young Park , Do-Hyung Kim , Dong-Hyun Im
发明人： Jin-Il Lee , Sung-Lae Cho , Ik-Soo Kim , Hye-Young Park , Do-Hyung Kim , Dong-Hyun Im
IPC分类号： H01L21/20
CPC分类号： H01L45/1683 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1616
摘要： Provided are methods of fabricating a semiconductor device including a phase change layer. Methods may include forming a dielectric layer on a substrate, forming an opening in the dielectric layer and depositing, on the substrate having the opening, a phase change layer that contains an element that lowers a process temperature of a thermal treatment process to a temperature that is lower than a melting point of the phase change layer. Methods may include migrating a portion of the phase change layer from outside the opening, into the opening by the thermal treatment process that includes the process temperature that is lower than the melting point of the phase change layer.
摘要翻译：提供制造包括相变层的半导体器件的方法。方法可以包括在衬底上形成电介质层，在电介质层中形成开口，并在具有开口的衬底上沉积相变层，该相变层含有将热处理工艺的工艺温度降低到低于相变层的熔点。方法可以包括通过包括低于相变层的熔点的工艺温度的热处理工艺将一部分相变层从开口外部迁移到开口中。

9. 发明授权

US07515215B2 Array substrate for liquid crystal display substrate having high aperture ratio and method for fabricating the same 有权
公开(公告)号：US07515215B2
公开(公告)日：2009-04-07
申请号：US10730133
申请日：2003-12-09
申请人： Gee Sung Chae , Jae Kyun Lee , Ik Soo Kim
发明人： Gee Sung Chae , Jae Kyun Lee , Ik Soo Kim
IPC分类号： G02F1/1343
CPC分类号： G02F1/136213 , G02F1/133512
摘要： An array substrate for a liquid crystal display device includes a transparent substrate, a gate line arranged along a first direction on the transparent substrate, a gate electrode extending from the gate line, a common line arranged along the first direction adjacent to the gate line and having a protrusion, a gate insulation layer on the transparent substrate to cover the gate line, the gate electrode, and the common electrode, an active layer on the gate insulation layer and over the gate electrode, first and second ohmic contact layers on the active layer, a data line arranged along a second direction perpendicular to the first upon the gate insulation layer, a source electrode extending from the data line and contacting the first ohmic contact layer, a drain electrode spaced apart from the source electrode and contacting the second ohmic contact layer, a first capacitor electrode formed on the gate insulation layer and connected to the drain electrode, the first capacitor electrode overlapping the common line and the protrusion of the common line, a passivation layer formed on the gate insulation layer to cover the data line, the source and drain electrodes, and the first capacitor electrode, the passivation layer having a first contact hole exposing a portion of the capacitor electrode, and a pixel electrode formed on the passivation layer and contacting the first capacitor electrode through the first contact hole.

10. 发明申请

US20060240080A1 Alginate sponge and preparation method thereof 审中-公开
标题翻译：藻酸盐海绵及其制备方法
公开(公告)号：US20060240080A1
公开(公告)日：2006-10-26
申请号：US10549002
申请日：2004-03-17
申请人： Seung-Man Han , Ik-Soo Kim , Nam-Keun Han
发明人： Seung-Man Han , Ik-Soo Kim , Nam-Keun Han
IPC分类号： A61K38/20 , A61K38/19 , A61K38/18 , A61K9/70
CPC分类号： A61K9/19 , A61K38/00 , A61K47/36
摘要： The present invention relates to an alginate sponge and a preparation method thereof, more particularly to an alginate sponge having significantly improved flexibility, structural integrity, water-absorptivity, and processability, to be used for medical and tissue engineering purposes, and a simple preparation method thereof. The alginate sponge of the present invention has a maximum bend angle (flexibility) of at least 90°″, an apparent density (structural integrity) ranging from 0.006 to 0.1 glcm3, and a saline solution absorption ratio ranging from 150 to 700%.
摘要翻译：本发明涉及藻酸盐海绵及其制备方法，更具体地涉及用于医疗和组织工程目的的具有显着改善的柔性，结构完整性，吸水性和加工性的藻酸盐海绵，以及简单的制备方法其中。本发明的藻酸盐海绵具有至少90°的最大弯曲角度（柔韧性），其中“=”2.79mm“wi =”2.12mm“file =”US20060240080A1- 20061026-P00900.TIF“alt =”custom character“img-content =”character“img-format =”tif“/>，表观密度（结构完整性）范围为0.006至0.1g / cm 3，盐溶液吸收比范围从150％到700％。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式