会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明申请
    • MEMORY DEVICE
    • 内存设备
    • US20070266242A1
    • 2007-11-15
    • US11740451
    • 2007-04-26
    • Ikuo YAMAGUCHI
    • Ikuo YAMAGUCHI
    • H04L9/00
    • G06F12/1408
    • A memory device includes a storage unit having a decryption key storage section that stores key information for decryption and a data storage section that stores to-be-read data requested from the exterior, and a decryption control unit capable of decrypting an externally input encrypted read instruction and address based on the key information stored in the decryption key storage section, and causing data corresponding to the decrypted read instruction and address to be output from the data storage section. The decryption key storage section is composed of arrays of a flash memory.
    • 存储装置包括存储单元,该存储单元具有存储用于解密的密钥信息的解密密钥存储部分和存储从外部请求的待读取数据的数据存储部分,以及解密控制单元,其能够解密外部输入的加密读取 基于存储在解密密钥存储部分中的密钥信息的指令和地址,并且从数据存储部分输出与解密的读指令和地址对应的数据。 解密密钥存储部分由闪速存储器的阵列组成。
    • 4. 发明申请
    • Semiconductor memory device
    • 半导体存储器件
    • US20060107072A1
    • 2006-05-18
    • US11203263
    • 2005-08-15
    • Ryuji UmezuIkuo Yamaguchi
    • Ryuji UmezuIkuo Yamaguchi
    • G06F12/14
    • G06F12/1408
    • A semiconductor memory includes a memory control section and a memory core section. A command judgment circuit in the memory control section changes the operating mode of the semiconductor memory in response to a command sent from a controller of an information processing apparatus. In a first mode, a decryption process is performed in a command decryption circuit, and data outputted from the memory core section is not scrambled. In a second mode, the decryption process is not performed in the command decryption circuit, and the command outputted from the memory core section is scrambled.
    • 半导体存储器包括存储器控制部分和存储器核心部分。 存储器控制部分中的命令判断电路响应于从信息处理设备的控制器发送的命令改变半导体存储器的操作模式。 在第一模式中,在命令解密电路中执行解密处理,并且从存储器核心部分输出的数据不被加扰。 在第二模式中,在命令解密电路中不执行解密处理,并且从存储器核心部分输出的命令被加扰。
    • 5. 发明授权
    • Memory device
    • 内存设备
    • US08140862B2
    • 2012-03-20
    • US11740451
    • 2007-04-26
    • Ikuo Yamaguchi
    • Ikuo Yamaguchi
    • G06F11/30
    • G06F12/1408
    • A memory device includes a storage unit having a decryption key storage section that stores key information for decryption and a data storage section that stores to-be-read data requested from the exterior, and a decryption control unit capable of decrypting an externally input encrypted read instruction and address based on the key information stored in the decryption key storage section, and causing data corresponding to the decrypted read instruction and address to be output from the data storage section. The decryption key storage section is composed of arrays of a flash memory.
    • 存储装置包括存储单元,该存储单元具有存储用于解密的密钥信息的解密密钥存储部分和存储从外部请求的待读取数据的数据存储部分,以及解密控制单元,其能够解密外部输入的加密读取 基于存储在解密密钥存储部分中的密钥信息的指令和地址,并且从数据存储部分输出与解密的读指令和地址对应的数据。 解密密钥存储部分由闪速存储器的阵列组成。