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    • 8. 发明授权
    • Duplexing structure of switching system processor and method for maintaining memory coherency
    • 交换系统处理器的双工结构和维持内存一致性的方法
    • US06594778B1
    • 2003-07-15
    • US09617495
    • 2000-07-17
    • In-Chul Kim
    • In-Chul Kim
    • G06F702
    • G06F11/1633G06F11/2038G06F11/2048G06F11/2097
    • A duplexing structure of a switching system processor and a method for maintaining a memory coherency are provided in which both data of an active memory and of a standby memory are concurrently read. The concurrently read data can be compared using hardware. In the duplexing structure, an address corresponding to the concurrent reading operation is set and a path is provided therefore. Accordingly, when an address of the active memory and the standby memory are compared, they are simultaneously accessed and compared for judgement at one time. Thus, a time required for the operation is reduced. In addition, since the comparison result can be recognized according to the kinds of the termination that is applied by hardware, without comparing the two data relying on a series of program operations on the basis of software using the CPU, the load of the CPU required with respect to memory coherency verification can be reduced.
    • 提供了交换系统处理器的双工结构和用于维持存储器一致性的方法,其中同时读取活动存储器和备用存储器的数据。 可以使用硬件来比较同时读取的数据。 在双工结构中,设置与并行读取操作对应的地址,因此提供路径。 因此,当比较活动存储器和备用存储器的地址时,它们被同时访问并进行比较以供一次判断。 因此,减少了操作所需的时间。 此外,由于可以根据由硬件应用的终端的种类来识别比较结果,而是不依赖于使用CPU的软件依赖于一系列程序操作来比较两个数据,所需的CPU的负载 相对于存储器一致性验证可以减少。