专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20160284729A1 NON-VOLATILE MEMORY DEVICE HAVING VERTICAL STRUCTURE AND METHOD OF OPERATING THE SAME 审中-公开
公开(公告)号：US20160284729A1
公开(公告)日：2016-09-29
申请号：US15176917
申请日：2016-06-08
申请人： Jae-hun Jeong , Han-soo Kim , Won-seok Cho , Jae-hoon Jang , Sun-il Shim
发明人： Jae-hun Jeong , Han-soo Kim , Won-seok Cho , Jae-hoon Jang , Sun-il Shim
IPC分类号： H01L27/115 , H01L23/528 , G11C16/10 , H01L23/522 , G11C16/04 , G11C16/26
CPC分类号： G11C16/0483 , G11C16/10 , G11C16/26 , H01L23/5226 , H01L27/11524 , H01L27/11551 , H01L27/11556 , H01L27/11582 , H01L29/66825 , H01L29/7881
摘要： A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

2. 发明授权

US08914076B2 Apparatus and method for processing voice communication in mobile terminal 有权
标题翻译：移动终端处理语音通信的装置和方法
公开(公告)号：US08914076B2
公开(公告)日：2014-12-16
申请号：US13346698
申请日：2012-01-09
申请人： Chan Ho Park , Jae Hun Jeong , Hyoung Ju Lee , Sung Chel Hwang
发明人： Chan Ho Park , Jae Hun Jeong , Hyoung Ju Lee , Sung Chel Hwang
IPC分类号： H04M1/00 , H04M1/60
CPC分类号： H04M1/6041 , H04M1/6025
摘要： A device and method process voice communication service. A mobile terminal device of the present disclosure includes a microphone arranged at one end of a body of the device; a speaker arranged close to the microphone; a transceiver arranged at the other end of the body; a codec including a coder connected to the microphone, a decoder connected to the speaker, and a switch of which one node is connected to one of the coder and the decoder selectively and the other node is connected to the transceiver; and a communication controller which controls the switch to establish a path between the coder and the transceiver and enables the speaker in speakerphone mode.
摘要翻译：一种设备和方法处理语音通信服务。本公开的移动终端装置包括布置在设备的主体的一端的麦克风; 靠近麦克风布置的扬声器; 布置在身体另一端的收发器; 编解码器，包括连接到麦克风的编码器，连接到扬声器的解码器，以及一个节点选择性地连接到编码器和解码器之一的开关，另一个节点连接到收发器; 以及通信控制器，其控制开关以在编码器和收发器之间建立路径，并使扬声器处于扬声器模式。

3. 发明申请

US20120178385A1 APPARATUS AND METHOD FOR PROCESSING VOICE COMMUNICATION IN MOBILE TERMINAL 有权
标题翻译：移动终端处理语音通信的装置和方法
公开(公告)号：US20120178385A1
公开(公告)日：2012-07-12
申请号：US13346698
申请日：2012-01-09
申请人： Chan Ho Park , Jae Hun Jeong , Hyoung Ju Lee , Sung Chel Hwang
发明人： Chan Ho Park , Jae Hun Jeong , Hyoung Ju Lee , Sung Chel Hwang
IPC分类号： H04W88/02 , H04B1/44
CPC分类号： H04M1/6041 , H04M1/6025
摘要： A device and method process voice communication service. A mobile terminal device of the present disclosure includes a microphone arranged at one end of a body of the device; a speaker arranged close to the microphone; a transceiver arranged at the other end of the body; a codec including a coder connected to the microphone, a decoder connected to the speaker, and a switch of which one node is connected to one of the coder and the decoder selectively and the other node is connected to the transceiver; and a communication controller which controls the switch to establish a path between the coder and the transceiver and enables the speaker in speakerphone mode.
摘要翻译：一种设备和方法处理语音通信服务。本公开的移动终端装置包括布置在设备的主体的一端的麦克风; 靠近麦克风布置的扬声器; 布置在身体另一端的收发器; 编解码器，包括连接到麦克风的编码器，连接到扬声器的解码器，以及一个节点选择性地连接到编码器和解码器之一的开关，另一个节点连接到收发器; 以及通信控制器，其控制开关以在编码器和收发器之间建立路径，并使扬声器处于扬声器模式。

4. 发明授权

US08133784B2 Method of fabricating non-volatile memory device having vertical structure 有权
标题翻译：制造具有垂直结构的非易失性存储器件的方法
公开(公告)号：US08133784B2
公开(公告)日：2012-03-13
申请号：US12588534
申请日：2009-10-19
申请人： Dew-ill Chung , Han-soo Kim , Jae-hun Jeong , Jin-soo Lim , Ki-hyun Kim , Ju-young Lim
发明人： Dew-ill Chung , Han-soo Kim , Jae-hun Jeong , Jin-soo Lim , Ki-hyun Kim , Ju-young Lim
IPC分类号： H01L21/8238 , H01L21/336 , H01L21/8236
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582
摘要： A method of fabricating a non-volatile memory device according to an example embodiment may include etching a plurality of sacrificial films and insulation films to form a plurality of first openings that expose a plurality of first portions of a semiconductor substrate. A plurality of channel layers may be formed in the plurality of first openings so as to coat the plurality of first portions of the semiconductor substrate and side surfaces of the plurality of first openings. A plurality of insulation pillars may be formed on the plurality of channel layers so as to fill the plurality of first openings. The plurality of sacrificial films and insulation films may be further etched to form a plurality of second openings that expose a plurality of second portions of the semiconductor substrate. A plurality of side openings may be formed by removing the plurality of sacrificial films. A plurality of gate dielectric films may be formed on surfaces of the plurality of side openings. A plurality of gate electrodes may be formed on the plurality of gate dielectric films so as to fill the plurality of side openings.
摘要翻译：根据示例性实施例的制造非易失性存储器件的方法可以包括蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第一部分的多个第一开口。可以在多个第一开口中形成多个沟道层，以便涂覆半导体衬底的多个第一部分和多个第一开口的侧表面。可以在多个通道层上形成多个绝缘柱，以填充多个第一开口。可以进一步蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第二部分的多个第二开口。可以通过去除多个牺牲膜来形成多个侧开口。多个栅极电介质膜可以形成在多个侧面开口的表面上。可以在多个栅极电介质膜上形成多个栅电极，以填充多个侧开口。

5. 发明申请

US20110018036A1 VERTICAL NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：垂直非易失性存储器件及其制造方法
公开(公告)号：US20110018036A1
公开(公告)日：2011-01-27
申请号：US12636912
申请日：2009-12-14
申请人： Sung-min Hwang , Han-soo Kim , Won-seok CHO , Jae-hoon Jang , Sun-il Shim , Jae-hun Jeong , Ki-hyun Kim
发明人： Sung-min Hwang , Han-soo Kim , Won-seok CHO , Jae-hoon Jang , Sun-il Shim , Jae-hun Jeong , Ki-hyun Kim
IPC分类号： H01L27/085
CPC分类号： G11C5/06 , H01L23/5283 , H01L27/112 , H01L27/115 , H01L27/11517
摘要： A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines.
摘要翻译：垂直非易失性存储器件被构造/制造成包括衬底，每组具有多个垂直分布的存储器晶体管的存储单元串组，使得衬底上多层的存储器，与存储器组合耦合的集成字线晶体管和字选择线的堆叠。每组的存储晶体管是一组存储单元串的晶体管，它们设置在衬底上方的相同层中。字选择线分别连接到集成字线。

6. 发明申请

US20100248439A1 Method of fabricating non-volatile memory device having vertical structure 有权
标题翻译：制造具有垂直结构的非易失性存储器件的方法
公开(公告)号：US20100248439A1
公开(公告)日：2010-09-30
申请号：US12588534
申请日：2009-10-19
申请人： Dew-Ill Chung , Han-soo Kim , Jae-hun Jeong , Jin-soo Lim , Ki-hyun Kim , Ju-young Lim
发明人： Dew-Ill Chung , Han-soo Kim , Jae-hun Jeong , Jin-soo Lim , Ki-hyun Kim , Ju-young Lim
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , G11C16/0483 , H01L27/11582
摘要： A method of fabricating a non-volatile memory device according to an example embodiment may include etching a plurality of sacrificial films and insulation films to form a plurality of first openings that expose a plurality of first portions of a semiconductor substrate. A plurality of channel layers may be formed in the plurality of first openings so as to coat the plurality of first portions of the semiconductor substrate and side surfaces of the plurality of first openings. A plurality of insulation pillars may be formed on the plurality of channel layers so as to fill the plurality of first openings. The plurality of sacrificial films and insulation films may be further etched to form a plurality of second openings that expose a plurality of second portions of the semiconductor substrate. A plurality of side openings may be formed by removing the plurality of sacrificial films. A plurality of gate dielectric films may be formed on surfaces of the plurality of side openings. A plurality of gate electrodes may be formed on the plurality of gate dielectric films so as to fill the plurality of side openings.
摘要翻译：根据示例性实施例的制造非易失性存储器件的方法可以包括蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第一部分的多个第一开口。可以在多个第一开口中形成多个沟道层，以便涂覆半导体衬底的多个第一部分和多个第一开口的侧表面。可以在多个通道层上形成多个绝缘柱，以填充多个第一开口。可以进一步蚀刻多个牺牲膜和绝缘膜以形成暴露半导体衬底的多个第二部分的多个第二开口。可以通过去除多个牺牲膜来形成多个侧开口。多个栅极电介质膜可以形成在多个侧面开口的表面上。可以在多个栅极电介质膜上形成多个栅电极，以填充多个侧开口。

7. 发明申请

US20100240209A1 SEMICONDUCTOR DEVICES INCLUDING HYDROGEN IMPLANTATION LAYERS AND METHODS OF FORMING THE SAME 审中-公开
标题翻译：包括氢植入层的半导体器件及其形成方法
公开(公告)号：US20100240209A1
公开(公告)日：2010-09-23
申请号：US12792912
申请日：2010-06-03
申请人： Jae-Hun Jeong , Ki-Nam Kim , Soon-Moon Jung , Jae-Hoon Jang
发明人： Jae-Hun Jeong , Ki-Nam Kim , Soon-Moon Jung , Jae-Hoon Jang
IPC分类号： H01L21/28
CPC分类号： H01L21/26506 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/167 , H01L29/34 , H01L29/40114 , H01L29/40117 , H01L29/7883 , H01L29/792
摘要： Provided are semiconductor devices and methods of forming the same. The semiconductor devices include a substrate further including a hydrogen implantation layer and a gate structure formed on the hydrogen implantation layer to include a first insulating layer, a charge storage layer, a second insulating layer and a conductive layer.
摘要翻译：提供半导体器件及其形成方法。半导体器件包括还包括氢注入层和在氢注入层上形成的包括第一绝缘层，电荷存储层，第二绝缘层和导电层的栅极结构的衬底。

8. 发明授权

US07795651B2 One transistor DRAM device and method of forming the same 有权
标题翻译：一种晶体管DRAM器件及其形成方法
公开(公告)号：US07795651B2
公开(公告)日：2010-09-14
申请号：US12024459
申请日：2008-02-01
申请人： Jae-Hun Jeong , Ki-Nam Kim , Soon-Moon Jung , Jae-Hoon Jang
发明人： Jae-Hun Jeong , Ki-Nam Kim , Soon-Moon Jung , Jae-Hoon Jang
IPC分类号： H01L31/112
CPC分类号： H01L27/10802 , H01L21/8221 , H01L27/0688 , H01L27/108 , H01L27/10844 , H01L27/1203 , H01L29/7841
摘要： A one transistor DRAM device includes: a substrate with an insulating layer, a first semiconductor layer provided on the insulating layer and including a first source region and a first region which are in contact with the insulating layer and a first floating body between the first source region and the first drain region, a first gate pattern to cover the first floating body, a first interlayer dielectric to cover the first gate pattern, a second semiconductor layer provided on the first interlayer dielectric and including a second source region and a second drain region which are in contact with the first interlayer dielectric and a second floating body between the second source region and the second drain region, and a second gate pattern to cover the second floating body.
摘要翻译：一个晶体管DRAM器件包括：具有绝缘层的衬底，设置在绝缘层上的第一半导体层，包括与绝缘层接触的第一源极区域和第一区域以及第一源极区域和第一漏极区域，覆盖第一浮动体的第一栅极图案，覆盖第一栅极图案的第一层间电介质，设置在第一层间电介质上并包括第二源极区域和第二漏极区域的第二半导体层其与第一层间电介质接触，第二浮动体与第二源极区和第二漏极区之间接触，第二栅极图案覆盖第二浮体。

9. 发明申请

US20090233405A1 METHODS OF FORMING NAND-TYPE NONVOLATILE MEMORY DEVICES 有权
标题翻译：形成NAND型非易失性存储器件的方法
公开(公告)号：US20090233405A1
公开(公告)日：2009-09-17
申请号：US12474896
申请日：2009-05-29
申请人： Hoo-Sung Cho , Soon-Moon Jung , Won-Seok Cho , Jong-Hyuk Kim , Jae-Hun Jeong , Jae-Hoon Jang
发明人： Hoo-Sung Cho , Soon-Moon Jung , Won-Seok Cho , Jong-Hyuk Kim , Jae-Hun Jeong , Jae-Hoon Jang
IPC分类号： H01L21/336
CPC分类号： H01L27/11524 , H01L27/0688 , H01L27/11551
摘要： Methods of forming a NAND-type nonvolatile memory device include: forming first common drains and first common sources alternatively in an active region which is defined in a semiconductor substrate and extends one direction, forming a first insulating layer covering an entire surface of the semiconductor substrate, patterning the first insulating layer to form seed contact holes which are arranged at regular distance and expose the active region, forming a seed contact structure filling each of the seed contact holes and a semiconductor layer disposed on the first insulating layer and contacting the seed contact structures, patterning the semiconductor layer to form a semiconductor pattern which extends in the one direction and is disposed over the active region, forming second common drains and second common sources disposed alternatively in the semiconductor pattern in the one direction, forming a second insulating layer covering an entire surface of the semiconductor substrate, forming a source line pattern continuously penetrating the second insulating layer, the semiconductor pattern and the first insulating layer, the source line pattern being connected with the first and second common sources, wherein a grain boundary of the semiconductor layer is positioned at a center between the one pair of seed contact structures adjacent to each other, and is positioned over the first common drain or the first common source.
摘要翻译：形成NAND型非易失性存储器件的方法包括：在半导体衬底中限定的有源区域中交替形成第一公共漏极和第一公共源，并延伸一个方向，形成覆盖半导体衬底的整个表面的第一绝缘层图案化第一绝缘层以形成以规则距离布置的暴露有源区域的种子接触孔，形成填充每个种子接触孔的种子接触结构以及设置在第一绝缘层上并接触种子接触的半导体层结构，图案化所述半导体层以形成在所述一个方向上延伸并设置在所述有源区上方的半导体图案，形成沿所述一个方向交替设置在所述半导体图案中的第二公共漏极和第二公共源，形成第二绝缘层覆盖层半导体衬底的整个表面使源极线图案连续地穿过第二绝缘层，半导体图案和第一绝缘层，源极线图案与第一和第二共用源连接，其中半导体层的晶界位于第二绝缘层之间的中心一对种子接触结构彼此相邻，并且位于第一公共漏极或第一公共源的上方。

10. 发明授权

US07554140B2 Nand-type non-volatile memory device 失效
标题翻译： Nand型非易失性存储器件
公开(公告)号：US07554140B2
公开(公告)日：2009-06-30
申请号：US11651892
申请日：2007-01-10
申请人： Hoo-Sung Cho , Soon-Moon Jung , Won-Seok Cho , Jong-Hyuk Kim , Jae-Hun Jeong , Jae-Hoon Jang
发明人： Hoo-Sung Cho , Soon-Moon Jung , Won-Seok Cho , Jong-Hyuk Kim , Jae-Hun Jeong , Jae-Hoon Jang
IPC分类号： H01L31/062
CPC分类号： H01L27/11524 , H01L27/0688 , H01L27/11551
摘要： Provided is a NAND-type nonvolatile memory device and method of forming the same. In the method, a plurality of cell layers are stacked on a semiconductor substrate. Seed contact holes for forming a semiconductor pattern included in a stacked cell are formed at regular distance. At this time, the seed contact holes are arranged such that a bit line plug or a source line pattern is disposed at a center between one pair of seed contact holes adjacent to each other.
摘要翻译：提供了一种NAND型非易失性存储器件及其形成方法。在该方法中，多个单元层层叠在半导体基板上。用于形成包含在层叠电池中的半导体图案的种子接触孔以规则的距离形成。此时，种子接触孔布置成使得位线插头或源极线图案设置在彼此相邻的一对种子接触孔之间的中心处。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式