专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US4053836A Device for transmission of information by pulse code frequency shift modulation 失效
标题翻译：用于通过脉冲码频移调制传输信息的装置
公开(公告)号：US4053836A
公开(公告)日：1977-10-11
申请号：US604196
申请日：1975-08-13
申请人： Jean Fellrath
发明人： Jean Fellrath
IPC分类号： H04L27/12 , H03L7/08 , H04L27/10 , H04L27/152 , H04B1/26 , H04L27/14
CPC分类号： H04L27/152
摘要： A device for transmission of information by pulse code frequency shift modulation. The device incorporates a phase-locked superheterodyne receiver including a single voltage controlled oscillator, and a demodulator including a phase comparator and a phase shifter. The intermediate frequency is equal to one half the input signal frequency shift. The comparator compares the phases of the intermediate frequency signal and of a signal of the same frequency derived from the voltage controlled oscillator to provide a message output.
摘要翻译：用于通过脉冲码频移调制传输信息的装置。该装置包括一个包括单个压控振荡器的锁相超外差接收器和一个包括相位比较器和移相器的解调器。中频等于输入信号频移的一半。比较器比较中频信号和从压控振荡器导出的相同频率的信号的相位，以提供消息输出。

2. 发明授权

US4532535A Electrically reprogrammable non volatile memory cell floating gate EEPROM with tunneling to substrate region 失效
标题翻译：电可重编程非易失性存储单元浮动栅极EEPROM，隧穿到衬底区域
公开(公告)号：US4532535A
公开(公告)日：1985-07-30
申请号：US408275
申请日：1982-08-16
申请人： Bernard Gerber , Jean Fellrath
发明人： Bernard Gerber , Jean Fellrath
IPC分类号： H01L27/112 , G11C5/14 , G11C16/04 , G11C16/30 , G11C17/00 , H01L21/8246 , H01L21/8247 , H01L29/788 , H01L29/792 , H01L29/78 , G11C11/40 , H01L27/04
CPC分类号： G11C16/30 , G11C16/0416 , G11C5/145 , H01L29/7883 , H01L29/7886
摘要： An electrically erasable and reprogrammable non volatile memory cell is disclosed which is implemented in CMOS polycrystalline silicon gate transistor technology and comprises a p-channel MOS transistor the gate of which forms a first portion of a floating electrode. A second portion of said floating electrode has a substantially larger surface than the two other portions and is placed on a field oxide layer. A third portion of the floating electrode is placed on an injection oxide layer which is thinner than the gate oxide layer of the transistor. A p.sup.- -doped well is formed under said third portion and is connected electrically to a write control electrode. An erase control electrode is arranged opposite the second portion of the floating electrode. The disclosed memory cell can be erased and reprogrammed through relatively low control voltages of a single polarity and these processes lead only to very small current consumption. The control voltages can thus be produced by means of a voltage multiplier which can be integrated on the same substrate and be controlled by a battery constituting the voltage supply source of the memory.
摘要翻译：公开了一种电可擦除和可重新编程的非易失性存储单元，其在CMOS多晶硅栅极晶体管技术中实现，并且包括其栅极的栅极形成浮动电极的第一部分的p沟道MOS晶体管。所述浮动电极的第二部分具有比两个其它部分大得多的表面，并且放置在场氧化物层上。浮置电极的第三部分放置在比晶体管的栅极氧化物层薄的注入氧化物层上。 p型掺杂阱形成在所述第三部分下方并且与写入控制电极电连接。擦除控制电极布置成与浮动电极的第二部分相对。所公开的存储单元可以通过相对较低的单极性控制电压被擦除和重新编程，并且这些处理仅导致非常小的电流消耗。因此，可以通过可以集成在同一基板上并由构成存储器的电压源的电池控制的电压倍增器来产生控制电压。

3. 发明授权

US4259600A Integrated insulated-gate field-effect transistor control device 失效
标题翻译：集成绝缘栅场效应晶体管控制器件
公开(公告)号：US4259600A
公开(公告)日：1981-03-31
申请号：US919320
申请日：1978-06-26
申请人： Jean Fellrath , Eric Vittoz
发明人： Jean Fellrath , Eric Vittoz
IPC分类号： H03K4/02 , G04G99/00 , G09G3/14 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/088 , H02M3/07 , H03K17/687 , H03K25/00 , H02M1/08 , G04C13/00 , H02M7/10 , H03K5/02
CPC分类号： G04G99/003 , H02M3/073
摘要： An integrated control device for controlling a device such as a LED display or a miniature stepping motor for an electronic watch comprises at least one insulated-gate field effect transistor for controlling the supply of current to the element. The gate of the F.E.T. is connected to a control circuit including a voltage multiplier comprising a series-connected chain of rectifiers and a plurality of capacitors connected between the respective junctions between rectifiers and alternate inputs. High frequency signals of opposite phase are supplied to the inputs under control of an input control signal. Circuit means are provided for starting the action of the voltage multiplier at the beginning of an input control signal and for short-circuiting the output of the control circuit at the end of an input control signal.
摘要翻译：用于控制诸如LED显示器或用于电子手表的微型步进电机的装置的集成控制装置包括至少一个用于控制对元件的电流供应的绝缘栅场效应晶体管。 F.E.T.的大门连接到包括串联连接的整流器链的电压倍增器和连接在整流器和替代输入之间的各个结之间的多个电容器的控制电路。在输入控制信号的控制下，相位相位的高频信号被提供给输入端。提供电路装置，用于在输入控制信号的开始处启动电压倍增器的动作，并在输入控制信号结束时短路控制电路的输出。

4. 发明授权

US4228534A Electronic watch control device for manual actuation 失效
标题翻译：电子手表控制装置
公开(公告)号：US4228534A
公开(公告)日：1980-10-14
申请号：US847813
申请日：1977-11-02
申请人： Jean Fellrath , Jean-Felix Perotto
发明人： Jean Fellrath , Jean-Felix Perotto
IPC分类号： G04G99/00 , G04G21/08 , H03K17/96 , G04B19/00 , G04C17/00 , H01H35/00 , H01H47/00
CPC分类号： G04G21/08 , Y10T307/766 , Y10T307/858
摘要： An electronic watch control device for manual actuation is disclosed. It comprises a capacitive sensor including a conductive layer on the inner surface of the watch-glass, which is actuated by placing a finger-tip on the outer side of the watch-glass. The sensor is part of a capacitive voltage divider to which a high frequency voltage is applied. Synchroneous detection means are arranged for detecting the high-frequency voltage drop across the sensor in synchronism with the high-frequency. Comparison means are provided for comparing the value of the said voltage drop to a reference voltage and producing a control signal depending on the condition of the sensor.
摘要翻译：公开了一种用于手动启动的电子手表控制装置。它包括电容传感器，其包括在表玻璃的内表面上的导电层，其通过在手表玻璃的外侧放置指尖而被致动。传感器是施加高频电压的电容分压器的一部分。同步检测装置用于与高频同步地检测传感器上的高频电压降。提供比较装置，用于将所述电压降的值与参考电压进行比较，并根据传感器的状况产生控制信号。

5. 发明授权

US4096444A Active integrated circuit 失效
标题翻译：主动集成电路
公开(公告)号：US4096444A
公开(公告)日：1978-06-20
申请号：US712876
申请日：1976-08-09
申请人： Jean Fellrath
发明人： Jean Fellrath
IPC分类号： H03F3/213 , H01L21/822 , H01L27/04 , H03B5/20 , H03B5/36 , H03F3/20 , H03F3/30 , H03F3/34 , H03F3/345 , H03F3/16
CPC分类号： H03B5/364 , H03F3/3001 , H03F2200/162
摘要： An active circuit is disclosed including an integrated circuit having at least one amplification stage comprising an FET. At least one negative feedback transistor is provided of the same conduction type as the amplifying transistor, with the drain-to-source path of the negative feedback transistor coupled in series between the drain and gate of the amplifying transistor. At least one biasing transistor of the same conduction type as the amplifying transistor are provided to bias the gate of the negative feedback transistor. The drain of the at least one biasing transistor is connected to a current source furnishing a current having a given ratio to the power supply current of the amplifying transistor. This circuit permits precise control of the small-signal resistance of the feedback transistor.
摘要翻译：公开了一种有源电路，包括具有至少一个包括FET的放大级的集成电路。提供与放大晶体管相同的导通类型的至少一个负反馈晶体管，负反馈晶体管的漏极 - 源极路径串联耦合在放大晶体管的漏极和栅极之间。提供与放大晶体管相同导电类型的至少一个偏置晶体管以偏置负反馈晶体管的栅极。所述至少一个偏置晶体管的漏极连接到电流源，该电流源具有与放大晶体管的电源电流具有给定比例的电流。该电路允许精确控制反馈晶体管的小信号电阻。

6. 发明授权

US4399523A Non-volatile, electrically erasable and reprogrammable memory element 失效
标题翻译：非易失性，电可擦除和可重新编程的存储元件
公开(公告)号：US4399523A
公开(公告)日：1983-08-16
申请号：US180488
申请日：1980-08-22
申请人： Bernard Gerber , Jean Fellrath
发明人： Bernard Gerber , Jean Fellrath
IPC分类号： G11C16/04 , H01L29/788 , G11C11/40
CPC分类号： G11C16/0425 , G11C16/0416 , H01L29/7886
摘要： The invention relates to non-volatile electrically erasable and reprogrammable memories produced by CMOS technology.According to the invention, each memory element comprises only a single p-channel transistor having a polycrystalline silicon floating gate capacitively coupled to a control electrode. The thicknesses of injection oxide and gate oxide are such that the element can be programmed by avalanche of the drain-substrate junction and erased by field emission of electrons from the floating gate towards the substrate.All the voltages required can be generated on the circuit of the memory from a battery voltage of 1.5 volts.
摘要翻译：本发明涉及由CMOS技术产生的非易失性电可擦除和可编程存储器。根据本发明，每个存储元件仅包括具有电容耦合到控制电极的多晶硅浮动栅极的单个p沟道晶体管。注入氧化物和栅极氧化物的厚度使得元件可以通过漏极 - 衬底结的雪崩来编程，并且通过电子从浮置栅极朝向衬底的场发射被擦除。所有电压都可以从蓄电池电压为1.5伏的电路产生。

7. 发明授权

US4237548A Electronic timepiece 失效
标题翻译：电子钟表
公开(公告)号：US4237548A
公开(公告)日：1980-12-02
申请号：US8238
申请日：1979-02-01
申请人： Jean Fellrath , Jean-Felix Perotto , Ali Schneiter , Maurice Grimm
发明人： Jean Fellrath , Jean-Felix Perotto , Ali Schneiter , Maurice Grimm
IPC分类号： G04G21/08 , H03K17/96 , G04C17/00 , G04C9/00 , G04C19/00
CPC分类号： G04G21/08 , H03K17/962
摘要： Electronic timepiece having an electro-optic passive display cell comprising an oscillator used as a time base and an electronic control circuit of its several functions. The electronic circuit is operable by means of a stationary key or switch, having a capacitive action, carried by the glass or crystal of the timepiece. The stationary key is fed by the oscillator through a fixed or non-variable condenser. A conductive element is interposed between the stationary key and the display cell, the conductive element constituting one of the electrodes of the fixed condenser. The purpose of this arrangement is to eliminate the influence of a parasitic condenser constituted by the electrodes of the display cell and the electrode of the stationary key.
摘要翻译：具有电光无源显示单元的电子钟表包括用作时基的振荡器和其几个功能的电子控制电路。电子电路可通过具有电容作用的固定键或开关操作，由手表的玻璃或晶体承载。固定键由振荡器通过固定或不可变冷凝器进给。导电元件介于固定键和显示单元之间，导电元件构成固定电容器的一个电极。这种布置的目的是消除由显示单元的电极和固定键的电极构成的寄生电容器的影响。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式