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    • 1. 发明授权
    • Near-field RFID reader antenna
    • 近场RFID阅读器天线
    • US08212679B2
    • 2012-07-03
    • US12507258
    • 2009-07-22
    • Jeong-seok KimWon-kyu ChoiGil-young ChoiJong-suk Chae
    • Jeong-seok KimWon-kyu ChoiGil-young ChoiJong-suk Chae
    • G08B13/14
    • H04Q9/00H01Q1/2216H01Q11/02H04Q2209/47
    • A near-field radio frequency identification (RFID) reader antenna is provided. The near-field RFID reader antenna is intended to separately recognize adjacent items to which a plurality of small RFID tags are attached, such as wines displayed on a shelf in a store or chip trays on casino tables, using a near field. The near-field REID reader antenna includes a dielectric layer, at least one signal line formed on the dielectric layer, a ground surface formed under the dielectric layer, at least one ground line formed under the dielectric layer to be electrically connected to the ground surface in parallel with the signal line, at least one signal stub formed to be electrically connected to the signal line toward the ground line, and at least one ground stub formed to be electrically connected to the ground line toward the signal line in parallel with the signal stub.
    • 提供了近场射频识别(RFID)阅读器天线。 近场RFID读取器天线旨在使用近场来单独识别附接有多个小RFID标签的相邻物品,例如在娱乐场桌上的商店或筹码盘中的货架上显示的葡萄酒。 近场REID读取器天线包括电介质层,形成在电介质层上的至少一条信号线,形成在电介质层下面的接地表面,形成在电介质层之下的至少一个接地线,以电连接到地表面 与信号线并联,至少一个信号短截线形成为电连接到信号线朝向接地线,以及至少一个接地短截线,其形成为与信号线电连接到信号线并与信号 存根。
    • 3. 发明申请
    • NEAR-FIELD RFID READER ANTENNA
    • 近场RFID阅读器天线
    • US20100141386A1
    • 2010-06-10
    • US12507258
    • 2009-07-22
    • Jeong-seok KIMWon-kyu ChoiGil-young ChoiJong-suk Chae
    • Jeong-seok KIMWon-kyu ChoiGil-young ChoiJong-suk Chae
    • H04B5/00H04Q5/22
    • H04Q9/00H01Q1/2216H01Q11/02H04Q2209/47
    • A near-field radio frequency identification (RFID) reader antenna is provided. The near-field RFID reader antenna is intended to separately recognize adjacent items to which a plurality of small RFID tags are attached, such as wines displayed on a shelf in a store or chip trays on casino tables, using a near field. The near-field REID reader antenna includes a dielectric layer, at least one signal line formed on the dielectric layer, a ground surface formed under the dielectric layer, at least one ground line formed under the dielectric layer to be electrically connected to the ground surface in parallel with the signal line, at least one signal stub formed to be electrically connected to the signal line toward the ground line, and at least one ground stub formed to be electrically connected to the ground line toward the signal line in parallel with the signal stub.
    • 提供了近场射频识别(RFID)阅读器天线。 近场RFID读取器天线旨在使用近场来单独识别附接有多个小RFID标签的相邻物品,例如在娱乐场桌上的商店或筹码盘中的货架上显示的葡萄酒。 近场REID读取器天线包括电介质层,形成在电介质层上的至少一条信号线,形成在电介质层下面的接地表面,形成在电介质层之下的至少一个接地线,以电连接到地表面 与信号线并联,至少一个信号短截线形成为电连接到信号线朝向接地线,以及至少一个接地短截线,其形成为与信号线电连接到信号线并与信号 存根。
    • 4. 发明申请
    • RFID READER ANTENNA AND RFID SHELF HAVING THE SAME
    • RFID阅读器天线和RFID框架
    • US20110090130A1
    • 2011-04-21
    • US12895142
    • 2010-09-30
    • Won Kyu CHOIJeong Seok KIMJi Hoon BAEGil Young CHOIJong Suk CHAE
    • Won Kyu CHOIJeong Seok KIMJi Hoon BAEGil Young CHOIJong Suk CHAE
    • H01Q13/10
    • H01Q1/2216G06K7/0008G06K7/10316H01Q13/10H01Q13/22H01Q21/08H01Q21/24
    • An RFID reader antenna including: a printed circuit board (PCB) formed as a dielectric substance; a plurality of slot groups, each having a plurality of slots, disposed on a first face of the PCB; a ground face disposed on areas, excluding the plurality of slot groups, of the first face of the PCB; and a feeder formed as a microstrip line with an open end on a second face of the PCB to feed the plurality of slot groups. Because the slots periodically formed on the ground face are fed in series by using the single microstrip line, the RFID reader antenna can reliably recognize a larger area with a simple structure. In particular, the RFID reader antenna can be useful for the bookstands for book management or smart shelves for displaying articles or goods including clothing goods in superstores or hypermarkets through the use of the ILT RFID application.
    • 一种RFID读取器天线,包括:形成为电介质的印刷电路板(PCB); 多个槽组,每个具有多个槽,设置在所述PCB的第一面上; 布置在所述PCB的第一面的除了所述多个槽组之外的区域上的接地面; 以及馈送器,其形成为在PCB的第二面上具有开口端的微带线,以馈送多个槽组。 由于通过使用单条微带线,周期性地形成在地面上的槽被串联馈送,因此RFID读取器天线可以以简单的结构可靠地识别较大的区域。 特别地,RFID阅读器天线可用于书本管理的书店或通过使用ILT RFID应用程序来显示物品或商品,包括超级市场或大型超市中的服装商品的智能货架。
    • 6. 发明授权
    • Semiconductor memory device and method of manufacturing the same
    • 半导体存储器件及其制造方法
    • US06974986B2
    • 2005-12-13
    • US10367853
    • 2003-02-19
    • Ji-soo KimJeong-seok KimKyoung-sub Shin
    • Ji-soo KimJeong-seok KimKyoung-sub Shin
    • H01L21/768H01L21/8242H01L27/108
    • H01L27/10894H01L27/10814H01L27/10852H01L27/10855H01L27/10885H01L27/10888
    • A semiconductor memory device and manufacturing method, including a bit line connector and a lower electrode connector that respectively connect a bit line and a capacitor lower electrode of the device to active areas of a semiconductor substrate. The connectors are formed using a line-type self-aligned photoresist mask pattern positioned on an interlevel dielectric layer formed on the substrate, which exposes only a portion of the dielectric layer corresponding to a source region and which extends in a direction which a gate electrode extends, to provide a misalignment margin. The bit line connector and the lower electrode connector are respectively formed by one-time mask processes. A contact hole for the bit line connector in a cell area, and a contact hole for a metal wiring plug in a peripheral area are simultaneously formed, alleviating etching burden during subsequent forming of a metal wiring pad.
    • 一种半导体存储器件和制造方法,包括分别将器件的位线和电容器下电极连接到半导体衬底的有源区的位线连接器和下电极连接器。 连接器使用位于衬底上形成的层间电介质层上的线型自对准光致抗蚀剂掩模图案形成,该掩模图案仅暴露与源极区对应的介电层的一部分,并且沿栅极电极 延伸,以提供不对准余量。 位线连接器和下电极连接器分别由一次性掩模处理形成。 同时形成用于单元区域中的位线连接器的接触孔和周边区域中的金属布线插塞的接触孔,从而减轻随后形成金属布线板期间的蚀刻负担。
    • 7. 发明授权
    • Methods of forming integrated circuit memory devices using masking layers to inhibit overetching of impurity regions and conductive lines
    • 使用掩模层形成集成电路存储器件以抑制杂质区和导电线的过蚀刻的方法
    • US06326270B1
    • 2001-12-04
    • US09419836
    • 1999-10-15
    • Kang-Yoon LeeWoo-Tag KangJeong-Seok KimYoo-Cheol Shin
    • Kang-Yoon LeeWoo-Tag KangJeong-Seok KimYoo-Cheol Shin
    • H01L21336
    • H01L21/76816H01L21/76805H01L21/76897H01L27/10888H01L27/10894H01L27/10897
    • Methods of forming integrated circuit memory devices may include steps to form memory cell access transistors therein. These steps may include steps to form a gate line on a semiconductor substrate and then implant dopants of first conductivity type into the semiconductor substrate to define a self-aligned impurity region therein. A spacer layer of a first material is then formed on a sidewall and upper surface of the gate line. An interlayer insulating layer of a second material is then formed on the spacer layer. A series of selective etching steps are then performed using different etchants. For example, a step is performed to selectively etch the interlayer insulating layer to define a contact hole therein, using the spacer layer as an etching mask to protect the gate line from etching damage. A selective etching step is then performed to convert the spacer layer into a sidewall spacer on the sidewall of the gate line. This etching step is performed using the interlayer insulating layer as an etching mask. A conductive plug (e.g., bit line plug) is then formed in the contact hole. This conductive plug forms an ohmic contact with the impurity region.
    • 形成集成电路存储器件的方法可以包括在其中形成存储单元存取晶体管的步骤。 这些步骤可以包括在半导体衬底上形成栅极线,然后将第一导电类型的掺杂剂注入到半导体衬底中以限定其中的自对准杂质区的步骤。 然后在栅极线的侧壁和上表面上形成第一材料的间隔层。 然后在间隔层上形成第二材料的层间绝缘层。 然后使用不同的蚀刻剂执行一系列选择性蚀刻步骤。 例如,使用间隔层作为蚀刻掩模来执行步骤以选择性地蚀刻层间绝缘层以限定其中的接触孔,以保护栅极线免受蚀刻损伤。 然后执行选择性蚀刻步骤以将间隔层转换成栅极线的侧壁上的侧壁间隔物。 该蚀刻步骤使用层间绝缘层作为蚀刻掩模进行。 然后在接触孔中形成导电插塞(例如,位线插头)。 该导电插塞与杂质区形成欧姆接触。
    • 8. 发明授权
    • Method for manufacturing semiconductor memory device having landing pad
    • 具有着陆垫的半导体存储器件的制造方法
    • US5622883A
    • 1997-04-22
    • US550481
    • 1995-10-30
    • Jeong-Seok Kim
    • Jeong-Seok Kim
    • H01L21/768H01L21/8242H01L27/108H01L21/70H01L27/00
    • H01L27/10852H01L21/76804
    • In manufacturing a high-integrated semiconductor memory device, there is disclosed a method for forming a trophy-shaped landing pad to a contact hole with a high aspect ratio by using a multiple-step etching process. According to the present invention, a storage node landing pad is formed by the multiple-step etching process and in different profiles via different etching processes from a bit line landing pad, thereby preventing a stringer or a bridge phenomenon occurring between the landing pads. Moreover, the trophy-shaped landing pad is formed by the multiple-step etching process, thereby securing an enough alignment margin and facilitating the manufacturing of 1 Gbit-grade DRAM by lowering the aspect ratio.
    • 在制造高集成度半导体存储器件时,公开了一种通过使用多步骤蚀刻工艺将具有高纵横比的接合孔形成奖杯状的着陆焊盘的方法。 根据本发明,通过多步蚀刻工艺形成存储节点着陆焊盘,并且通过来自位线着陆焊盘的不同蚀刻工艺,在不同的轮廓中形成存储节点着陆焊盘,从而防止在着陆焊盘之间发生桁条或桥接现象。 此外,通过多步骤蚀刻工艺形成奖杯形着陆板,从而确保足够的对准边缘,并通过降低纵横比来促进制造1Gbit级DRAM。