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    • 1. 发明授权
    • Internal voltage generator
    • 内部电压发生器
    • US08643357B2
    • 2014-02-04
    • US12974849
    • 2010-12-21
    • Jong-Ho SonSaeng-Hwan Kim
    • Jong-Ho SonSaeng-Hwan Kim
    • G05F5/00G05F1/10
    • H02M3/158G11C5/145H02M1/36H02M1/44H02M2001/008
    • A internal voltage generator includes a plurality of voltage level detection units, each configured to detect a voltage level of a corresponding internal voltage terminal, based on a predetermined target voltage level assigned to the corresponding internal voltage terminal, and generate a detection signal, a common internal voltage generation unit configured to generate an internal voltage through a pumping operation in response to the detection signal outputted from the voltage level detection units, and a path multiplexing unit configured to selectively output the internal voltage to one of the internal voltage terminals.
    • 内部电压发生器包括多个电压电平检测单元,每个电压电平检测单元被配置为基于分配给相应的内部电压端子的预定目标电压电平来检测相应的内部电压端子的电压电平,并且生成检测信号,公共 内部电压产生单元,被配置为响应于从电压电平检测单元输出的检测信号,通过泵浦操作产生内部电压;以及路径多路复用单元,被配置为选择性地将内部电压输出到内部电压端子中的一个。
    • 7. 发明授权
    • Liquid crystal display and method of fabricating the same
    • 液晶显示器及其制造方法
    • US07724333B2
    • 2010-05-25
    • US11931249
    • 2007-10-31
    • Ji-won SohnJong-ho SonSeung-beom ParkSeon-ah ChoJun-hee Na
    • Ji-won SohnJong-ho SonSeung-beom ParkSeon-ah ChoJun-hee Na
    • G02F1/1333
    • C09K19/02C09K19/54C09K19/586G02F1/133707G02F1/1393G02F2001/133742G02F2001/13775
    • A liquid crystal display (LCD) comprises a first substrate comprising a pixel electrode comprising one or more first domain-forming features and further comprising a first vertical alignment film disposed on the pixel electrode; a second substrate facing the first substrate and comprising a common electrode which comprises one or more second domain-forming features and further comprises a second vertical alignment film disposed on the common electrode; and a liquid crystal compound interposed between the first and second substrates, wherein the liquid crystal compound comprises liquid crystal molecules, ultraviolet (UV) hardening monomers and UV hardening initiators, and the liquid crystal molecules are pre-tilted to form an angle greater than 88 degrees but less than 90 degrees with respect to the first substrate when no driving power is applied to the pixel and common electrodes. Fast response time is provided in some embodiments.
    • 液晶显示器(LCD)包括:第一基板,包括包括一个或多个第一区域形成特征的像素电极,并且还包括设置在所述像素电极上的第一垂直取向膜; 面向所述第一基板的第二基板并且包括公共电极,所述公共电极包括一个或多个第二区域形成特征,并且还包括设置在所述公共电极上的第二垂直取向膜; 以及插入在第一和第二基板之间的液晶化合物,其中液晶化合物包括液晶分子,紫外(UV)硬化单体和UV固化引发剂,并且液晶分子被预倾斜以形成大于88的角度 但是当没有驱动功率施加到像素和公共电极时相对于第一基板的角度小于90度。 在一些实施例中提供了快速响应时间。
    • 9. 发明授权
    • Liquid crystal display and thin film transistor array panel therefor
    • 液晶显示器和薄膜晶体管阵列面板
    • US07652725B2
    • 2010-01-26
    • US11288246
    • 2005-11-29
    • Jung-Hee LeeYoon-Sung UmJong-Ho SonJae-Jin Lyu
    • Jung-Hee LeeYoon-Sung UmJong-Ho SonJae-Jin Lyu
    • G02F1/1343
    • G02F1/1368G02F1/13624G02F2001/134345H01L27/1255
    • A thin film transistor array panel is provided, which includes: an insulating substrate; a gate line formed on the substrate and including a gate electrode; a gate insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer opposite the gate electrode; a data line formed on the gate insulating layer and including a first source electrode located on the semiconductor layer; first and second drain electrodes formed on the semiconductor layer, separated from each other and overlapping the gate electrode; a passivation layer formed on the data line and the first and the second drain electrodes; and first and second pixel electrodes electrically connected to the first and the second drain electrodes, respectively, wherein an overlapping area between the gate electrode and the first drain electrode is different from an overlapping area between the gate electrode and the second drain electrode.
    • 提供薄膜晶体管阵列面板,其包括:绝缘基板; 形成在所述基板上并包括栅电极的栅极线; 栅极绝缘层,形成在栅极线上; 形成在与栅电极相对的栅极绝缘层上的半导体层; 形成在所述栅绝缘层上并且包括位于所述半导体层上的第一源电极的数据线; 形成在半导体层上的第一和第二漏极彼此分离并与栅电极重叠; 形成在数据线和第一和第二漏电极上的钝化层; 以及分别与第一和第二漏电极电连接的第一和第二像素电极,其中栅电极和第一漏电极之间的重叠区域与栅电极和第二漏电极之间的重叠区域不同。