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1. 发明申请

US20110027982A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110027982A1
公开(公告)日：2011-02-03
申请号：US12903465
申请日：2010-10-13
申请人： Kazuhito ICHINOSE , Akie YUTANI
发明人： Kazuhito ICHINOSE , Akie YUTANI
IPC分类号： H01L21/71
CPC分类号： H01L21/823443 , H01L21/0206 , H01L21/02063 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76895 , H01L21/76897 , H01L21/823418 , H01L21/823475 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A method of manufacturing a semiconductor device according to the present invention includes the steps of introducing first impurities of a first conductivity type into a main surface of a semiconductor substrate 1 to form a first impurity region, introducing second impurities of a second conductivity type to form a second impurity region, forming a first nickel silicide film on the first impurity region and forming a second nickel silicide film on the second impurity region, removing an oxide film formed on each of the first and second nickel silicide films by using a mixed gas having an NH3 gas and a gas containing a hydrogen element mixed therein, and forming a first conducting film on the first nickel silicide film and forming a second conducting film on the second nickel silicide film, with the oxide film removed.
摘要翻译：根据本发明的制造半导体器件的方法包括以下步骤：将第一导电类型的第一杂质引入半导体衬底1的主表面以形成第一杂质区，引入第二导电类型的第二杂质形成第二杂质区，在所述第一杂质区上形成第一硅化镍膜，在所述第二杂质区上形成第二硅化镍膜，通过使用混合气体除去形成在所述第一和第二硅化镍膜上的氧化膜， NH 3气体和含有氢元素的气体混合，在第一硅化镍膜上形成第一导电膜，在第二硅化镍膜上形成第二导电膜，除去氧化物膜。

2. 发明授权

US07834404B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07834404B2
公开(公告)日：2010-11-16
申请号：US12556003
申请日：2009-09-09
申请人： Kazuhito Ichinose , Akie Yutani
发明人： Kazuhito Ichinose , Akie Yutani
IPC分类号： H01L21/20
CPC分类号： H01L21/823443 , H01L21/0206 , H01L21/02063 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76895 , H01L21/76897 , H01L21/823418 , H01L21/823475 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A method of manufacturing a semiconductor device according to the present invention includes the steps of introducing first impurities of a first conductivity type into a main surface of a semiconductor substrate 1 to form a first impurity region, introducing second impurities of a second conductivity type to form a second impurity region, forming a first nickel silicide film on the first impurity region and forming a second nickel silicide film on the second impurity region, removing an oxide film formed on each of the first and second nickel silicide films by using a mixed gas having an NH3 gas and a gas containing a hydrogen element mixed therein, and forming a first conducting film on the first nickel silicide film and forming a second conducting film on the second nickel silicide film, with the oxide film removed.
摘要翻译：根据本发明的制造半导体器件的方法包括以下步骤：将第一导电类型的第一杂质引入半导体衬底1的主表面以形成第一杂质区，引入第二导电类型的第二杂质形成第二杂质区，在所述第一杂质区上形成第一硅化镍膜，在所述第二杂质区上形成第二硅化镍膜，通过使用混合气体除去形成在所述第一和第二硅化镍膜上的氧化膜， NH 3气体和含有氢元素的气体混合，在第一硅化镍膜上形成第一导电膜，在第二硅化镍膜上形成第二导电膜，除去氧化物膜。

3. 发明申请

US20070161218A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070161218A1
公开(公告)日：2007-07-12
申请号：US11619790
申请日：2007-01-04
申请人： Kazuhito Ichinose , Akie Yutani
发明人： Kazuhito Ichinose , Akie Yutani
IPC分类号： H01L21/265
CPC分类号： H01L21/823443 , H01L21/0206 , H01L21/02063 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76895 , H01L21/76897 , H01L21/823418 , H01L21/823475 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A method of manufacturing a semiconductor device according to the present invention includes the steps of introducing first impurities of a first conductivity type into a main surface of a semiconductor substrate 1 to form a first impurity region, introducing second impurities of a second conductivity type to form a second impurity region, forming a first nickel silicide film on the first impurity region and forming a second nickel silicide film on the second impurity region, removing an oxide film formed on each of the first and second nickel silicide films by using a mixed gas having an NH3 gas and a gas containing a hydrogen element mixed therein, and forming a first conducting film on the first nickel silicide film and forming a second conducting film on the second nickel silicide film, with the oxide film removed.
摘要翻译：根据本发明的制造半导体器件的方法包括以下步骤：将第一导电类型的第一杂质引入半导体衬底1的主表面以形成第一杂质区，引入第二导电类型的第二杂质形成第二杂质区，在所述第一杂质区上形成第一硅化镍膜，在所述第二杂质区上形成第二硅化镍膜，通过使用混合气体除去形成在所述第一和第二硅化镍膜上的氧化膜， NH 3气体和含有氢元素的气体混合，并在第一硅化镍膜上形成第一导电膜，并在第二硅化镍膜上形成第二导电膜，氧化膜删除。

4. 发明授权

US07179737B2 Semiconductor device and a method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07179737B2
公开(公告)日：2007-02-20
申请号：US10901990
申请日：2004-07-30
申请人： Akio Nishida , Kazuhito Ichinose , Hiraku Chakihara
发明人： Akio Nishida , Kazuhito Ichinose , Hiraku Chakihara
IPC分类号： H01L21/4763
CPC分类号： H01L27/11 , H01L21/76838 , H01L27/10855 , H01L27/10888
摘要： In a semiconductor device, the ohmic contact at the junction between the metal interconnection and the semiconductor layer is lowered by depositing a first conductor layer comprised of, for example, tungsten nitride and a second conductor layer comprised of, for example, tungsten silicide successively from the lower layer so as to cover the upper surface of intermediate conductive layers comprised of a metal, for example, tungsten as a main interconnection material, subsequently introducing an impurity, for example, boron (b) to the second conductor layer, then patterning the first and the second conductor layers thereby forming a conductor layer, and then forming a lower semiconductor layer comprised of, for example, polycrystal silicon for forming a semiconductor region for source and drain of load MISFET of SRAM so as to be in contact with the conductor layer.
摘要翻译：在半导体器件中，金属互连和半导体层之间的结处的欧姆接触通过从例如钨氮化物构成的第一导体层和由例如硅化钨组成的第二导体层从下层，以覆盖由金属构成的中间导电层的上表面，例如钨作为主互连材料，随后将杂质（例如硼（b））引入第二导体层，然后将第一和第二导体层由此形成导体层，然后形成由例如多晶硅构成的下半导体层，以形成用于SRAM的负载MISFET的源极和漏极的半导体区域，以便与导体层。

5. 发明授权

US08685854B2 Method of forming a via in a semiconductor device 有权
标题翻译：在半导体器件中形成通孔的方法
公开(公告)号：US08685854B2
公开(公告)日：2014-04-01
申请号：US13046331
申请日：2011-03-11
申请人： Kazuhito Ichinose , Kotaro Kihara , Tatsunori Murata
发明人： Kazuhito Ichinose , Kotaro Kihara , Tatsunori Murata
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L21/76831 , H01L23/481 , H01L2224/16 , H01L2924/13091 , H01L2924/00
摘要： A process for burying a tungsten member into a blind hole formed in a wafer, in which blind hole a through via is to be made. Film-formation (for forming the tungsten member) is carried out to position, at the periphery of the wafer, the outer circumference of the tungsten member inside the outer circumference of a barrier metal beneath the tungsten film. This process makes it possible to bury the tungsten member, which may be relatively thin, into the blind hole, which may be relatively large, so as to decrease a warp of the wafer and further prevent an underlying layer beneath the tungsten member from being peeled at the periphery of the wafer.
摘要翻译：将钨构件埋入形成在要形成盲孔贯通孔的晶片中的盲孔中的工序。在晶片周围进行成膜（用于形成钨构件），在钨膜下方的阻挡金属的外周的钨构件的外周部位置。该方法使得可以将可能相对较薄的钨构件埋入可能相对较大的盲孔中，以减少晶片的翘曲，并进一步防止钨构件下方的下层被剥离在晶片的周边。

6. 发明授权

US08158473B2 Method for manufacturing a semiconductor device having a silicide region comprised of a silicide of a nickel alloy 有权
标题翻译：具有由镍合金的硅化物构成的硅化物区域的半导体器件的制造方法
公开(公告)号：US08158473B2
公开(公告)日：2012-04-17
申请号：US12698556
申请日：2010-02-02
申请人： Kazuhito Ichinose , Yukari Imai
发明人： Kazuhito Ichinose , Yukari Imai
IPC分类号： H01L21/8238 , H01L21/4763 , H01L21/44
CPC分类号： H01L21/823835 , H01L21/02063 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76855 , H01L21/76856 , H01L21/823814 , H01L21/823871 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： To provide a semiconductor device which can reduce an electrical resistance between a plug and a silicide region, and a manufacturing method thereof. At least one semiconductor element having a silicide region, is formed over a semiconductor substrate. An interlayer insulating film is formed over the silicide region. A through hole having an inner surface including a bottom surface comprised of the silicide regions is formed in the interlayer insulating film. A Ti(titanium) film covering the inner surface of the hole is formed by a chemical vapor deposition method. At least a surface of the Ti film is nitrided so as to form a barrier metal film covering the inner surface. A plug is formed to fill the through hole via the barrier metal film.
摘要翻译：提供能够降低插塞与硅化物区域之间的电阻的半导体装置及其制造方法。在半导体衬底上形成具有硅化物区域的至少一个半导体元件。在硅化物区域上形成层间绝缘膜。在层间绝缘膜中形成具有包括由硅化物区域构成的底面的内表面的通孔。通过化学气相沉积法形成覆盖孔内表面的Ti（钛）膜。至少将Ti膜的表面氮化，以形成覆盖内表面的阻挡金属膜。形成插塞以通过阻挡金属膜填充通孔。

7. 发明申请

US20100200928A1 SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100200928A1
公开(公告)日：2010-08-12
申请号：US12698556
申请日：2010-02-02
申请人： Kazuhito ICHINOSE , Yukari Imai
发明人： Kazuhito ICHINOSE , Yukari Imai
IPC分类号： H01L23/48 , H01L21/768 , H01L27/088 , H01L27/092
CPC分类号： H01L21/823835 , H01L21/02063 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76855 , H01L21/76856 , H01L21/823814 , H01L21/823871 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： To provide a semiconductor device which can reduce an electrical resistance between a plug and a silicide region, and a manufacturing method thereof. At least one semiconductor element having a silicide region, is formed over a semiconductor substrate. An interlayer insulating film is formed over the silicide region. A through hole having an inner surface including a bottom surface comprised of the silicide regions is formed in the interlayer insulating film. A Ti(titanium) film covering the inner surface of the hole is formed by a chemical vapor deposition method. At least a surface of the Ti film is nitrided so as to form a barrier metal film covering the inner surface. A plug is formed to fill the through hole via the barrier metal film.
摘要翻译：提供能够降低插塞与硅化物区域之间的电阻的半导体装置及其制造方法。在半导体衬底上形成具有硅化物区域的至少一个半导体元件。在硅化物区域上形成层间绝缘膜。在层间绝缘膜中形成具有包括由硅化物区域构成的底面的内表面的通孔。通过化学气相沉积法形成覆盖孔内表面的Ti（钛）膜。至少将Ti膜的表面氮化，以形成覆盖内表面的阻挡金属膜。形成插塞以通过阻挡金属膜填充通孔。

8. 发明授权

US07598171B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07598171B2
公开(公告)日：2009-10-06
申请号：US11619790
申请日：2007-01-04
申请人： Kazuhito Ichinose , Akie Yutani
发明人： Kazuhito Ichinose , Akie Yutani
IPC分类号： H01L21/44
CPC分类号： H01L21/823443 , H01L21/0206 , H01L21/02063 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76895 , H01L21/76897 , H01L21/823418 , H01L21/823475 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A method of manufacturing a semiconductor device according to the present invention includes the steps of introducing first impurities of a first conductivity type into a main surface of a semiconductor substrate 1 to form a first impurity region, introducing second impurities of a second conductivity type to form a second impurity region, forming a first nickel silicide film on the first impurity region and forming a second nickel silicide film on the second impurity region, removing an oxide film formed on each of the first and second nickel silicide films by using a mixed gas having an NH3 gas and a gas containing a hydrogen element mixed therein, and forming a first conducting film on the first nickel silicide film and forming a second conducting film on the second nickel silicide film, with the oxide film removed.
摘要翻译：根据本发明的制造半导体器件的方法包括以下步骤：将第一导电类型的第一杂质引入半导体衬底1的主表面以形成第一杂质区，引入第二导电类型的第二杂质形成第二杂质区，在所述第一杂质区上形成第一硅化镍膜，在所述第二杂质区上形成第二硅化镍膜，通过使用混合气体除去形成在所述第一和第二硅化镍膜上的氧化膜， NH 3气体和含有氢元素的气体混合，在第一硅化镍膜上形成第一导电膜，在第二硅化镍膜上形成第二导电膜，除去氧化物膜。

9. 发明授权

US08344511B2 Method for manufacturing a semiconductor device having a silicide region comprised of a silicide of a nickel alloy 有权
标题翻译：具有由镍合金的硅化物构成的硅化物区域的半导体器件的制造方法
公开(公告)号：US08344511B2
公开(公告)日：2013-01-01
申请号：US13414438
申请日：2012-03-07
申请人： Kazuhito Ichinose , Yukari Imai
发明人： Kazuhito Ichinose , Yukari Imai
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/823835 , H01L21/02063 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76855 , H01L21/76856 , H01L21/823814 , H01L21/823871 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： To provide a semiconductor device which can reduce an electrical resistance between a plug and a silicide region, and a manufacturing method thereof. At least one semiconductor element having a silicide region, is formed over a semiconductor substrate. An interlayer insulating film is formed over the silicide region. A through hole having an inner surface including a bottom surface comprised of the silicide regions is formed in the interlayer insulating film. A Ti (titanium) film covering the inner surface of the hole is formed by a chemical vapor deposition method. At least a surface of the Ti film is nitrided so as to forma barrier metal film covering the inner surface. A plug is formed to fill the through hole via the barrier metal film.
摘要翻译：提供能够降低插塞与硅化物区域之间的电阻的半导体装置及其制造方法。在半导体衬底上形成具有硅化物区域的至少一个半导体元件。在硅化物区域上形成层间绝缘膜。在层间绝缘膜中形成具有包括由硅化物区域构成的底面的内表面的通孔。通过化学气相沉积法形成覆盖孔内表面的Ti（钛）膜。至少将Ti膜的表面氮化，形成覆盖内表面的阻挡金属膜。形成插塞以通过阻挡金属膜填充通孔。

10. 发明申请

US20120161244A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A SILICIDE REGION COMPRISED OF A SILICIDE OF A NICKEL ALLOY 有权
标题翻译：制造具有镍合金硅酸盐的硅化物区域的半导体器件的制造方法
公开(公告)号：US20120161244A1
公开(公告)日：2012-06-28
申请号：US13414438
申请日：2012-03-07
申请人： Kazuhito ICHINOSE , Yukari Imai
发明人： Kazuhito ICHINOSE , Yukari Imai
IPC分类号： H01L27/092
CPC分类号： H01L21/823835 , H01L21/02063 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76855 , H01L21/76856 , H01L21/823814 , H01L21/823871 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： To provide a semiconductor device which can reduce an electrical resistance between a plug and a silicide region, and a manufacturing method thereof. At least one semiconductor element having a silicide region, is formed over a semiconductor substrate. An interlayer insulating film is formed over the silicide region. A through hole having an inner surface including a bottom surface comprised of the silicide regions is formed in the interlayer insulating film. A Ti (titanium) film covering the inner surface of the hole is formed by a chemical vapor deposition method. At least a surface of the Ti film is nitrided so as to forma barrier metal film covering the inner surface. A plug is formed to fill the through hole via the barrier metal film.
摘要翻译：提供能够降低插塞与硅化物区域之间的电阻的半导体装置及其制造方法。在半导体衬底上形成具有硅化物区域的至少一个半导体元件。在硅化物区域上形成层间绝缘膜。在层间绝缘膜中形成具有包括由硅化物区域构成的底面的内表面的通孔。通过化学气相沉积法形成覆盖孔内表面的Ti（钛）膜。至少将Ti膜的表面氮化，形成覆盖内表面的阻挡金属膜。形成插塞以通过阻挡金属膜填充通孔。

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