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1. 发明授权

US08939079B2 First printing plate and second printing plate 有权
标题翻译：第一印版和第二印版
公开(公告)号：US08939079B2
公开(公告)日：2015-01-27
申请号：US13300689
申请日：2011-11-21
申请人： Joo Yeon Kim , Kyu-Ha Baek , Lee Mi Do , Ji Man Park , Kunsik Park , Zin Sig Kim , Dong-Pyo Kim , Ye Sul Jeong
发明人： Joo Yeon Kim , Kyu-Ha Baek , Lee Mi Do , Ji Man Park , Kunsik Park , Zin Sig Kim , Dong-Pyo Kim , Ye Sul Jeong
IPC分类号： B41N1/00 , B29D11/00 , G02B5/08
CPC分类号： B41N1/00 , B29D11/00596 , G02B5/0816 , Y10T29/49
摘要： Disclosed are a printing plate and a mirror thereof, the printing plate including: printing portions for transferring an immersed solution, the printing portions being formed flat and arranged at regular intervals on one side of an upper part of the printing plate; and non-printing portions corresponding to a remaining area other than the printing portions, the non-printing portions being formed with at least two concavities and convexities respectively and arranged at regular intervals on the other side of the upper part of the printing plate.
摘要翻译：公开了一种印版及其反射镜，印版包括：用于转印浸液的印刷部分，印刷部分在印版的上部一侧上以规则的间隔形成为平坦的; 以及对应于除了印刷部分之外的其余区域的非印刷部分，非印刷部分分别形成有至少两个凹凸，并且在印版的上部的另一侧上以规则的间隔布置。

2. 发明申请

US20120168723A1 ELECTRONIC DEVICES INCLUDING GRAPHENE AND METHODS OF FORMING THE SAME 审中-公开
标题翻译：包括石墨的电子设备及其形成方法
公开(公告)号：US20120168723A1
公开(公告)日：2012-07-05
申请号：US13335709
申请日：2011-12-22
申请人： Kunsik PARK
发明人： Kunsik PARK
IPC分类号： H01L29/16 , H01L21/20 , B82Y40/00
CPC分类号： H01L21/0237 , B82Y10/00 , H01L21/02491 , H01L21/02527 , H01L21/02639 , H01L21/02645 , H01L29/1606 , H01L29/42384 , H01L29/66045 , H01L29/66742 , H01L29/66795 , H01L29/785 , H01L29/78684
摘要： Methods of forming a graphene layer are provided. The method includes sequentially forming a seed layer and a protection layer on a substrate, patterning the protection layer and the seed layer to form a protection pattern and a seed pattern having a first length in a first direction and a second length in a second direction perpendicular to the first direction, and forming a graphene material on at least one of both sidewalls of the seed pattern. The second length is greater than the first length. Related devices are also provided.
摘要翻译：提供形成石墨烯层的方法。该方法包括在衬底上顺序地形成种子层和保护层，图案化保护层和种子层以形成保护图案和在第一方向上具有第一长度的第二长度的第二长度的第二长度和垂直于第二方向的第二长度并且在种子图案的两个侧壁中的至少一个上形成石墨烯材料。第二长度大于第一长度。还提供了相关设备。

3. 发明申请

US20110104322A1 TEMPLATES USED FOR NANOIMPRINT LITHOGRAPHY AND METHODS FOR FABRICATING THE SAME 审中-公开
标题翻译：用于纳米压印的模板及其制作方法
公开(公告)号：US20110104322A1
公开(公告)日：2011-05-05
申请号：US12763380
申请日：2010-04-20
申请人： Kunsik PARK , Dong-Pyo Kim , Ji Man Park , Kyu-Ha Baek , Lee-Mi Do
发明人： Kunsik PARK , Dong-Pyo Kim , Ji Man Park , Kyu-Ha Baek , Lee-Mi Do
IPC分类号： B28B11/08 , B05D3/10
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： Provided are a template used for nanoimprint lithography and a method for fabricating the same. A raised first deposition layer pattern including at least one downwardly sloped side surface is formed on a substrate. A second deposition layer pattern covering the side surface of the raised first deposition layer pattern and progressively decreasing in width downward along the side surface of the raised first deposition layer pattern is formed. A third deposition layer is formed on the entire surface of a structure on which the second deposition layer pattern. A second deposition layer nano pattern between the raised first deposition layer pattern and a planarized third deposition layer is formed by planarizing the third deposition layer to expose upper surfaces of the raised first deposition layer pattern and the second deposition layer pattern. An intaglio nano pattern defined by side surfaces sloped downward from upper surfaces of the raised first deposition layer pattern and the planarized third deposition layer to the surface of the substrate is formed by removing the second deposition layer nano pattern.
摘要翻译：提供了用于纳米压印光刻的模板及其制造方法。在衬底上形成包括至少一个向下倾斜的侧表面的升高的第一沉积层图案。形成覆盖凸起的第一沉积层图案的侧表面并且沿着凸起的第一沉积层图案的侧表面沿着宽度逐渐减小的第二沉积层图案。第三沉积层形成在其上具有第二沉积层图案的结构的整个表面上。在凸起的第一沉积层图案和平坦化的第三沉积层之间的第二沉积层纳米图案通过平坦化第三沉积层以暴露升高的第一沉积层图案和第二沉积层图案的上表面而形成。通过去除第二沉积层纳米图案，形成由从凸起的第一沉积层图案的上表面向下倾斜的侧表面和平坦化的第三沉积层到基板的表面限定的凹版纳米图案。

4. 发明授权

US08404588B2 Method of manufacturing via electrode 有权
标题翻译：通孔电极的制造方法
公开(公告)号：US08404588B2
公开(公告)日：2013-03-26
申请号：US13267215
申请日：2011-10-06
申请人： Dong-Pyo Kim , Kyu-Ha Baek , Kunsik Park , Ji Man Park , Zin Sig Kim , Joo Yeon Kim , Ye Sul Jeong , Lee-Mi Do
发明人： Dong-Pyo Kim , Kyu-Ha Baek , Kunsik Park , Ji Man Park , Zin Sig Kim , Joo Yeon Kim , Ye Sul Jeong , Lee-Mi Do
IPC分类号： H01L21/44
CPC分类号： B82Y40/00 , B82Y30/00 , H01L21/288 , H01L21/76898 , H01L2924/0002 , H01L2924/00
摘要： Provided is a method of manufacturing a via electrode by which productivity and production yield can be augmented or maximized. The method of the present invention includes: forming a via hole at a substrate; forming a catalyst layer at a sidewall and a bottom of the via hole; and forming a graphene layer in the via hole by exposing the catalyst layer to a solution mixed with graphene particles.
摘要翻译：提供一种制造通孔电极的方法，通过该方法可以增加或最大化生产率和产量。本发明的方法包括：在基板上形成通孔; 在所述通孔的侧壁和底部形成催化剂层; 以及通过将催化剂层暴露于与石墨烯颗粒混合的溶液而在通孔中形成石墨烯层。

5. 发明申请

US20120086132A1 METHOD OF MANUFACTURING VIA ELECTRODE 有权
标题翻译：通过电极制造的方法
公开(公告)号：US20120086132A1
公开(公告)日：2012-04-12
申请号：US13267215
申请日：2011-10-06
申请人： Dong-Pyo Kim , Kyu-Ha Baek , Kunsik Park , Ji Man Park , Zin Sig Kim , Joo Yeon Kim , Ye Sul Jeong , Lee-Mi Do
发明人： Dong-Pyo Kim , Kyu-Ha Baek , Kunsik Park , Ji Man Park , Zin Sig Kim , Joo Yeon Kim , Ye Sul Jeong , Lee-Mi Do
IPC分类号： H01L23/48 , H01L21/02 , H01L21/768 , B82Y40/00 , B82Y99/00
CPC分类号： B82Y40/00 , B82Y30/00 , H01L21/288 , H01L21/76898 , H01L2924/0002 , H01L2924/00
摘要： Provided is a method of manufacturing a via electrode by which productivity and production yield can be augmented or maximized. The method of the present invention includes: forming a via hole at a substrate; forming a catalyst layer at a sidewall and a bottom of the via hole; and forming a graphene layer in the via hole by exposing the catalyst layer to a solution mixed with graphene particles.
摘要翻译：提供一种制造通孔电极的方法，通过该方法可以增加或最大化生产率和产量。本发明的方法包括：在基板上形成通孔; 在通孔的侧壁和底部形成催化剂层; 以及通过将催化剂层暴露于与石墨烯颗粒混合的溶液而在通孔中形成石墨烯层。

6. 发明申请

US20120056331A1 METHODS OF FORMING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICES FORMED BY THE SAME 审中-公开
标题翻译：形成半导体器件的方法和由其形成的半导体器件
公开(公告)号：US20120056331A1
公开(公告)日：2012-03-08
申请号：US13226421
申请日：2011-09-06
申请人： Kunsik Park
发明人： Kunsik Park
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76898
摘要： Provided are a method of forming a semiconductor device including a via and a semiconductor device formed by the same. In the method, by forming an unseeded layer that covers a seed layer disposed on a substrate and at a side wall of a via hole, exposes the seed layer disposed at a bottom of the via hole, and cannot serve as a seed, a plated layer configuring the via is formed upward from the seed layer in a bottom-up growth process, and thus, a void is not formed. Also, an inlet of the via hole is not blocked by using the bottom-up growth process, and thus, an electroplating speed can increase, thereby shortening a time taken in filling the via hole with a metal.
摘要翻译：提供一种形成半导体器件的方法，该半导体器件包括通孔和由其形成的半导体器件。在该方法中，通过形成覆盖设置在基板上的种子层和通路孔的侧壁的未密封层，露出设置在通孔底部的种子层，不能作为种子，镀层在自底向上生长过程中从种子层向上形成构造通孔的层，因此不形成空隙。而且，通过使用自底向上生长工艺，通孔的入口不会被阻挡，因此电镀速度可以增加，从而缩短了用金属填充通孔所花费的时间。

7. 发明授权

US07998862B2 Method for fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07998862B2
公开(公告)日：2011-08-16
申请号：US12689344
申请日：2010-01-19
申请人： Kunsik Park , Kyu-Ha Baek , Lee-Mi Do , Dong-Pyo Kim , Ji Man Park
发明人： Kunsik Park , Kyu-Ha Baek , Lee-Mi Do , Dong-Pyo Kim , Ji Man Park
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/76898 , H01L21/2885
摘要： A method of fabricating a semiconductor device includes forming a via hole in a semiconductor substrate, forming an isolation layer on an inner side of the via hole, forming a diffusion barrier layer over an upper portion of the semiconductor substrate and the inner side of the via hole where the isolation layer is formed, arranging a solvent, which contains electrically charged metal particles, on the semiconductor substrate where the diffusion barrier layer is formed, and filling the via hole with the metal particles by moving the metal particles using applied external force. The applied external force said includes a voltage causing an electric current to flow between the semiconductor substrate and the solvent, an electrical field applied between the semiconductor substrate and the solvent, or a magnetic field applied between the semiconductor substrate and the solvent.
摘要翻译：一种制造半导体器件的方法包括在半导体衬底中形成通孔，在通孔的内侧形成隔离层，在半导体衬底的上部和通孔的内侧形成扩散阻挡层形成隔离层的孔，在形成有扩散阻挡层的半导体衬底上布置含有带电荷的金属颗粒的溶剂，并通过使用外力移动金属颗粒来填充通孔。所施加的外力包括导致电流在半导体衬底和溶剂之间流动的电压，施加在半导体衬底和溶剂之间的电场或施加在半导体衬底和溶剂之间的磁场。

8. 发明申请

US20120140350A1 PRINTING PLATE AND MIRROR THEREOF 有权
标题翻译：印版及其镜像
公开(公告)号：US20120140350A1
公开(公告)日：2012-06-07
申请号：US13300689
申请日：2011-11-21
申请人： Joo Yeon Kim , Kyu-Ha Baek , Lee Mi Do , Ji Man Park , Kunsik Park , Zin Sig Kim , Dong-Pyo Kim , Ye Sul Jeong
发明人： Joo Yeon Kim , Kyu-Ha Baek , Lee Mi Do , Ji Man Park , Kunsik Park , Zin Sig Kim , Dong-Pyo Kim , Ye Sul Jeong
IPC分类号： B41N1/12 , G02B5/08 , B23P17/00
CPC分类号： B41N1/00 , B29D11/00596 , G02B5/0816 , Y10T29/49
摘要： Disclosed are a printing plate and a mirror thereof, the printing plate including: printing portions for transferring an immersed solution, the printing portions being formed flat and arranged at regular intervals on one side of an upper part of the printing plate; and non-printing portions corresponding to a remaining area other than the printing portions, the non-printing portions being formed with at least two concavities and convexities respectively and arranged at regular intervals on the other side of the upper part of the printing plate.
摘要翻译：公开了一种印版及其反射镜，印版包括：用于转印浸液的印刷部分，印刷部分在印版的上部一侧上以规则的间隔形成为平坦的; 以及对应于除了印刷部分之外的其余区域的非印刷部分，非印刷部分分别形成有至少两个凹凸，并且在印版的上部的另一侧上以规则的间隔布置。

9. 发明申请

US20120137907A1 INTAGLIO PRINTING PLATE INCLUDING SUPPLEMENTARY PATTERN AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：包括补充图案的INTLLIO印刷版及其制作方法
公开(公告)号：US20120137907A1
公开(公告)日：2012-06-07
申请号：US13310551
申请日：2011-12-02
申请人： Ye Sul JEONG , Kyu-Ha Baek , Lee-Mi Do , Ji Man Park , Kunsik Park , Dong-Pyo Kim , Zin Sig Kim , Joo Yeon Kim
发明人： Ye Sul JEONG , Kyu-Ha Baek , Lee-Mi Do , Ji Man Park , Kunsik Park , Dong-Pyo Kim , Zin Sig Kim , Joo Yeon Kim
IPC分类号： B41N1/06
CPC分类号： B41N1/00 , B41M1/10 , B41N1/06
摘要： Disclosed is an intaglio printing plate including: a pattern portion where a to-be-printed pattern is located; a non-pattern portion corresponding to a remaining area other than the pattern portion; and a supplementary pattern portion having a repetitive pattern with a predetermined form, wherein at least a part of the pattern portion is divided by a pattern structure that is formed by the supplementary pattern portion.
摘要翻译：公开了一种凹版印刷版，其包括：图案部分，其中定位有待印刷图案; 对应于图案部分以外的剩余区域的非图案部分; 以及具有预定形式的重复图案的辅助图案部分，其中图案部分的至少一部分被由辅助图案部分形成的图案结构划分。

10. 发明申请

US20110136338A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20110136338A1
公开(公告)日：2011-06-09
申请号：US12689344
申请日：2010-01-19
申请人： Kunsik Park , Kyu-Ha Baek , Lee-Mi Do , Dong-Pyo Kim , Ji Man Park
发明人： Kunsik Park , Kyu-Ha Baek , Lee-Mi Do , Dong-Pyo Kim , Ji Man Park
IPC分类号： H01L21/768
CPC分类号： H01L21/76898 , H01L21/2885
摘要： A method of fabricating a semiconductor device includes forming a via hole in a semiconductor substrate, forming an isolation layer on an inner side of the via hole, forming a diffusion barrier layer over an upper portion of the semiconductor substrate and the inner side of the via hole where the isolation layer is formed, arranging a solvent, which contains electrically charged metal particles, on the semiconductor substrate where the diffusion barrier layer is formed, and filling the via hole with the metal particles by moving the metal particles using applied external force. The applied external force said includes a voltage causing an electric current to flow between the semiconductor substrate and the solvent, an electrical field applied between the semiconductor substrate and the solvent, or a magnetic field applied between the semiconductor substrate and the solvent.
摘要翻译：一种制造半导体器件的方法包括在半导体衬底中形成通孔，在通孔的内侧形成隔离层，在半导体衬底的上部和通孔的内侧形成扩散阻挡层形成隔离层的孔，在形成有扩散阻挡层的半导体衬底上布置含有带电荷的金属颗粒的溶剂，并通过使用外力移动金属颗粒来填充通孔。所施加的外力包括导致电流在半导体衬底和溶剂之间流动的电压，施加在半导体衬底和溶剂之间的电场或施加在半导体衬底和溶剂之间的磁场。

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