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    • 2. 发明授权
    • Multi-port static random access memory
    • 多端口静态随机存取存储器
    • US07038926B2
    • 2006-05-02
    • US10495624
    • 2002-06-25
    • Seong-Ik JeongKyung-Yul Kim
    • Seong-Ik JeongKyung-Yul Kim
    • G11C5/06
    • H01L27/11G11C8/16H01L27/1104
    • A multi-port static random access memory for reducing an occupation area of a layout memory cells on a substrate having the improvements from a first plurality of metal electrode layers on a first plurality of active regions included in one unit cell and in other unit cell neighbored to the corresponding one unit cell of the first plurality of metal electrode layers being commonly connected to the power supply source, comprises: a second plurality of the metal electrode layers on second plurality of the active regions and to be independently and separately connected to the power supply source, by every one unit cell in cell array.
    • 一种多端口静态随机存取存储器,用于减少基板上的布局存储单元的占用面积,所述基板具有在包括在一个单位单元中的第一多个有源区域上的第一多个金属电极层和邻近的其它单位单元中的第一多个金属电极层的改进 所述第一多个金属电极层的相应一个单元电池共同连接到所述电源,包括:第二多个所述有源区域上的第二多个所述金属电极层,并且独立且分开地连接到所述电源 供电源,由单元阵列中的每一个单元电池组成。
    • 3. 发明授权
    • Voltage stabilizing circuit and display apparatus having the same
    • 稳压电路及其显示装置
    • US08159488B2
    • 2012-04-17
    • US12411535
    • 2009-03-26
    • Kyung-Yul Kim
    • Kyung-Yul Kim
    • G06F3/038
    • G09G3/3696G09G3/3648G09G2330/02
    • A display apparatus includes a display panel, a printed circuit board, a data driver and a gate driver. The data driver includes a digital processor and an analog processor, and receives image data and a data control signal to provide the display panel with a data signal. The printed circuit board includes a first voltage interconnection which supplies a first source supply voltage to the digital processor of the data driver, and a second voltage interconnection electrically isolated from the first voltage interconnection and which supplies a second source supply voltage to the analog processor of the data driver.
    • 显示装置包括显示面板,印刷电路板,数据驱动器和门驱动器。 数据驱动器包括数字处理器和模拟处理器,并且接收图像数据和数据控制信号以向显示面板提供数据信号。 印刷电路板包括将第一源电源电压提供给数据驱动器的数字处理器的第一电压互连和与第一电压互连电隔离的第二电压互连,并将第二源电源电压提供给模拟处理器 数据驱动。
    • 5. 发明授权
    • Non-overlaping signal generation circuit
    • 非重叠信号发生电路
    • US5652535A
    • 1997-07-29
    • US568218
    • 1995-12-06
    • Kyung Yul KimJong Hoon Park
    • Kyung Yul KimJong Hoon Park
    • G11C11/41G11C8/18H03K5/1534H03K17/00H03K5/15
    • G11C8/18H03K5/1534
    • A non-overlapping signal generation circuit comprising a NOR gate for NORing a chip select signal and an address signal, an inverter for inverting an output signal from the NOR gate, a first inversion circuit for sequentially inverting an output signal from the inverter by an odd number of times, a second inversion circuit for sequentially inverting the output signal from the inverter by an even number of times, an address transition detector for generating an address transition detect signal in response to the output signal from the inverter, and a non-overlapping signal generator for generating an enable signal and a disable signal in response to the address transition detect signal from the address transition detector and output signals from the first and second inversion circuits, the enable signal and the disable signal non-overlapping with each other. According to the present invention, the enable signal and the disable signal can be generated with their high levels accurately non-overlapping with each other for an active pulse duration of the address transition detect signal.
    • 一种非重叠信号发生电路,包括用于对芯片选择信号进行NOR调制的NOR门和地址信号,用于反相来自或非门的输出信号的反相器,用于将来自逆变器的输出信号顺序反相奇异的第一反相电路 次数,用于将来自逆变器的输出信号顺序地反相偶数次的第二反相电路,用于响应于来自反相器的输出信号产生地址转变检测信号的地址转换检测器,以及不重叠的 信号发生器,用于响应于来自地址转换检测器的地址转换检测信号产生使能信号和禁止信号,并输出来自第一和第二反相电路的信号,使能信号和禁止信号彼此不重叠。 根据本发明,对于地址转换检测信号的有效脉冲持续时间,可以产生其使能信号和禁用信号,其高电平彼此准确地不重叠。
    • 6. 发明授权
    • Complex button assembly and portable multimedia device using the same
    • 复合按钮组合和便携式多媒体设备使用相同
    • US07812271B2
    • 2010-10-12
    • US11605285
    • 2006-11-29
    • Seok Woo LeeKyung Yul Kim
    • Seok Woo LeeKyung Yul Kim
    • H01H9/00
    • G06F3/0362
    • A complex button assembly and a portable multimedia device using the same. The complex button assembly is installed to an upper end of a case which defines an external appearance of the portable multimedia device. The complex button assembly is provided with a plurality of buttons to receive information on an operating state of the multimedia device. The complex button assembly is installed to face upwardly on the upper surface of the case or rearwardly and upwardly on the upper surface of the case such that a user can easily operate the portable multimedia device. In the complex button assembly, a button body having first and second button units is installed in a penetration portion of a button frame. A jog window is further formed in a middle portion of the button body in which a jog button is installed.
    • 复合按钮组件和使用其的便携式多媒体装置。 复合按钮组件被安装到限定便携式多媒体设备的外观的外壳的上端。 复合按钮组件设置有多个按钮,用于接收关于多媒体设备的操作状态的信息。 复合按钮组件被安装成在壳体的上表面上面向上或者在壳体的上表面上向上和向上安装,使得用户可以容易地操作便携式多媒体设备。 在复合按钮组件中,具有第一和第二按钮单元的按钮主体安装在按钮框架的穿透部分中。 在按钮体的中间部分进一步形成点动窗,其中安装有点动按钮。
    • 8. 发明授权
    • Wire control circuit and method
    • 写控制电路和方法
    • US5818767A
    • 1998-10-06
    • US895448
    • 1997-07-16
    • Kyung-Yul KimJong-Hoon Park
    • Kyung-Yul KimJong-Hoon Park
    • G11C11/417G11C7/00G11C7/10G11C7/22G11C11/407G11C11/409
    • G11C7/1078G11C7/22
    • A write control circuit performs write control of data in a write cycle using consistent parametric control according to a control signal and a write enable signal. A first buffer outputs a buffered control signal based on the control signal, and a second buffer outputs a buffered write enable signal based on the buffered control signal from the first buffer and the write enable signal. A write controller detects an input condition of the control signal and the write enable signal and outputs a delay control signal. A write control signal generator selects a delayed signal based on the delay control signal from the write controller and generates a write control signal, and an output unit outputs input data to data lines in accordance with the generated write control signal.
    • 写控制电路根据控制信号和写使能信号,使用一致的参数控制来执行写周期中数据的写控制。 第一缓冲器基于控制信号输出缓冲的控制信号,并且第二缓冲器基于来自第一缓冲器的缓冲控制信号和写使能信号输出缓冲写使能信号。 写入控制器检测控制信号和写使能信号的输入条件,并输出延迟控制信号。 写入控制信号发生器基于来自写入控制器的延迟控制信号选择延迟信号,并产生写入控制信号,并且输出单元根据生成的写入控制信号将输入数据输出到数据线。