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1. 发明授权

US09343242B2 Method of making contact posts for a microelectromechanical device 有权
标题翻译：制造微机电装置接触柱的方法
公开(公告)号：US09343242B2
公开(公告)日：2016-05-17
申请号：US11767413
申请日：2007-06-22
申请人： Lianjun Liu
发明人： Lianjun Liu
IPC分类号： H01H1/00 , B81C1/00 , H01H1/06 , H01H1/20 , H01H11/04
CPC分类号： H01H1/0036 , B81B2201/016 , B81C1/00103 , H01H1/06 , H01H1/20 , H01H11/04 , Y10T29/49105 , Y10T29/49174
摘要： A device 20 includes a substrate 22 coupled with a substrate 24 such that a volume 32 is formed between the substrates 22, 24. Contact posts 48, 50 on the substrate 22 and a cantilever beam structure 36 on the substrate 24 are located within the volume 32. The cantilever beam structure has a conductive trace 38 that is selectively contactable with the contact posts 48, 50 to yield a microelectromechanical (MEMS) switch within the volume 32. Fabrication methodology for making the contact posts 48, 50 entails forming post protrusions 68, 70 on the substrate 22 and shaping post protrusions 68, 70 so that they acquire a rounded shape. Input and output signal lines 42, 44 are constructed such that respective portions of input and output signal lines 42, 44 overly corresponding post protrusions 68, 70 and take on the shape of post protrusions 68, 70.
摘要翻译：器件20包括与衬底24耦合的衬底22，使得在衬底22,24之间形成体积32.衬底22上的接触柱48,50和衬底24上的悬臂梁结构36位于体积悬臂梁结构具有能够与接触柱48,50选择性地接触的导电迹线38，以在体积32内产生微机电（MEMS）开关。用于制造接触柱48,50的制造方法需要形成后突起68 ，70在基板22上，并且成形柱突起68,70，使得它们获得圆形。输入和输出信号线42,44被构造成使得输入和输出信号线42,44的相应部分过度对应的柱形突起68,70并且呈立柱形突起68,70的形状。

2. 发明申请

US20140048910A1 SUBSTRATE STRUCTURE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：基板结构及其制造方法
公开(公告)号：US20140048910A1
公开(公告)日：2014-02-20
申请号：US14111093
申请日：2012-02-23
申请人： Lianjun Liu
发明人： Lianjun Liu
IPC分类号： H01L23/00 , H01L23/522 , H01L21/30 , H01L23/528
CPC分类号： H01L23/562 , B81C1/00182 , B81C1/00365 , B81C2201/019 , H01L21/30 , H01L21/76283 , H01L21/76898 , H01L21/84 , H01L23/5226 , H01L23/528 , H01L23/544 , H01L25/50 , H01L2223/54426 , H01L2924/0002 , H01L2924/00
摘要： Provided is a substrate structure, including: a first substrate and a second substrate arranged correspondingly. A first surface of the first substrate faces a second surface of the second substrate, wherein the first surface is successively arranged with a conductor interconnection layer and a bonding layer, with the bonding layer connecting the first substrate and the conductor interconnection layer to the second substrate. The substrate structure and a method for manufacturing the same. The second substrate can serve as a support substrate and the first substrate as a substrate for directly manufacturing a device. However, the first substrate is formed by the growth of a crystal without the problem of thickness and stress thereof, thereby avoiding unnecessary stress and further improving the performance of the device formed in the first substrate.
摘要翻译：提供了一种基板结构，包括：相应地布置的第一基板和第二基板。第一衬底的第一表面面对第二衬底的第二表面，其中第一表面依次布置有导体互连层和接合层，其中接合层将第一衬底和导体互连层连接到第二衬底。基板结构及其制造方法。第二基板可以用作支撑基板，第一基板用作用于直接制造装置的基板。然而，第一衬底通过晶体生长而形成，而没有其厚度和应力的问题，从而避免了不必要的应力，并进一步提高了形成在第一衬底中的器件的性能。

3. 发明申请

US20120282719A1 METHODS FOR FORMING A MICRO ELECTRO-MECHANICAL DEVICE 有权
标题翻译：用于形成微电子机械装置的方法
公开(公告)号：US20120282719A1
公开(公告)日：2012-11-08
申请号：US13550722
申请日：2012-07-17
申请人： JINBANG TANG , Lianjun Liu
发明人： JINBANG TANG , Lianjun Liu
IPC分类号： H01L21/50
CPC分类号： B81B7/0064 , B81B2201/0257 , B81B2207/017 , H01L24/12 , H01L24/16 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16235 , H01L2924/00014 , H01L2924/01078 , H01L2924/10253 , H01L2924/14 , H01L2924/1461 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3025 , H04R19/005 , H04R19/04 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： Embodiments include methods for forming a device comprising a conductive substrate, a micro electro-mechanical systems (MEMS) structure, and a plurality of bond pads. The conductive substrate has a first side and a second side, the second side opposite the first side. The MEMS structure is formed over the first side of the conductive substrate. The plurality of bond pads are formed over the first side of the conductive substrate and electrically coupled to the first side of the conductive substrate. The conductive substrate and plurality of bond pads function to provide electrostatic shielding to the MEMS structure.
摘要翻译：实施例包括用于形成包括导电衬底，微机电系统（MEMS）结构和多个接合焊盘的器件的方法。导电基板具有第一侧和第二侧，第二侧与第一侧相对。 MEMS结构形成在导电衬底的第一侧上。多个接合焊盘形成在导电衬底的第一侧上并电耦合到导电衬底的第一侧。导电衬底和多个接合焊盘用于向MEMS结构提供静电屏蔽。

4. 发明授权

US08158492B2 MEMS microphone with cavity and method therefor 有权
标题翻译：具有腔体的MEMS麦克风及其方法
公开(公告)号：US08158492B2
公开(公告)日：2012-04-17
申请号：US12432377
申请日：2009-04-29
申请人： Lianjun Liu , Douglas G. Mitchell
发明人： Lianjun Liu , Douglas G. Mitchell
IPC分类号： H01L21/00
CPC分类号： H04R19/005 , H01L29/84 , H01L2924/14 , H01L2924/30105 , H01L2924/3025
摘要： A device comprises a substrate, a micro electro-mechanical systems (MEMS) structure, and a dielectric film. The substrate has a first side and a second side, the second side opposite the first side. The MEMS structure is formed on the first side of the substrate. The cavity is formed in the substrate directly opposite the MEMS structure. The cavity has an opening formed on the second side. The dielectric film is attached to the second side of the substrate and completely covering the opening. In one embodiment, the MEMS structure is a diaphragm for a microphone. Another embodiment includes a method for forming the device.
摘要翻译：一种器件包括衬底，微电子机械系统（MEMS）结构和电介质膜。衬底具有第一侧和第二侧，第二侧与第一侧相对。 MEMS结构形成在衬底的第一侧上。空腔形成在与MEMS结构直接相对的基板中。空腔具有形成在第二侧上的开口。电介质膜附着到基片的第二侧并完全覆盖开口。在一个实施例中，MEMS结构是用于麦克风的隔膜。另一实施例包括用于形成装置的方法。

5. 发明授权

US08138062B2 Electrical coupling of wafer structures 有权
标题翻译：晶片结构的电耦合
公开(公告)号：US08138062B2
公开(公告)日：2012-03-20
申请号：US12638424
申请日：2009-12-15
申请人： Lianjun Liu , Lisa H. Karlin , Alan J. Magnus
发明人： Lianjun Liu , Lisa H. Karlin , Alan J. Magnus
IPC分类号： H01L21/30
CPC分类号： B81B7/007 , B81B2207/097 , H01L21/50 , H01L23/10 , H01L24/05 , H01L24/06 , H01L24/94 , H01L2224/04042 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/06155 , H01L2224/94 , H01L2924/14 , H01L2924/1461 , H01L2924/157 , H01L2924/16152 , H01L2924/16153 , H01L2924/16235 , H01L2924/16251 , H01L2924/167 , H01L2924/16788 , H01L2224/83
摘要： A method for electrically coupling a first wafer with a second wafer is provided. The method includes bonding the first wafer with the second wafer using a bonding material. The method further includes forming an opening in the first wafer in a scribe area of the second wafer to expose a surface of a conductive structure of the second wafer. The method further includes forming a conductive layer overlying the first wafer and the opening in the first wafer such that the conductive layer forms an electrical contact with the conductive structure of the second wafer thereby electrically coupling the first wafer with the second wafer.
摘要翻译：提供了一种用于将第一晶片与第二晶片电耦合的方法。该方法包括使用接合材料将第一晶片与第二晶片接合。该方法还包括在第二晶片的划线区域中的第一晶片中形成开口以暴露第二晶片的导电结构的表面。该方法还包括形成覆盖第一晶片和第一晶片中的开口的导电层，使得导电层与第二晶片的导电结构形成电接触，从而将第一晶片与第二晶片电耦合。

6. 发明申请

US20110221042A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110221042A1
公开(公告)日：2011-09-15
申请号：US12722225
申请日：2010-03-11
申请人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
发明人： Lisa H. Karlin , Lianjun Liu , Alex P. Pamatat , Paul M. Winebarger
IPC分类号： H01L23/04 , H01L21/50
CPC分类号： B81B3/0018 , B81B7/007 , H01L21/50 , H01L21/78 , H01L23/04 , H01L24/94 , H01L24/97 , H01L2224/94 , H01L2224/97 , H01L2924/1461 , H01L24/03 , H01L24/26 , H01L24/83 , H01L2224/83 , H01L2224/03 , H01L2224/27
摘要： A wafer structure (88) includes a device wafer (20) and a cap wafer (60). Semiconductor dies (22) on the device wafer (20) each include a microelectronic device (26) and terminal elements (28, 30). Barriers (36, 52) are positioned in inactive regions (32, 50) of the device wafer (20). The cap wafer (60) is coupled to the device wafer (20) and covers the semiconductor dies (22). Portions (72) of the cap wafer (60) are removed to expose the terminal elements (28, 30). The barriers (36, 52) may be taller than the elements (28, 30) and function to prevent the portions (72) from contacting the terminal elements (28, 30) when the portions (72) are removed. The wafer structure (88) is singulated to form multiple semiconductor devices (89), each device (89) including the microelectronic device (26) covered by a section of the cap wafer (60) and terminal elements (28, 30) exposed from the cap wafer (60).
摘要翻译：晶片结构（88）包括器件晶片（20）和盖晶片（60）。器件晶片（20）上的半导体管芯（22）各自包括微电子器件（26）和端子元件（28,30）。阻挡层（36,52）位于器件晶片（20）的非活性区域（32,50）中。盖晶片（60）耦合到器件晶片（20）并覆盖半导体管芯（22）。去除盖晶片（60）的部分（72）以露出端子元件（28,30）。障碍物（36,52）可以比元件（28,30）更高，并且用于在部分（72）被移除时防止部分（72）接触端子元件（28,30）。晶片结构（88）被单个化以形成多个半导体器件（89），每个器件（89）包括由盖晶片（60）的一部分覆盖的微电子器件（26）和从其暴露的端子元件（28,30）盖晶片（60）。

7. 发明申请

US20110143476A1 ELECTRICAL COUPLING OF WAFER STRUCTURES 有权
标题翻译： WAFER结构的电耦合
公开(公告)号：US20110143476A1
公开(公告)日：2011-06-16
申请号：US12638424
申请日：2009-12-15
申请人： LIANJUN LIU , LISA H. KARLIN , ALAN J. MAGNUS
发明人： LIANJUN LIU , LISA H. KARLIN , ALAN J. MAGNUS
IPC分类号： H01L21/78
CPC分类号： B81B7/007 , B81B2207/097 , H01L21/50 , H01L23/10 , H01L24/05 , H01L24/06 , H01L24/94 , H01L2224/04042 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/06155 , H01L2224/94 , H01L2924/14 , H01L2924/1461 , H01L2924/157 , H01L2924/16152 , H01L2924/16153 , H01L2924/16235 , H01L2924/16251 , H01L2924/167 , H01L2924/16788 , H01L2224/83
摘要： A method for electrically coupling a first wafer with a second wafer is provided. The method includes bonding the first wafer with the second wafer using a bonding material. The method further includes forming an opening in the first wafer in a scribe area of the second wafer to expose a surface of a conductive structure of the second wafer. The method further includes forming a conductive layer overlying the first wafer and the opening in the first wafer such that the conductive layer forms an electrical contact with the conductive structure of the second wafer thereby electrically coupling the first wafer with the second wafer.
摘要翻译：提供了一种用于将第一晶片与第二晶片电耦合的方法。该方法包括使用接合材料将第一晶片与第二晶片接合。该方法还包括在第二晶片的划线区域中的第一晶片中形成开口以暴露第二晶片的导电结构的表面。该方法还包括形成覆盖第一晶片和第一晶片中的开口的导电层，使得导电层与第二晶片的导电结构形成电接触，从而将第一晶片与第二晶片电耦合。

8. 发明申请

US20100214716A1 MEMS CAPACITIVE DEVICE AND METHOD OF FORMING SAME 有权
标题翻译： MEMS电容器及其形成方法
公开(公告)号：US20100214716A1
公开(公告)日：2010-08-26
申请号：US12391083
申请日：2009-02-23
申请人： Lianjun Liu , Melvy F. Miller
发明人： Lianjun Liu , Melvy F. Miller
IPC分类号： H01G5/16 , H01L21/20 , H01L21/02
CPC分类号： H01G5/011 , B81B3/0072 , B81B2201/0221 , H01G5/18 , H01L28/40 , H01L41/0973 , Y10T29/435
摘要： A MEMS capacitive device (90) includes a fixed capacitor plate (104) formed on a surface (102) of a substrate (100). A movable capacitor plate (114) is suspended above the fixed capacitor plate (104) by compliant members (116) anchored to the surface (102). A movable element (120) is positioned in spaced apart relationship from the movable capacitor plate (104) and has an actuator (130) formed thereon. Actuation of the actuator (130) causes abutment of a portion of the movable element (120) against a contact surface (136) of the movable plate (114). The abutment moves the movable plate (114) toward the fixed plate (104) to alter a capacitance (112) between the plates (104, 114). Another substrate (118) may be coupled to the substrate (100) such that a surface (126) of the substrate (118) faces the surface (102) of the substrate (100). The movable element (120) may be formed on the surface (126).
摘要翻译： MEMS电容器件（90）包括形成在衬底（100）的表面（102）上的固定电容器板（104）。可移动电容器板（114）通过锚固到表面（102）的柔性构件（116）悬置在固定电容器板（104）的上方。可移动元件（120）与可移动电容器板（104）间隔开并且具有形成在其上的致动器（130）。致动器（130）的致动导致可移动元件（120）的一部分抵靠可动板（114）的接触表面（136）。抵靠将可移动板（114）移向固定板（104）以改变板（104,114）之间的电容（112）。衬底（118）可以耦合到衬底（100），使得衬底（118）的表面（126）面向衬底（100）的表面（102）。可移动元件（120）可以形成在表面（126）上。

9. 发明申请

US20080246126A1 STACKED AND SHIELDED DIE PACKAGES WITH INTERCONNECTS 审中-公开
标题翻译：具有互连的堆叠和屏蔽DIE包
公开(公告)号：US20080246126A1
公开(公告)日：2008-10-09
申请号：US11696374
申请日：2007-04-04
申请人： Philip H. Bowles , Li Li , Lianjun Liu
发明人： Philip H. Bowles , Li Li , Lianjun Liu
IPC分类号： H01L23/552 , H01L21/58
CPC分类号： H01L23/3114 , H01L23/5389 , H01L23/552 , H01L24/24 , H01L24/25 , H01L24/48 , H01L24/73 , H01L24/82 , H01L24/83 , H01L24/91 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16145 , H01L2224/24226 , H01L2224/2518 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/73227 , H01L2224/73257 , H01L2224/83 , H01L2224/97 , H01L2225/06506 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06582 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/07802 , H01L2924/0781 , H01L2924/07811 , H01L2924/181 , H01L2924/3025 , H01L2224/82 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/0555 , H01L2224/0556
摘要： According to an example embodiment, a stacked die package 800 includes a first die (806), first active circuitry (808) disposed on an upper surface of the first die, and a first conductive pattern (820) disposed on the first active circuitry. The stacked die package further includes a second die (826) disposed over the first die, where the first die is wider than the second die in a cross-section of the stacked die package, second active circuitry (828) disposed on an upper surface of the second die, and a second conductive pattern (830) disposed on the second active circuitry. The stacked die package further includes a first wirebond (822) that connects the first conductive pattern to the second conductive pattern and a mold compound (824) disposed on the first die, the mold compound encapsulating the second die and the wirebond.
摘要翻译：根据示例实施例，堆叠管芯封装800包括设置在第一管芯的上表面上的第一管芯（806），第一有源电路（808）和布置在第一有源电路上的第一导电图案（820）。堆叠的管芯封装还包括设置在第一管芯上方的第二管芯（826），其中第一管芯在堆叠管芯封装的横截面中比第二管芯更宽，第二有源电路（828）设置在上表面以及设置在第二有源电路上的第二导电图案（830）。堆叠的管芯封装还包括将第一导电图案连接到第二导电图案的第一引线键（822）和设置在第一裸片上的模制化合物（824），封装第二裸片和引线键的模制化合物。

10. 发明申请

US20070205502A1 Methods and apparatus for thermal isolation in vertically-integrated semiconductor devices 有权
标题翻译：垂直集成半导体器件中热隔离的方法和装置
公开(公告)号：US20070205502A1
公开(公告)日：2007-09-06
申请号：US11366928
申请日：2006-03-01
申请人： Lianjun Liu , Marie Borucki
发明人： Lianjun Liu , Marie Borucki
IPC分类号： H01L23/34
CPC分类号： H01L25/0657 , H01L2225/06513 , H01L2225/06541 , H01L2225/06589 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure (100) includes a first substrate (110) having a first semiconductor device (112) formed therein, a second substrate (120) having a second device (122) formed therein and vertically-integrated above the first substrate (110), and a thermal isolation gap (130) disposed between the first device (112) and the second device (122). The thermal isolation gap (130) may be formed, for example, using an etched dielectric layer formed on first substrate (110), using an etched cavity in the second substrate (120), or by including a bonding layer (140) that has a gap or void incorporated therein.
摘要翻译：半导体结构（100）包括具有形成在其中的第一半导体器件（112）的第一衬底（110），具有形成在其中并垂直集成在第一衬底（110）上方的第二器件（122）的第二衬底（120）以及设置在第一装置（112）和第二装置（122）之间的热隔离间隙（130）。热隔离间隙（130）可以例如使用在第一基板（110）上形成的蚀刻介电层，使用第二基板（120）中的蚀刻空腔，或者通过包括具有其中包含间隙或空隙。

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