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    • 3. 发明申请
    • METHOD FOR MANUFACTURING TRANSISTOR
    • 制造晶体管的方法
    • US20130309808A1
    • 2013-11-21
    • US13376834
    • 2011-06-10
    • Shengdong ZhangXin HeLongyan Wang
    • Shengdong ZhangXin HeLongyan Wang
    • H01L29/66
    • H01L29/66742H01L29/66969H01L29/78648H01L29/7869
    • Designs and fabrication of dual-gate thin film transistors are provided. An active region and a top gate electrode of the transistor can be made of a transparent thin film material. A photoresist can be coated onto a surface of the transparent conductive thin film for forming the top gate electrode. Light is from the bottom of the substrate during exposure. After the development, a photoresist pattern aligned with the bottom gate electrode is formed on the surface of the conductive thin film. The top gate electrode aligned with the bottom gate electrode is formed by etching the conductive thin film. The bottom gate electrode can be used as a mask, which may save the cost for manufacturing the transistor and improve the accuracy of alignment between the top gate electrode and the bottom gate electrode and the performance of the dual-gate thin film transistor.
    • 提供双栅极薄膜晶体管的设计和制造。 晶体管的有源区和顶栅电极可以由透明薄膜材料制成。 可以将光致抗蚀剂涂覆在透明导电薄膜的表面上,以形成顶栅电极。 光在曝光期间来自底物的底部。 在显影之后,在导电薄膜的表面上形成与底栅电极对准的光致抗蚀剂图案。 通过蚀刻导电薄膜来形成与底栅电极对准的顶栅电极。 底栅电极可以用作掩模,这可以节省制造晶体管的成本,并提高顶栅电极和底栅电极之间的对准精度以及双栅极薄膜晶体管的性能。
    • 4. 发明授权
    • Method for manufacturing transistor
    • 晶体管制造方法
    • US09129992B2
    • 2015-09-08
    • US13376834
    • 2011-06-13
    • Shengdong ZhangXin HeLongyan Wang
    • Shengdong ZhangXin HeLongyan Wang
    • H01L21/00H01L29/66H01L29/786
    • H01L29/66742H01L29/66969H01L29/78648H01L29/7869
    • Designs and fabrication of dual-gate thin film transistors are provided. An active region and a top gate electrode of the transistor can be made of a transparent thin film material. A photoresist can be coated onto a surface of the transparent conductive thin film for forming the top gate electrode. Light is from the bottom of the substrate during exposure. After the development, a photoresist pattern aligned with the bottom gate electrode is formed on the surface of the conductive thin film. The top gate electrode aligned with the bottom gate electrode is formed by etching the conductive thin film. The bottom gate electrode can be used as a mask, which may save the cost for manufacturing the transistor and improve the accuracy of alignment between the top gate electrode and the bottom gate electrode and the performance of the dual-gate thin film transistor.
    • 提供双栅极薄膜晶体管的设计和制造。 晶体管的有源区和顶栅电极可以由透明薄膜材料制成。 可以将光致抗蚀剂涂覆在透明导电薄膜的表面上,以形成顶栅电极。 光在曝光期间来自底物的底部。 在显影之后,在导电薄膜的表面上形成与底栅电极对准的光致抗蚀剂图案。 通过蚀刻导电薄膜来形成与底栅电极对准的顶栅电极。 底栅电极可以用作掩模,这可以节省制造晶体管的成本,并提高顶栅电极和底栅电极之间的对准精度以及双栅极薄膜晶体管的性能。