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    • 3. 发明授权
    • Method of fabricating a mixed substrate
    • 混合基板的制造方法
    • US07422958B2
    • 2008-09-09
    • US11766463
    • 2007-06-21
    • Marek KostrzewaFabrice Letertre
    • Marek KostrzewaFabrice Letertre
    • H01L21/76
    • H01L21/76254
    • A method for fabricating a mixed substrate that include insulating material layer portions buried in a substrate of semiconductor material. The method includes providing a support substrate made of semiconductor material and having a front face that includes open cavities; providing a layer of an insulating material upon the front face of the support substrate and into the cavities; polishing the layer to provide a perfectly planar surface; bonding a source substrate to the planar surface of the support substrate; withdrawing a portion of the source substrate to provide an assembly having a thin useful or active layer upon the insulating layer of the support substrate; and heat treating the assembly in a selected atmosphere at a temperature and for a time sufficient to diffuse atoms from the insulating layer and through the thin layer to reduce the thickness of the insulating layer while retaining the insulating material in the cavities of the support substrate.
    • 一种制造混合衬底的方法,该混合衬底包括埋在半导体材料的衬底中的绝缘材料层部分。 该方法包括提供由半导体材料制成并具有包括开放空腔的前表面的支撑衬底; 在支撑基板的前表面上提供绝缘材料层并进入空腔; 抛光该层以提供完美平坦的表面; 将源极基板接合到所述支撑基板的平坦表面; 退出源基板的一部分以提供在支撑基板的绝缘层上具有薄的有用或有源层的组件; 并且在选定的气氛中,在足以从绝缘层扩散原子并通过薄层的温度和时间内对组件进行热处理,以在将绝缘材料保持在支撑衬底的空腔中的同时减小绝缘层的厚度。
    • 7. 发明授权
    • Method of adjusting the threshold voltage of a transistor by a buried trapping layer
    • 通过埋置捕获层调节晶体管的阈值电压的方法
    • US08809964B2
    • 2014-08-19
    • US12865549
    • 2009-02-11
    • François AndrieuEmmanuel AugendreLaurent ClavelierMarek Kostrzewa
    • François AndrieuEmmanuel AugendreLaurent ClavelierMarek Kostrzewa
    • H01L21/336H01L29/792
    • H01L29/42348H01L21/84H01L27/1203H01L29/792
    • An electronic subassembly and associated method for the production of an electronic subassembly include a semiconductor layer bearing at least a first transistor having an adjustable threshold voltage is joined to an insulator layer and in which a first trapping zone is formed at a predetermined first depth. The first trapping zone extends at least beneath a channel of the first transistor and includes traps of greater density than the density of traps outside the first trapping zone, in such a way that the semiconductor layer and the first trapping zone are capacitively coupled. The useful information from the first transistor includes the charge transport within this transistor. A second trapping zone can be formed that extends at least beneath a channel of a second transistor that is formed by a second implantation with an energy and/or a dose and/or atoms that differ from those used to form the first trapping zone.
    • 一种用于生产电子组件的电子组件和相关方法,包括至少具有可调阈值电压的第一晶体管的半导体层被连接到绝缘体层,并且其中在预定的第一深度形成第一捕集区。 第一捕获区至少在第一晶体管的沟道下方延伸,并且包括具有比第一捕获区外的阱的密度更高密度的陷阱,使得半导体层和第一捕获区电容耦合。 来自第一晶体管的有用信息包括该晶体管内的电荷传输。 可以形成第二捕获区,其至少在通过第二注入形成的第二晶体管的沟道下方延伸,所述第二晶体管具有不同于用于形成第一捕获区的能量和/或剂量和/或原子的能量和/或原子。
    • 8. 发明申请
    • METHOD OF FABRICATING A MICROELECTRONIC STRUCTURE OF A SEMICONDUCTOR ON INSULATOR TYPE WITH DIFFERENT PATTERNS
    • 在具有不同图案的绝缘体类型上制造半导体的微电子结构的方法
    • US20090246946A1
    • 2009-10-01
    • US12413130
    • 2009-03-27
    • Emmanuel AugendreThomas ErnstMarek KostrzewaHubert Moriceau
    • Emmanuel AugendreThomas ErnstMarek KostrzewaHubert Moriceau
    • H01L21/762
    • H01L21/76254
    • A microstructure of the semiconductor on insulator type with different patterns is produced by forming a stacked uniform structure including a plate forming a substrate, a continuous insulative layer and a semiconductor layer. The continuous insulative layer is a stack of at least three elementary layers, including a bottom elementary layer, at least one intermediate elementary layer, and a top elementary layer overlying the semiconductor layer, where at least one of the bottom elementary layer and the top elementary layer being of an insulative material. In the stacked uniform structure, at least two patterns are differentiated by modifying at least one of the elementary layers in one of the patterns so that the elementary layer has a significantly different physical or chemical property between the two patterns, where at least one of the bottom and top elementary layer is an insulative material that remains unchanged.
    • 通过形成包括形成衬底的板,连续绝缘层和半导体层的层叠均匀结构,来产生具有不同图案的绝缘体半导体型微结构。 连续绝缘层是至少三个基本层的堆叠,包括底部基本层,至少一个中间基本层和覆盖半导体层的顶部基本层,其中底部基本层和顶部基本层中的至少一个 层是绝缘材料。 在层叠的均匀结构中,通过修改其中一个图案中的至少一个基本层来区分至少两个图案,使得元件层在两个图案之间具有显着不同的物理或化学特性,其中至少一个 底部和顶部基本层是保持不变的绝缘材料。
    • 9. 发明申请
    • METHOD OF FABRICATING A MIXED SUBSTRATE
    • 混合基板的制造方法
    • US20080153251A1
    • 2008-06-26
    • US11766463
    • 2007-06-21
    • MAREK KOSTRZEWAFabrice Letertre
    • MAREK KOSTRZEWAFabrice Letertre
    • H01L21/762
    • H01L21/76254
    • A method for fabricating a mixed substrate that include insulating material layer portions buried in a substrate of semiconductor material. The method includes providing a support substrate made of semiconductor material and having a front face that includes open cavities; providing a layer of an insulating material upon the front face of the support substrate and into the cavities; polishing the layer to provide a perfectly planar surface; bonding a source substrate to the planar surface of the support substrate; withdrawing a portion of the source substrate to provide an assembly having a thin useful or active layer upon the insulating layer of the support substrate; and heat treating the assembly in a selected atmosphere at a temperature and for a time sufficient to diffuse atoms from the insulating layer and through the thin layer to reduce the thickness of the insulating layer while retaining the insulating material in the cavities of the support substrate.
    • 一种制造混合衬底的方法,该混合衬底包括埋在半导体材料的衬底中的绝缘材料层部分。 该方法包括提供由半导体材料制成并具有包括开放空腔的前表面的支撑衬底; 在支撑基板的前表面上提供绝缘材料层并进入空腔; 抛光该层以提供完美平坦的表面; 将源极基板接合到所述支撑基板的平坦表面; 退出源基板的一部分以提供在支撑基板的绝缘层上具有薄的有用或有源层的组件; 并且在选定的气氛中,在足以从绝缘层扩散原子并通过薄层的温度和时间内对组件进行热处理,以在将绝缘材料保持在支撑衬底的空腔中的同时减小绝缘层的厚度。
    • 10. 发明申请
    • Method for Bonding Two Free Surfaces, Respectively of First and Second Different Substrates
    • 分别接合第一和第二不同基板的两个自由表面的方法
    • US20080009123A1
    • 2008-01-10
    • US11667919
    • 2005-12-06
    • Marek KostrzewaLea Di CioccioGuillaume Delapierre
    • Marek KostrzewaLea Di CioccioGuillaume Delapierre
    • H01L21/30
    • C09J5/02
    • A method for bonding two free surfaces, respectively of first and second different substrates, includes a formation step, on the free surface of the first substrate, of a self-assembled mono-molecular layer consisting of a thiol compound of the SH—R—X type, where —R is a carbonaceous chain and —X is a group selected from the group consisting in —H, —OH and —COOH, at least said free surface of the first substrate being formed by a material able to form molecular bonds with the —SH group of the thiol compound. The method also includes preparing the free surface of the second substrate consisting in saturating the free surface of the second substrate with —H groups if —X is a —H group or with —OH groups if —X is selected from the group consisting in —OH and —COOH, and placing the two free surfaces in contact.
    • 分别用于接合第一和第二不同基板的两个自由表面的方法包括在第一基板的自由表面上形成由SH-RX型硫醇化合物组成的自组装单分子层的形成步骤 ,其中-R是碳质链,-X是选自-H,-OH和-COOH的基团,所述第一基底的至少所述自由表面由能够与所述第一基底形成分子键的材料形成 -SH组的硫醇化合物。 该方法还包括制备第二衬底的自由表面,其组成为:如果-X为-H基团则用-H基团饱和第二衬底的自由表面,如果-X选自 - OH和-COOH,并将两个自由表面接触。