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    • 3. 发明授权
    • DES hardware throughput for short operations
    • DES硬件吞吐量短的操作
    • US08374343B2
    • 2013-02-12
    • US12106013
    • 2008-04-18
    • Mark LindemannRonald PerezSean William Smith
    • Mark LindemannRonald PerezSean William Smith
    • H04L9/28
    • H04L9/0625G09C1/00H04L2209/12
    • A system for executing a symmetric key cryptographic method includes a processor selecting data paths, a key, an initialization vector, a memory storing batched operation parameters, a bus connected to the processor and the memory, a cryptographic processor connected to the bus and controlled by the processor for performing a plurality of operations according to the operations parameter, wherein data for each operation is received individually and separately from the batched operation parameters, wherein an output for each operation is transmitted separately, and a pair of first-in-first-out (FIFO) state machines controlled by the processor and selectably connected to one of the cryptographic processor and the bus, bypassing the cryptographic processor.
    • 用于执行对称密钥加密方法的系统包括处理器选择数据路径,密钥,初始化向量,存储批量操作参数的存储器,连接到处理器和存储器的总线,连接到总线的加密处理器,并由 所述处理器用于根据所述操作参数执行多个操作,其中每个操作的数据被单独地和分批的操作参数分开接收,其中每个操作的输出被单独发送,并且一对先进先出 (FIFO)状态机,并且可选地连接到密码处理器和总线之一,绕过加密处理器。